Path: blob/main/sys/contrib/device-tree/Bindings/gpio/gpio-davinci.txt
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Davinci/Keystone GPIO controller bindings12Required Properties:3- compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs4"ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L,566AK2E SoCs6"ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G7"ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM6548"ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs9"ti,am64-gpio", "ti,keystone-gpio": for AM64 SoCs1011- reg: Physical base address of the controller and the size of memory mapped12registers.1314- gpio-controller : Marks the device node as a gpio controller.1516- #gpio-cells : Should be two.17- first cell is the pin number18- second cell is used to specify optional parameters (unused)1920- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are21supported at a time.2223- ti,ngpio: The number of GPIO pins supported.2425- ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt26line to processor.2728- clocks: Should contain the device's input clock, and should be defined as per29the appropriate clock bindings consumer usage in,3031Documentation/devicetree/bindings/clock/keystone-gate.txt32for 66AK2HK/66AK2L/66AK2E SoCs or,3334Documentation/devicetree/bindings/clock/ti,sci-clk.txt35for 66AK2G SoCs3637- clock-names: Name should be "gpio";3839Currently clock-names and clocks are needed for all keystone 2 platforms40Davinci platforms do not have DT clocks as of now.4142The GPIO controller also acts as an interrupt controller. It uses the default43two cells specifier as described in Documentation/devicetree/bindings/44interrupt-controller/interrupts.txt.4546Example:4748gpio: gpio@1e26000 {49compatible = "ti,dm6441-gpio";50gpio-controller;51#gpio-cells = <2>;52reg = <0x226000 0x1000>;53interrupt-parent = <&intc>;54interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH5544 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH5646 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH5748 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH5850 IRQ_TYPE_EDGE_BOTH>;59ti,ngpio = <144>;60ti,davinci-gpio-unbanked = <0>;61interrupt-controller;62#interrupt-cells = <2>;63};6465leds {66compatible = "gpio-leds";6768led1 {69label = "davinci:green:usr1";70gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;71...72};7374led2 {75label = "davinci:red:debug1";76gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;77...78};79};8081Example for 66AK2G:8283gpio0: gpio@2603000 {84compatible = "ti,k2g-gpio", "ti,keystone-gpio";85reg = <0x02603000 0x100>;86gpio-controller;87#gpio-cells = <2>;88interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,89<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,90<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,91<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,92<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,93<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,94<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,95<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,96<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;97interrupt-controller;98#interrupt-cells = <2>;99ti,ngpio = <144>;100ti,davinci-gpio-unbanked = <0>;101clocks = <&k2g_clks 0x001b 0x0>;102clock-names = "gpio";103};104105Example for 66AK2HK/66AK2L/66AK2E:106107gpio0: gpio@260bf00 {108compatible = "ti,keystone-gpio";109reg = <0x0260bf00 0x100>;110gpio-controller;111#gpio-cells = <2>;112/* HW Interrupts mapped to GPIO pins */113interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,114<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,115<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,116<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,117<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,118<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,119<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,120<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,121<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,122<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,123<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,124<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,125<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,126<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,127<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,128<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,129<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,130<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,131<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,132<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,133<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,134<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,135<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,136<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,137<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,138<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,139<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,140<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,141<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,142<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,143<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,144<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;145clocks = <&clkgpio>;146clock-names = "gpio";147ti,ngpio = <32>;148ti,davinci-gpio-unbanked = <32>;149};150151Example for K3 AM654:152153wkup_gpio0: wkup_gpio0@42110000 {154compatible = "ti,am654-gpio", "ti,keystone-gpio";155reg = <0x42110000 0x100>;156gpio-controller;157#gpio-cells = <2>;158interrupt-parent = <&intr_wkup_gpio>;159interrupts = <59 128>, <59 129>, <59 130>, <59 131>;160interrupt-controller;161#interrupt-cells = <2>;162ti,ngpio = <56>;163ti,davinci-gpio-unbanked = <0>;164clocks = <&k3_clks 59 0>;165clock-names = "gpio";166};167168169