Path: blob/main/sys/contrib/device-tree/Bindings/i2c/i2c-mt65xx.txt
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* MediaTek's I2C controller12The MediaTek's I2C controller is used to interface with I2C devices.34Required properties:5- compatible: value should be either of the following.6"mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT27017"mediatek,mt2712-i2c": for MediaTek MT27128"mediatek,mt6577-i2c": for MediaTek MT65779"mediatek,mt6589-i2c": for MediaTek MT658910"mediatek,mt6797-i2c", "mediatek,mt6577-i2c": for MediaTek MT679711"mediatek,mt7622-i2c": for MediaTek MT762212"mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT762313"mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT762914"mediatek,mt8168-i2c": for MediaTek MT816815"mediatek,mt8173-i2c": for MediaTek MT817316"mediatek,mt8183-i2c": for MediaTek MT818317"mediatek,mt8186-i2c": for MediaTek MT818618"mediatek,mt8192-i2c": for MediaTek MT819219"mediatek,mt8195-i2c", "mediatek,mt8192-i2c": for MediaTek MT819520"mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT851621- reg: physical base address of the controller and dma base, length of memory22mapped region.23- interrupts: interrupt number to the cpu.24- clock-div: the fixed value for frequency divider of clock source in i2c25module. Each IC may be different.26- clocks: clock name from clock manager27- clock-names: Must include "main" and "dma", "arb" is for multi-master that28one bus has more than two i2c controllers, if enable have-pmic need include29"pmic" extra.3031Optional properties:32- clock-frequency: Frequency in Hz of the bus when transfer, the default value33is 100000.34- mediatek,have-pmic: platform can control i2c form special pmic side.35Only mt6589 and mt8135 support this feature.36- mediatek,use-push-pull: IO config use push-pull mode.37- vbus-supply: phandle to the regulator that provides power to SCL/SDA.3839Example:4041i2c0: i2c@1100d000 {42compatible = "mediatek,mt6577-i2c";43reg = <0x1100d000 0x70>,44<0x11000300 0x80>;45interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;46clock-frequency = <400000>;47mediatek,have-pmic;48clock-div = <16>;49clocks = <&i2c0_ck>, <&ap_dma_ck>;50clock-names = "main", "dma";51};52535455