Path: blob/main/sys/contrib/device-tree/Bindings/iio/adc/at91-sama5d2_adc.txt
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* AT91 SAMA5D2 Analog to Digital Converter (ADC)12Required properties:3- compatible: Should be "atmel,sama5d2-adc" or "microchip,sam9x60-adc".4- reg: Should contain ADC registers location and length.5- interrupts: Should contain the IRQ line for the ADC.6- clocks: phandle to device clock.7- clock-names: Must be "adc_clk".8- vref-supply: Supply used as reference for conversions.9- vddana-supply: Supply for the adc device.10- atmel,min-sample-rate-hz: Minimum sampling rate, it depends on SoC.11- atmel,max-sample-rate-hz: Maximum sampling rate, it depends on SoC.12- atmel,startup-time-ms: Startup time expressed in ms, it depends on SoC.13- atmel,trigger-edge-type: One of possible edge types for the ADTRG hardware14trigger pin. When the specific edge type is detected, the conversion will15start. Possible values are rising, falling, or both.16This property uses the IRQ edge types values: IRQ_TYPE_EDGE_RISING ,17IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH1819Optional properties:20- dmas: Phandle to dma channel for the ADC.21- dma-names: Must be "rx" when dmas property is being used.22See ../../dma/dma.txt for details.23- #io-channel-cells: in case consumer drivers are attached, this must be 1.24See <Documentation/devicetree/bindings/iio/iio-bindings.txt> for details.2526Properties for consumer drivers:27- Consumer drivers can be connected to this producer device, as specified28in <Documentation/devicetree/bindings/iio/iio-bindings.txt>29- Channels exposed are specified in:30<dt-bindings/iio/adc/at91-sama5d2_adc.txt>3132Example:3334adc: adc@fc030000 {35compatible = "atmel,sama5d2-adc";36reg = <0xfc030000 0x100>;37interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;38clocks = <&adc_clk>;39clock-names = "adc_clk";40atmel,min-sample-rate-hz = <200000>;41atmel,max-sample-rate-hz = <20000000>;42atmel,startup-time-ms = <4>;43vddana-supply = <&vdd_3v3_lp_reg>;44vref-supply = <&vdd_3v3_lp_reg>;45atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;46dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;47dma-names = "rx";48#io-channel-cells = <1>;49}505152