Path: blob/main/sys/contrib/device-tree/Bindings/iio/frequency/adf4371.yaml
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# SPDX-License-Identifier: GPL-2.01%YAML 1.22---3$id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers78maintainers:9- Popa Stefan <stefan.popa@analog.com>1011description: |12Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers13https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf14https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf1516properties:17compatible:18enum:19- adi,adf437120- adi,adf43722122reg:23maxItems: 12425clocks:26description:27Definition of the external clock (see clock/clock-bindings.txt)28maxItems: 12930clock-names:31description:32Must be "clkin"33maxItems: 13435adi,mute-till-lock-en:36type: boolean37description:38If this property is present, then the supply current to RF8P and RF8N39output stage will shut down until the ADF4371/ADF4372 achieves lock as40measured by the digital lock detect circuitry.4142required:43- compatible44- reg45- clocks46- clock-names4748allOf:49- $ref: /schemas/spi/spi-peripheral-props.yaml#5051unevaluatedProperties: false5253examples:54- |55spi {56#address-cells = <1>;57#size-cells = <0>;5859frequency@0 {60compatible = "adi,adf4371";61reg = <0>;62spi-max-frequency = <1000000>;63clocks = <&adf4371_clkin>;64clock-names = "clkin";65};66};67...686970