Path: blob/main/sys/contrib/device-tree/include/dt-bindings/mfd/max77620.h
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/* SPDX-License-Identifier: GPL-2.0 */1/*2* This header provides macros for MAXIM MAX77620 device bindings.3*4* Copyright (c) 2016, NVIDIA Corporation.5* Author: Laxman Dewangan <[email protected]>6*/78#ifndef _DT_BINDINGS_MFD_MAX77620_H9#define _DT_BINDINGS_MFD_MAX77620_H1011/* MAX77620 interrupts */12#define MAX77620_IRQ_TOP_GLBL 0 /* Low-Battery */13#define MAX77620_IRQ_TOP_SD 1 /* SD power fail */14#define MAX77620_IRQ_TOP_LDO 2 /* LDO power fail */15#define MAX77620_IRQ_TOP_GPIO 3 /* GPIO internal int to MAX77620 */16#define MAX77620_IRQ_TOP_RTC 4 /* RTC */17#define MAX77620_IRQ_TOP_32K 5 /* 32kHz oscillator */18#define MAX77620_IRQ_TOP_ONOFF 6 /* ON/OFF oscillator */19#define MAX77620_IRQ_LBT_MBATLOW 7 /* Thermal alarm status, > 120C */20#define MAX77620_IRQ_LBT_TJALRM1 8 /* Thermal alarm status, > 120C */21#define MAX77620_IRQ_LBT_TJALRM2 9 /* Thermal alarm status, > 140C */2223/* FPS event source */24#define MAX77620_FPS_EVENT_SRC_EN0 025#define MAX77620_FPS_EVENT_SRC_EN1 126#define MAX77620_FPS_EVENT_SRC_SW 22728/* Device state when FPS event LOW */29#define MAX77620_FPS_INACTIVE_STATE_SLEEP 030#define MAX77620_FPS_INACTIVE_STATE_LOW_POWER 13132/* FPS source */33#define MAX77620_FPS_SRC_0 034#define MAX77620_FPS_SRC_1 135#define MAX77620_FPS_SRC_2 236#define MAX77620_FPS_SRC_NONE 337#define MAX77620_FPS_SRC_DEF 43839#endif404142