Path: blob/main/sys/contrib/device-tree/include/dt-bindings/pinctrl/dra.h
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/* SPDX-License-Identifier: GPL-2.0-only */1/*2* This header provides constants for DRA pinctrl bindings.3*4* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/5* Author: Rajendra Nayak <[email protected]>6*/78#ifndef _DT_BINDINGS_PINCTRL_DRA_H9#define _DT_BINDINGS_PINCTRL_DRA_H1011/* DRA7 mux mode options for each pin. See TRM for options */12#define MUX_MODE0 0x013#define MUX_MODE1 0x114#define MUX_MODE2 0x215#define MUX_MODE3 0x316#define MUX_MODE4 0x417#define MUX_MODE5 0x518#define MUX_MODE6 0x619#define MUX_MODE7 0x720#define MUX_MODE8 0x821#define MUX_MODE9 0x922#define MUX_MODE10 0xa23#define MUX_MODE11 0xb24#define MUX_MODE12 0xc25#define MUX_MODE13 0xd26#define MUX_MODE14 0xe27#define MUX_MODE15 0xf2829/* Certain pins need virtual mode, but note: they may glitch */30#define MUX_VIRTUAL_MODE0 (MODE_SELECT | (0x0 << 4))31#define MUX_VIRTUAL_MODE1 (MODE_SELECT | (0x1 << 4))32#define MUX_VIRTUAL_MODE2 (MODE_SELECT | (0x2 << 4))33#define MUX_VIRTUAL_MODE3 (MODE_SELECT | (0x3 << 4))34#define MUX_VIRTUAL_MODE4 (MODE_SELECT | (0x4 << 4))35#define MUX_VIRTUAL_MODE5 (MODE_SELECT | (0x5 << 4))36#define MUX_VIRTUAL_MODE6 (MODE_SELECT | (0x6 << 4))37#define MUX_VIRTUAL_MODE7 (MODE_SELECT | (0x7 << 4))38#define MUX_VIRTUAL_MODE8 (MODE_SELECT | (0x8 << 4))39#define MUX_VIRTUAL_MODE9 (MODE_SELECT | (0x9 << 4))40#define MUX_VIRTUAL_MODE10 (MODE_SELECT | (0xa << 4))41#define MUX_VIRTUAL_MODE11 (MODE_SELECT | (0xb << 4))42#define MUX_VIRTUAL_MODE12 (MODE_SELECT | (0xc << 4))43#define MUX_VIRTUAL_MODE13 (MODE_SELECT | (0xd << 4))44#define MUX_VIRTUAL_MODE14 (MODE_SELECT | (0xe << 4))45#define MUX_VIRTUAL_MODE15 (MODE_SELECT | (0xf << 4))4647#define MODE_SELECT (1 << 8)4849#define PULL_ENA (0 << 16)50#define PULL_DIS (1 << 16)51#define PULL_UP (1 << 17)52#define INPUT_EN (1 << 18)53#define SLEWCONTROL (1 << 19)54#define WAKEUP_EN (1 << 24)55#define WAKEUP_EVENT (1 << 25)5657/* Active pin states */58#define PIN_OUTPUT (0 | PULL_DIS)59#define PIN_OUTPUT_PULLUP (PULL_UP)60#define PIN_OUTPUT_PULLDOWN (0)61#define PIN_INPUT (INPUT_EN | PULL_DIS)62#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)63#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)64#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)6566/*67* Macro to allow using the absolute physical address instead of the68* padconf registers instead of the offset from padconf base.69*/70#define DRA7XX_CORE_IOPAD(pa, val) (((pa) & 0xffff) - 0x3400) (val)7172/* DRA7 IODELAY configuration parameters */73#define A_DELAY_PS(val) ((val) & 0xffff)74#define G_DELAY_PS(val) ((val) & 0xffff)75#endif76777879