Path: blob/main/sys/contrib/device-tree/include/dt-bindings/pinctrl/omap.h
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/* SPDX-License-Identifier: GPL-2.0 */1/*2* This header provides constants for OMAP pinctrl bindings.3*4* Copyright (C) 2009 Nokia5* Copyright (C) 2009-2010 Texas Instruments6*/78#ifndef _DT_BINDINGS_PINCTRL_OMAP_H9#define _DT_BINDINGS_PINCTRL_OMAP_H1011/* 34xx mux mode options for each pin. See TRM for options */12#define MUX_MODE0 013#define MUX_MODE1 114#define MUX_MODE2 215#define MUX_MODE3 316#define MUX_MODE4 417#define MUX_MODE5 518#define MUX_MODE6 619#define MUX_MODE7 72021/* 24xx/34xx mux bit defines */22#define PULL_ENA (1 << 3)23#define PULL_UP (1 << 4)24#define ALTELECTRICALSEL (1 << 5)2526/* omap3/4/5 specific mux bit defines */27#define INPUT_EN (1 << 8)28#define OFF_EN (1 << 9)29#define OFFOUT_EN (1 << 10)30#define OFFOUT_VAL (1 << 11)31#define OFF_PULL_EN (1 << 12)32#define OFF_PULL_UP (1 << 13)33#define WAKEUP_EN (1 << 14)34#define WAKEUP_EVENT (1 << 15)3536/* Active pin states */37#define PIN_OUTPUT 038#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)39#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)40#define PIN_INPUT INPUT_EN41#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)42#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)4344/* Off mode states */45#define PIN_OFF_NONE 046#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)47#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)48#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP)49#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN)50#define PIN_OFF_WAKEUPENABLE WAKEUP_EN5152/*53* Macros to allow using the absolute physical address instead of the54* padconf registers instead of the offset from padconf base.55*/56#define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))5758#define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val)59#define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)60#define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val)61#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val)62#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)63#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)64#define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)65#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)66#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)67#define AM33XX_PADCONF(pa, dir, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) ((dir) | (mux))6869/*70* Macros to allow using the offset from the padconf physical address71* instead of the offset from padconf base.72*/73#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))7475#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)76#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)7778/*79* Define some commonly used pins configured by the boards.80* Note that some boards use alternative pins, so check81* the schematics before using these.82*/83#define OMAP3_UART1_RX 0x15284#define OMAP3_UART2_RX 0x14a85#define OMAP3_UART3_RX 0x16e86#define OMAP4_UART2_RX 0xdc87#define OMAP4_UART3_RX 0x10488#define OMAP4_UART4_RX 0x11c8990#endif91929394