Path: blob/main/sys/contrib/edk2/Include/Protocol/Cpu.h
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/** @file1CPU Architectural Protocol as defined in PI spec Volume 2 DXE23This code abstracts the DXE core from processor implementation details.45Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>6SPDX-License-Identifier: BSD-2-Clause-Patent78**/910#ifndef __ARCH_PROTOCOL_CPU_H__11#define __ARCH_PROTOCOL_CPU_H__1213#include <Protocol/DebugSupport.h>1415#define EFI_CPU_ARCH_PROTOCOL_GUID \16{ 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }1718typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL;1920///21/// The type of flush operation22///23typedef enum {24EfiCpuFlushTypeWriteBackInvalidate,25EfiCpuFlushTypeWriteBack,26EfiCpuFlushTypeInvalidate,27EfiCpuMaxFlushType28} EFI_CPU_FLUSH_TYPE;2930///31/// The type of processor INIT.32///33typedef enum {34EfiCpuInit,35EfiCpuMaxInitType36} EFI_CPU_INIT_TYPE;3738/**39EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.4041@param InterruptType Defines the type of interrupt or exception that42occurred on the processor.This parameter is processor architecture specific.43@param SystemContext A pointer to the processor context when44the interrupt occurred on the processor.4546@return None4748**/49typedef50VOID51(EFIAPI *EFI_CPU_INTERRUPT_HANDLER)(52IN CONST EFI_EXCEPTION_TYPE InterruptType,53IN CONST EFI_SYSTEM_CONTEXT SystemContext54);5556/**57This function flushes the range of addresses from Start to Start+Length58from the processor's data cache. If Start is not aligned to a cache line59boundary, then the bytes before Start to the preceding cache line boundary60are also flushed. If Start+Length is not aligned to a cache line boundary,61then the bytes past Start+Length to the end of the next cache line boundary62are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be63supported. If the data cache is fully coherent with all DMA operations, then64this function can just return EFI_SUCCESS. If the processor does not support65flushing a range of the data cache, then the entire data cache can be flushed.6667@param This The EFI_CPU_ARCH_PROTOCOL instance.68@param Start The beginning physical address to flush from the processor's data69cache.70@param Length The number of bytes to flush from the processor's data cache. This71function may flush more bytes than Length specifies depending upon72the granularity of the flush operation that the processor supports.73@param FlushType Specifies the type of flush operation to perform.7475@retval EFI_SUCCESS The address range from Start to Start+Length was flushed from76the processor's data cache.77@retval EFI_UNSUPPORTED The processor does not support the cache flush type specified78by FlushType.79@retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed80from the processor's data cache.8182**/83typedef84EFI_STATUS85(EFIAPI *EFI_CPU_FLUSH_DATA_CACHE)(86IN EFI_CPU_ARCH_PROTOCOL *This,87IN EFI_PHYSICAL_ADDRESS Start,88IN UINT64 Length,89IN EFI_CPU_FLUSH_TYPE FlushType90);9192/**93This function enables interrupt processing by the processor.9495@param This The EFI_CPU_ARCH_PROTOCOL instance.9697@retval EFI_SUCCESS Interrupts are enabled on the processor.98@retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.99100**/101typedef102EFI_STATUS103(EFIAPI *EFI_CPU_ENABLE_INTERRUPT)(104IN EFI_CPU_ARCH_PROTOCOL *This105);106107/**108This function disables interrupt processing by the processor.109110@param This The EFI_CPU_ARCH_PROTOCOL instance.111112@retval EFI_SUCCESS Interrupts are disabled on the processor.113@retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.114115**/116typedef117EFI_STATUS118(EFIAPI *EFI_CPU_DISABLE_INTERRUPT)(119IN EFI_CPU_ARCH_PROTOCOL *This120);121122/**123This function retrieves the processor's current interrupt state a returns it in124State. If interrupts are currently enabled, then TRUE is returned. If interrupts125are currently disabled, then FALSE is returned.126127@param This The EFI_CPU_ARCH_PROTOCOL instance.128@param State A pointer to the processor's current interrupt state. Set to TRUE if129interrupts are enabled and FALSE if interrupts are disabled.130131@retval EFI_SUCCESS The processor's current interrupt state was returned in State.132@retval EFI_INVALID_PARAMETER State is NULL.133134**/135typedef136EFI_STATUS137(EFIAPI *EFI_CPU_GET_INTERRUPT_STATE)(138IN EFI_CPU_ARCH_PROTOCOL *This,139OUT BOOLEAN *State140);141142/**143This function generates an INIT on the processor. If this function succeeds, then the144processor will be reset, and control will not be returned to the caller. If InitType is145not supported by this processor, or the processor cannot programmatically generate an146INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error147occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.148149@param This The EFI_CPU_ARCH_PROTOCOL instance.150@param InitType The type of processor INIT to perform.151152@retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.153@retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported154by this processor.155@retval EFI_DEVICE_ERROR The processor INIT failed.156157**/158typedef159EFI_STATUS160(EFIAPI *EFI_CPU_INIT)(161IN EFI_CPU_ARCH_PROTOCOL *This,162IN EFI_CPU_INIT_TYPE InitType163);164165/**166This function registers and enables the handler specified by InterruptHandler for a processor167interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the168handler for the processor interrupt or exception type specified by InterruptType is uninstalled.169The installed handler is called once for each processor interrupt or exception.170171@param This The EFI_CPU_ARCH_PROTOCOL instance.172@param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts173are enabled and FALSE if interrupts are disabled.174@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called175when a processor interrupt occurs. If this parameter is NULL, then the handler176will be uninstalled.177178@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.179@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was180previously installed.181@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not182previously installed.183@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.184185**/186typedef187EFI_STATUS188(EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER)(189IN EFI_CPU_ARCH_PROTOCOL *This,190IN EFI_EXCEPTION_TYPE InterruptType,191IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler192);193194/**195This function reads the processor timer specified by TimerIndex and returns it in TimerValue.196197@param This The EFI_CPU_ARCH_PROTOCOL instance.198@param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter199must be between 0 and NumberOfTimers-1.200@param TimerValue Pointer to the returned timer value.201@param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment202of TimerValue. If TimerValue does not increment at a predictable rate, then 0 is203returned. This parameter is optional and may be NULL.204205@retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue.206@retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers.207@retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.208@retval EFI_UNSUPPORTED The processor does not have any readable timers.209210**/211typedef212EFI_STATUS213(EFIAPI *EFI_CPU_GET_TIMER_VALUE)(214IN EFI_CPU_ARCH_PROTOCOL *This,215IN UINT32 TimerIndex,216OUT UINT64 *TimerValue,217OUT UINT64 *TimerPeriod OPTIONAL218);219220/**221This function modifies the attributes for the memory region specified by BaseAddress and222Length from their current attributes to the attributes specified by Attributes.223224@param This The EFI_CPU_ARCH_PROTOCOL instance.225@param BaseAddress The physical address that is the start address of a memory region.226@param Length The size in bytes of the memory region.227@param Attributes The bit mask of attributes to set for the memory region.228229@retval EFI_SUCCESS The attributes were set for the memory region.230@retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by231BaseAddress and Length cannot be modified.232@retval EFI_INVALID_PARAMETER Length is zero.233Attributes specified an illegal combination of attributes that234cannot be set together.235@retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of236the memory resource range.237@retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory238resource range specified by BaseAddress and Length.239The bit mask of attributes is not support for the memory resource240range specified by BaseAddress and Length.241242**/243typedef244EFI_STATUS245(EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)(246IN EFI_CPU_ARCH_PROTOCOL *This,247IN EFI_PHYSICAL_ADDRESS BaseAddress,248IN UINT64 Length,249IN UINT64 Attributes250);251252///253/// The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE254/// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt255/// vectors and exception vectors, reading internal processor timers, resetting the processor, and256/// determining the processor frequency.257///258struct _EFI_CPU_ARCH_PROTOCOL {259EFI_CPU_FLUSH_DATA_CACHE FlushDataCache;260EFI_CPU_ENABLE_INTERRUPT EnableInterrupt;261EFI_CPU_DISABLE_INTERRUPT DisableInterrupt;262EFI_CPU_GET_INTERRUPT_STATE GetInterruptState;263EFI_CPU_INIT Init;264EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler;265EFI_CPU_GET_TIMER_VALUE GetTimerValue;266EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes;267///268/// The number of timers that are available in a processor. The value in this269/// field is a constant that must not be modified after the CPU Architectural270/// Protocol is installed. All consumers must treat this as a read-only field.271///272UINT32 NumberOfTimers;273///274/// The size, in bytes, of the alignment required for DMA buffer allocations.275/// This is typically the size of the largest data cache line in the platform.276/// The value in this field is a constant that must not be modified after the277/// CPU Architectural Protocol is installed. All consumers must treat this as278/// a read-only field.279///280UINT32 DmaBufferAlignment;281};282283extern EFI_GUID gEfiCpuArchProtocolGuid;284285#endif286287288