Path: blob/main/sys/contrib/edk2/Include/Uefi/UefiPxe.h
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/** @file1This header file contains all of the PXE type definitions,2structure prototypes, global variables and constants that3are needed for porting PXE to EFI.45Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>6SPDX-License-Identifier: BSD-2-Clause-Patent78@par Revision Reference:932/64-bit PXE specification:10alpha-4, 99-Dec-17.1112**/1314#ifndef __EFI_PXE_H__15#define __EFI_PXE_H__1617#pragma pack(1)1819#define PXE_BUSTYPE(a, b, c, d) \20( \21(((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \22((PXE_UINT32) (a) & 0xFF) \23)2425///26/// UNDI ROM ID and devive ID signature.27///28#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')2930///31/// BUS ROM ID signatures.32///33#define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')34#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')35#define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')36#define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')3738#define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))3940#define PXE_SWAP_UINT32(n) \41((((PXE_UINT32)(n) & 0x000000FF) << 24) | \42(((PXE_UINT32)(n) & 0x0000FF00) << 8) | \43(((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \44(((PXE_UINT32)(n) & 0xFF000000) >> 24))4546#define PXE_SWAP_UINT64(n) \47((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \48(((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \49(((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \50(((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8) | \51(((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8) | \52(((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \53(((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \54(((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))5556#define PXE_CPBSIZE_NOT_USED 0 ///< zero57#define PXE_DBSIZE_NOT_USED 0 ///< zero58#define PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 ///< zero59#define PXE_DBADDR_NOT_USED (PXE_UINT64) 0 ///< zero60#define PXE_CONST CONST6162#define PXE_VOLATILE volatile6364typedef VOID PXE_VOID;65typedef UINT8 PXE_UINT8;66typedef UINT16 PXE_UINT16;67typedef UINT32 PXE_UINT32;68typedef UINTN PXE_UINTN;6970///71/// Typedef unsigned long PXE_UINT64.72///73typedef UINT64 PXE_UINT64;7475typedef PXE_UINT8 PXE_BOOL;76#define PXE_FALSE 0 ///< zero77#define PXE_TRUE (!PXE_FALSE)7879typedef PXE_UINT16 PXE_OPCODE;8081///82/// Return UNDI operational state.83///84#define PXE_OPCODE_GET_STATE 0x00008586///87/// Change UNDI operational state from Stopped to Started.88///89#define PXE_OPCODE_START 0x00019091///92/// Change UNDI operational state from Started to Stopped.93///94#define PXE_OPCODE_STOP 0x00029596///97/// Get UNDI initialization information.98///99#define PXE_OPCODE_GET_INIT_INFO 0x0003100101///102/// Get NIC configuration information.103///104#define PXE_OPCODE_GET_CONFIG_INFO 0x0004105106///107/// Changed UNDI operational state from Started to Initialized.108///109#define PXE_OPCODE_INITIALIZE 0x0005110111///112/// Re-initialize the NIC H/W.113///114#define PXE_OPCODE_RESET 0x0006115116///117/// Change the UNDI operational state from Initialized to Started.118///119#define PXE_OPCODE_SHUTDOWN 0x0007120121///122/// Read & change state of external interrupt enables.123///124#define PXE_OPCODE_INTERRUPT_ENABLES 0x0008125126///127/// Read & change state of packet receive filters.128///129#define PXE_OPCODE_RECEIVE_FILTERS 0x0009130131///132/// Read & change station MAC address.133///134#define PXE_OPCODE_STATION_ADDRESS 0x000A135136///137/// Read traffic statistics.138///139#define PXE_OPCODE_STATISTICS 0x000B140141///142/// Convert multicast IP address to multicast MAC address.143///144#define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C145146///147/// Read or change non-volatile storage on the NIC.148///149#define PXE_OPCODE_NVDATA 0x000D150151///152/// Get & clear interrupt status.153///154#define PXE_OPCODE_GET_STATUS 0x000E155156///157/// Fill media header in packet for transmit.158///159#define PXE_OPCODE_FILL_HEADER 0x000F160161///162/// Transmit packet(s).163///164#define PXE_OPCODE_TRANSMIT 0x0010165166///167/// Receive packet.168///169#define PXE_OPCODE_RECEIVE 0x0011170171///172/// Last valid PXE UNDI OpCode number.173///174#define PXE_OPCODE_LAST_VALID 0x0011175176typedef PXE_UINT16 PXE_OPFLAGS;177178#define PXE_OPFLAGS_NOT_USED 0x0000179180//181// //////////////////////////////////////182// UNDI Get State183//184// No OpFlags185186////////////////////////////////////////187// UNDI Start188//189// No OpFlags190191////////////////////////////////////////192// UNDI Stop193//194// No OpFlags195196////////////////////////////////////////197// UNDI Get Init Info198//199// No Opflags200201////////////////////////////////////////202// UNDI Get Config Info203//204// No Opflags205206///207/// UNDI Initialize208///209#define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001210#define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000211#define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001212213///214///215/// UNDI Reset216///217#define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001218#define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002219220///221/// UNDI Shutdown.222///223/// No OpFlags.224225///226/// UNDI Interrupt Enables.227///228///229/// Select whether to enable or disable external interrupt signals.230/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.231///232#define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000233#define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000234#define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000235#define PXE_OPFLAGS_INTERRUPT_READ 0x0000236237///238/// Enable receive interrupts. An external interrupt will be generated239/// after a complete non-error packet has been received.240///241#define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001242243///244/// Enable transmit interrupts. An external interrupt will be generated245/// after a complete non-error packet has been transmitted.246///247#define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002248249///250/// Enable command interrupts. An external interrupt will be generated251/// when command execution stops.252///253#define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004254255///256/// Generate software interrupt. Setting this bit generates an external257/// interrupt, if it is supported by the hardware.258///259#define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008260261///262/// UNDI Receive Filters.263///264///265/// Select whether to enable or disable receive filters.266/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.267///268#define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000269#define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000270#define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000271#define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000272273///274/// To reset the contents of the multicast MAC address filter list,275/// set this OpFlag:276///277#define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000278279///280/// Enable unicast packet receiving. Packets sent to the current station281/// MAC address will be received.282///283#define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001284285///286/// Enable broadcast packet receiving. Packets sent to the broadcast287/// MAC address will be received.288///289#define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002290291///292/// Enable filtered multicast packet receiving. Packets sent to any293/// of the multicast MAC addresses in the multicast MAC address filter294/// list will be received. If the filter list is empty, no multicast295///296#define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004297298///299/// Enable promiscuous packet receiving. All packets will be received.300///301#define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008302303///304/// Enable promiscuous multicast packet receiving. All multicast305/// packets will be received.306///307#define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010308309///310/// UNDI Station Address.311///312#define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000313#define PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000314#define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001315316///317/// UNDI Statistics.318///319#define PXE_OPFLAGS_STATISTICS_READ 0x0000320#define PXE_OPFLAGS_STATISTICS_RESET 0x0001321322///323/// UNDI MCast IP to MAC.324///325///326/// Identify the type of IP address in the CPB.327///328#define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003329#define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000330#define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001331332///333/// UNDI NvData.334///335///336/// Select the type of non-volatile data operation.337///338#define PXE_OPFLAGS_NVDATA_OPMASK 0x0001339#define PXE_OPFLAGS_NVDATA_READ 0x0000340#define PXE_OPFLAGS_NVDATA_WRITE 0x0001341342///343/// UNDI Get Status.344///345///346/// Return current interrupt status. This will also clear any interrupts347/// that are currently set. This can be used in a polling routine. The348/// interrupt flags are still set and cleared even when the interrupts349/// are disabled.350///351#define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001352353///354/// Return list of transmitted buffers for recycling. Transmit buffers355/// must not be changed or unallocated until they have recycled. After356/// issuing a transmit command, wait for a transmit complete interrupt.357/// When a transmit complete interrupt is received, read the transmitted358/// buffers. Do not plan on getting one buffer per interrupt. Some359/// NICs and UNDIs may transmit multiple buffers per interrupt.360///361#define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002362363///364/// Return current media status.365///366#define PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004367368///369/// UNDI Fill Header.370///371#define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001372#define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001373#define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000374375///376/// UNDI Transmit.377///378///379/// S/W UNDI only. Return after the packet has been transmitted. A380/// transmit complete interrupt will still be generated and the transmit381/// buffer will have to be recycled.382///383#define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001384#define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001385#define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000386387#define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002388#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002389#define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000390391///392/// UNDI Receive.393///394/// No OpFlags.395///396397///398/// PXE STATFLAGS.399///400typedef PXE_UINT16 PXE_STATFLAGS;401402#define PXE_STATFLAGS_INITIALIZE 0x0000403404///405/// Common StatFlags that can be returned by all commands.406///407///408/// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be409/// implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs410/// that support command queuing.411///412#define PXE_STATFLAGS_STATUS_MASK 0xC000413#define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000414#define PXE_STATFLAGS_COMMAND_FAILED 0x8000415#define PXE_STATFLAGS_COMMAND_QUEUED 0x4000416417///418/// UNDI Get State.419///420#define PXE_STATFLAGS_GET_STATE_MASK 0x0003421#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002422#define PXE_STATFLAGS_GET_STATE_STARTED 0x0001423#define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000424425///426/// UNDI Start.427///428/// No additional StatFlags.429///430431///432/// UNDI Get Init Info.433///434#define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001435#define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000436#define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001437438#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_MASK 0x0002439#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_NOT_SUPPORTED 0x0000440#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_SUPPORTED 0x0002441442///443/// UNDI Initialize.444///445#define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001446447///448/// UNDI Reset.449///450#define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001451452///453/// UNDI Shutdown.454///455/// No additional StatFlags.456457///458/// UNDI Interrupt Enables.459///460///461/// If set, receive interrupts are enabled.462///463#define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001464465///466/// If set, transmit interrupts are enabled.467///468#define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002469470///471/// If set, command interrupts are enabled.472///473#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004474475///476/// UNDI Receive Filters.477///478479///480/// If set, unicast packets will be received.481///482#define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001483484///485/// If set, broadcast packets will be received.486///487#define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002488489///490/// If set, multicast packets that match up with the multicast address491/// filter list will be received.492///493#define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004494495///496/// If set, all packets will be received.497///498#define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008499500///501/// If set, all multicast packets will be received.502///503#define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010504505///506/// UNDI Station Address.507///508/// No additional StatFlags.509///510511///512/// UNDI Statistics.513///514/// No additional StatFlags.515///516517///518//// UNDI MCast IP to MAC.519////520//// No additional StatFlags.521522///523/// UNDI NvData.524///525/// No additional StatFlags.526///527528///529/// UNDI Get Status.530///531532///533/// Use to determine if an interrupt has occurred.534///535#define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F536#define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000537538///539/// If set, at least one receive interrupt occurred.540///541#define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001542543///544/// If set, at least one transmit interrupt occurred.545///546#define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002547548///549/// If set, at least one command interrupt occurred.550///551#define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004552553///554/// If set, at least one software interrupt occurred.555///556#define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008557558///559/// This flag is set if the transmitted buffer queue is empty. This flag560/// will be set if all transmitted buffer addresses get written into the DB.561///562#define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010563564///565/// This flag is set if no transmitted buffer addresses were written566/// into the DB. (This could be because DBsize was too small.)567///568#define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020569570///571/// This flag is set if there is no media detected.572///573#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA 0x0040574575///576/// UNDI Fill Header.577///578/// No additional StatFlags.579///580581///582/// UNDI Transmit.583///584/// No additional StatFlags.585586///587/// UNDI Receive588/// .589590///591/// No additional StatFlags.592///593typedef PXE_UINT16 PXE_STATCODE;594595#define PXE_STATCODE_INITIALIZE 0x0000596597///598/// Common StatCodes returned by all UNDI commands, UNDI protocol functions599/// and BC protocol functions.600///601#define PXE_STATCODE_SUCCESS 0x0000602603#define PXE_STATCODE_INVALID_CDB 0x0001604#define PXE_STATCODE_INVALID_CPB 0x0002605#define PXE_STATCODE_BUSY 0x0003606#define PXE_STATCODE_QUEUE_FULL 0x0004607#define PXE_STATCODE_ALREADY_STARTED 0x0005608#define PXE_STATCODE_NOT_STARTED 0x0006609#define PXE_STATCODE_NOT_SHUTDOWN 0x0007610#define PXE_STATCODE_ALREADY_INITIALIZED 0x0008611#define PXE_STATCODE_NOT_INITIALIZED 0x0009612#define PXE_STATCODE_DEVICE_FAILURE 0x000A613#define PXE_STATCODE_NVDATA_FAILURE 0x000B614#define PXE_STATCODE_UNSUPPORTED 0x000C615#define PXE_STATCODE_BUFFER_FULL 0x000D616#define PXE_STATCODE_INVALID_PARAMETER 0x000E617#define PXE_STATCODE_INVALID_UNDI 0x000F618#define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010619#define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011620#define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012621#define PXE_STATCODE_NO_DATA 0x0013622623typedef PXE_UINT16 PXE_IFNUM;624625///626/// This interface number must be passed to the S/W UNDI Start command.627///628#define PXE_IFNUM_START 0x0000629630///631/// This interface number is returned by the S/W UNDI Get State and632/// Start commands if information in the CDB, CPB or DB is invalid.633///634#define PXE_IFNUM_INVALID 0x0000635636typedef PXE_UINT16 PXE_CONTROL;637638///639/// Setting this flag directs the UNDI to queue this command for later640/// execution if the UNDI is busy and it supports command queuing.641/// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error642/// is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL643/// error is returned.644///645#define PXE_CONTROL_QUEUE_IF_BUSY 0x0002646647///648/// These two bit values are used to determine if there are more UNDI649/// CDB structures following this one. If the link bit is set, there650/// must be a CDB structure following this one. Execution will start651/// on the next CDB structure as soon as this one completes successfully.652/// If an error is generated by this command, execution will stop.653///654#define PXE_CONTROL_LINK 0x0001655#define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000656657typedef PXE_UINT8 PXE_FRAME_TYPE;658659#define PXE_FRAME_TYPE_NONE 0x00660#define PXE_FRAME_TYPE_UNICAST 0x01661#define PXE_FRAME_TYPE_BROADCAST 0x02662#define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03663#define PXE_FRAME_TYPE_PROMISCUOUS 0x04664#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05665666#define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST667668typedef PXE_UINT32 PXE_IPV4;669670typedef PXE_UINT32 PXE_IPV6[4];671#define PXE_MAC_LENGTH 32672673typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];674675typedef PXE_UINT8 PXE_IFTYPE;676typedef UINT16 PXE_MEDIA_PROTOCOL;677678///679/// This information is from the ARP section of RFC 1700.680///681/// 1 Ethernet (10Mb) [JBP]682/// 2 Experimental Ethernet (3Mb) [JBP]683/// 3 Amateur Radio AX.25 [PXK]684/// 4 Proteon ProNET Token Ring [JBP]685/// 5 Chaos [GXP]686/// 6 IEEE 802 Networks [JBP]687/// 7 ARCNET [JBP]688/// 8 Hyperchannel [JBP]689/// 9 Lanstar [TU]690/// 10 Autonet Short Address [MXB1]691/// 11 LocalTalk [JKR1]692/// 12 LocalNet (IBM* PCNet or SYTEK* LocalNET) [JXM]693/// 13 Ultra link [RXD2]694/// 14 SMDS [GXC1]695/// 15 Frame Relay [AGM]696/// 16 Asynchronous Transmission Mode (ATM) [JXB2]697/// 17 HDLC [JBP]698/// 18 Fibre Channel [Yakov Rekhter]699/// 19 Asynchronous Transmission Mode (ATM) [Mark Laubach]700/// 20 Serial Line [JBP]701/// 21 Asynchronous Transmission Mode (ATM) [MXB1]702///703/// * Other names and brands may be claimed as the property of others.704///705#define PXE_IFTYPE_ETHERNET 0x01706#define PXE_IFTYPE_TOKENRING 0x04707#define PXE_IFTYPE_FIBRE_CHANNEL 0x12708709typedef struct s_pxe_hw_undi {710PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.711PXE_UINT8 Len; ///< sizeof(PXE_HW_UNDI).712PXE_UINT8 Fudge; ///< makes 8-bit cksum equal zero.713PXE_UINT8 Rev; ///< PXE_ROMID_REV.714PXE_UINT8 IFcnt; ///< physical connector count lower byte.715PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.716PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.717PXE_UINT8 IFcntExt; ///< physical connector count upper byte.718PXE_UINT8 reserved; ///< zero, not used.719PXE_UINT32 Implementation; ///< implementation flags.720///< reserved ///< vendor use.721///< UINT32 Status; ///< status port.722///< UINT32 Command; ///< command port.723///< UINT64 CDBaddr; ///< CDB address port.724///<725} PXE_HW_UNDI;726727///728/// Status port bit definitions.729///730731///732/// UNDI operation state.733///734#define PXE_HWSTAT_STATE_MASK 0xC0000000735#define PXE_HWSTAT_BUSY 0xC0000000736#define PXE_HWSTAT_INITIALIZED 0x80000000737#define PXE_HWSTAT_STARTED 0x40000000738#define PXE_HWSTAT_STOPPED 0x00000000739740///741/// If set, last command failed.742///743#define PXE_HWSTAT_COMMAND_FAILED 0x20000000744745///746/// If set, identifies enabled receive filters.747///748#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000749#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800750#define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400751#define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200752#define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100753754///755/// If set, identifies enabled external interrupts.756///757#define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080758#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040759#define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020760#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010761762///763/// If set, identifies pending interrupts.764///765#define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008766#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004767#define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002768#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001769770///771/// Command port definitions.772///773774///775/// If set, CDB identified in CDBaddr port is given to UNDI.776/// If not set, other bits in this word will be processed.777///778#define PXE_HWCMD_ISSUE_COMMAND 0x80000000779#define PXE_HWCMD_INTS_AND_FILTS 0x00000000780781///782/// Use these to enable/disable receive filters.783///784#define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000785#define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800786#define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400787#define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200788#define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100789790///791/// Use these to enable/disable external interrupts.792///793#define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080794#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040795#define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020796#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010797798///799/// Use these to clear pending external interrupts.800///801#define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008802#define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004803#define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002804#define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001805806typedef struct s_pxe_sw_undi {807PXE_UINT32 Signature; ///< PXE_ROMID_SIGNATURE.808PXE_UINT8 Len; ///< sizeof(PXE_SW_UNDI).809PXE_UINT8 Fudge; ///< makes 8-bit cksum zero.810PXE_UINT8 Rev; ///< PXE_ROMID_REV.811PXE_UINT8 IFcnt; ///< physical connector count lower byte.812PXE_UINT8 MajorVer; ///< PXE_ROMID_MAJORVER.813PXE_UINT8 MinorVer; ///< PXE_ROMID_MINORVER.814PXE_UINT8 IFcntExt; ///< physical connector count upper byte.815PXE_UINT8 reserved1; ///< zero, not used.816PXE_UINT32 Implementation; ///< Implementation flags.817PXE_UINT64 EntryPoint; ///< API entry point.818PXE_UINT8 reserved2[3]; ///< zero, not used.819PXE_UINT8 BusCnt; ///< number of bustypes supported.820PXE_UINT32 BusType[1]; ///< list of supported bustypes.821} PXE_SW_UNDI;822823typedef union u_pxe_undi {824PXE_HW_UNDI hw;825PXE_SW_UNDI sw;826} PXE_UNDI;827828///829/// Signature of !PXE structure.830///831#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')832833///834/// !PXE structure format revision835/// .836#define PXE_ROMID_REV 0x02837838///839/// UNDI command interface revision. These are the values that get sent840/// in option 94 (Client Network Interface Identifier) in the DHCP Discover841/// and PXE Boot Server Request packets.842///843#define PXE_ROMID_MAJORVER 0x03844#define PXE_ROMID_MINORVER 0x01845846///847/// Implementation flags.848///849#define PXE_ROMID_IMP_HW_UNDI 0x80000000850#define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000851#define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000852#define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000853#define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000854#define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000855#define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000856#define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00857#define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00858#define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800859#define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400860#define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000861#define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200862#define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100863#define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080864#define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040865#define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020866#define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010867#define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008868#define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004869#define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002870#define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001871872typedef struct s_pxe_cdb {873PXE_OPCODE OpCode;874PXE_OPFLAGS OpFlags;875PXE_UINT16 CPBsize;876PXE_UINT16 DBsize;877PXE_UINT64 CPBaddr;878PXE_UINT64 DBaddr;879PXE_STATCODE StatCode;880PXE_STATFLAGS StatFlags;881PXE_UINT16 IFnum;882PXE_CONTROL Control;883} PXE_CDB;884885typedef union u_pxe_ip_addr {886PXE_IPV6 IPv6;887PXE_IPV4 IPv4;888} PXE_IP_ADDR;889890typedef union pxe_device {891///892/// PCI and PC Card NICs are both identified using bus, device893/// and function numbers. For PC Card, this may require PC894/// Card services to be loaded in the BIOS or preboot895/// environment.896///897struct {898///899/// See S/W UNDI ROMID structure definition for PCI and900/// PCC BusType definitions.901///902PXE_UINT32 BusType;903904///905/// Bus, device & function numbers that locate this device.906///907PXE_UINT16 Bus;908PXE_UINT8 Device;909PXE_UINT8 Function;910} PCI, PCC;911} PXE_DEVICE;912913///914/// cpb and db definitions915///916#define MAX_PCI_CONFIG_LEN 64 ///< # of dwords.917#define MAX_EEPROM_LEN 128 ///< # of dwords.918#define MAX_XMIT_BUFFERS 32 ///< recycling Q length for xmit_done.919#define MAX_MCAST_ADDRESS_CNT 8920921typedef struct s_pxe_cpb_start_30 {922///923/// PXE_VOID Delay(UINTN microseconds);924///925/// UNDI will never request a delay smaller than 10 microseconds926/// and will always request delays in increments of 10 microseconds.927/// The Delay() CallBack routine must delay between n and n + 10928/// microseconds before returning control to the UNDI.929///930/// This field cannot be set to zero.931///932UINT64 Delay;933934///935/// PXE_VOID Block(UINT32 enable);936///937/// UNDI may need to block multi-threaded/multi-processor access to938/// critical code sections when programming or accessing the network939/// device. To this end, a blocking service is needed by the UNDI.940/// When UNDI needs a block, it will call Block() passing a non-zero941/// value. When UNDI no longer needs a block, it will call Block()942/// with a zero value. When called, if the Block() is already enabled,943/// do not return control to the UNDI until the previous Block() is944/// disabled.945///946/// This field cannot be set to zero.947///948UINT64 Block;949950///951/// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);952///953/// UNDI will pass the virtual address of a buffer and the virtual954/// address of a 64-bit physical buffer. Convert the virtual address955/// to a physical address and write the result to the physical address956/// buffer. If virtual and physical addresses are the same, just957/// copy the virtual address to the physical address buffer.958///959/// This field can be set to zero if virtual and physical addresses960/// are equal.961///962UINT64 Virt2Phys;963///964/// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,965/// UINT64 buf_addr);966///967/// UNDI will read or write the device io space using this call back968/// function. It passes the number of bytes as the len parameter and it969/// will be either 1,2,4 or 8.970///971/// This field can not be set to zero.972///973UINT64 Mem_IO;974} PXE_CPB_START_30;975976typedef struct s_pxe_cpb_start_31 {977///978/// PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);979///980/// UNDI will never request a delay smaller than 10 microseconds981/// and will always request delays in increments of 10 microseconds.982/// The Delay() CallBack routine must delay between n and n + 10983/// microseconds before returning control to the UNDI.984///985/// This field cannot be set to zero.986///987UINT64 Delay;988989///990/// PXE_VOID Block(UINT64 unq_id, UINT32 enable);991///992/// UNDI may need to block multi-threaded/multi-processor access to993/// critical code sections when programming or accessing the network994/// device. To this end, a blocking service is needed by the UNDI.995/// When UNDI needs a block, it will call Block() passing a non-zero996/// value. When UNDI no longer needs a block, it will call Block()997/// with a zero value. When called, if the Block() is already enabled,998/// do not return control to the UNDI until the previous Block() is999/// disabled.1000///1001/// This field cannot be set to zero.1002///1003UINT64 Block;10041005///1006/// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);1007///1008/// UNDI will pass the virtual address of a buffer and the virtual1009/// address of a 64-bit physical buffer. Convert the virtual address1010/// to a physical address and write the result to the physical address1011/// buffer. If virtual and physical addresses are the same, just1012/// copy the virtual address to the physical address buffer.1013///1014/// This field can be set to zero if virtual and physical addresses1015/// are equal.1016///1017UINT64 Virt2Phys;1018///1019/// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,1020/// UINT64 buf_addr);1021///1022/// UNDI will read or write the device io space using this call back1023/// function. It passes the number of bytes as the len parameter and it1024/// will be either 1,2,4 or 8.1025///1026/// This field can not be set to zero.1027///1028UINT64 Mem_IO;1029///1030/// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,1031/// UINT32 Direction, UINT64 mapped_addr);1032///1033/// UNDI will pass the virtual address of a buffer, direction of the data1034/// flow from/to the mapped buffer (the constants are defined below)1035/// and a place holder (pointer) for the mapped address.1036/// This call will Map the given address to a physical DMA address and write1037/// the result to the mapped_addr pointer. If there is no need to1038/// map the given address to a lower address (i.e. the given address is1039/// associated with a physical address that is already compatible to be1040/// used with the DMA, it converts the given virtual address to it's1041/// physical address and write that in the mapped address pointer.1042///1043/// This field can be set to zero if there is no mapping service available.1044///1045UINT64 Map_Mem;10461047///1048/// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,1049/// UINT32 Direction, UINT64 mapped_addr);1050///1051/// UNDI will pass the virtual and mapped addresses of a buffer.1052/// This call will un map the given address.1053///1054/// This field can be set to zero if there is no unmapping service available.1055///1056UINT64 UnMap_Mem;10571058///1059/// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,1060/// UINT32 size, UINT32 Direction, UINT64 mapped_addr);1061///1062/// UNDI will pass the virtual and mapped addresses of a buffer.1063/// This call will synchronize the contents of both the virtual and mapped.1064/// buffers for the given Direction.1065///1066/// This field can be set to zero if there is no service available.1067///1068UINT64 Sync_Mem;10691070///1071/// protocol driver can provide anything for this Unique_ID, UNDI remembers1072/// that as just a 64bit value associated to the interface specified by1073/// the ifnum and gives it back as a parameter to all the call-back routines1074/// when calling for that interface!1075///1076UINT64 Unique_ID;1077} PXE_CPB_START_31;10781079#define TO_AND_FROM_DEVICE 01080#define FROM_DEVICE 11081#define TO_DEVICE 210821083#define PXE_DELAY_MILLISECOND 10001084#define PXE_DELAY_SECOND 10000001085#define PXE_IO_READ 01086#define PXE_IO_WRITE 11087#define PXE_MEM_READ 21088#define PXE_MEM_WRITE 410891090typedef struct s_pxe_db_get_init_info {1091///1092/// Minimum length of locked memory buffer that must be given to1093/// the Initialize command. Giving UNDI more memory will generally1094/// give better performance.1095///1096/// If MemoryRequired is zero, the UNDI does not need and will not1097/// use system memory to receive and transmit packets.1098///1099PXE_UINT32 MemoryRequired;11001101///1102/// Maximum frame data length for Tx/Rx excluding the media header.1103///1104PXE_UINT32 FrameDataLen;11051106///1107/// Supported link speeds are in units of mega bits. Common ethernet1108/// values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero1109/// filled.1110///1111PXE_UINT32 LinkSpeeds[4];11121113///1114/// Number of non-volatile storage items.1115///1116PXE_UINT32 NvCount;11171118///1119/// Width of non-volatile storage item in bytes. 0, 1, 2 or 41120///1121PXE_UINT16 NvWidth;11221123///1124/// Media header length. This is the typical media header length for1125/// this UNDI. This information is needed when allocating receive1126/// and transmit buffers.1127///1128PXE_UINT16 MediaHeaderLen;11291130///1131/// Number of bytes in the NIC hardware (MAC) address.1132///1133PXE_UINT16 HWaddrLen;11341135///1136/// Maximum number of multicast MAC addresses in the multicast1137/// MAC address filter list.1138///1139PXE_UINT16 MCastFilterCnt;11401141///1142/// Default number and size of transmit and receive buffers that will1143/// be allocated by the UNDI. If MemoryRequired is non-zero, this1144/// allocation will come out of the memory buffer given to the Initialize1145/// command. If MemoryRequired is zero, this allocation will come out of1146/// memory on the NIC.1147///1148PXE_UINT16 TxBufCnt;1149PXE_UINT16 TxBufSize;1150PXE_UINT16 RxBufCnt;1151PXE_UINT16 RxBufSize;11521153///1154/// Hardware interface types defined in the Assigned Numbers RFC1155/// and used in DHCP and ARP packets.1156/// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.1157///1158PXE_UINT8 IFtype;11591160///1161/// Supported duplex. See PXE_DUPLEX_xxxxx #defines below.1162///1163PXE_UINT8 SupportedDuplexModes;11641165///1166/// Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below.1167///1168PXE_UINT8 SupportedLoopBackModes;1169} PXE_DB_GET_INIT_INFO;11701171#define PXE_MAX_TXRX_UNIT_ETHER 150011721173#define PXE_HWADDR_LEN_ETHER 0x00061174#define PXE_MAC_HEADER_LEN_ETHER 0x000E11751176#define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 11177#define PXE_DUPLEX_FORCE_FULL_SUPPORTED 211781179#define PXE_LOOPBACK_INTERNAL_SUPPORTED 11180#define PXE_LOOPBACK_EXTERNAL_SUPPORTED 211811182typedef struct s_pxe_pci_config_info {1183///1184/// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.1185/// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.1186///1187UINT32 BusType;11881189///1190/// This identifies the PCI network device that this UNDI interface.1191/// is bound to.1192///1193UINT16 Bus;1194UINT8 Device;1195UINT8 Function;11961197///1198/// This is a copy of the PCI configuration space for this1199/// network device.1200///1201union {1202UINT8 Byte[256];1203UINT16 Word[128];1204UINT32 Dword[64];1205} Config;1206} PXE_PCI_CONFIG_INFO;12071208typedef struct s_pxe_pcc_config_info {1209///1210/// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.1211/// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.1212///1213PXE_UINT32 BusType;12141215///1216/// This identifies the PCC network device that this UNDI interface1217/// is bound to.1218///1219PXE_UINT16 Bus;1220PXE_UINT8 Device;1221PXE_UINT8 Function;12221223///1224/// This is a copy of the PCC configuration space for this1225/// network device.1226///1227union {1228PXE_UINT8 Byte[256];1229PXE_UINT16 Word[128];1230PXE_UINT32 Dword[64];1231} Config;1232} PXE_PCC_CONFIG_INFO;12331234typedef union u_pxe_db_get_config_info {1235PXE_PCI_CONFIG_INFO pci;1236PXE_PCC_CONFIG_INFO pcc;1237} PXE_DB_GET_CONFIG_INFO;12381239typedef struct s_pxe_cpb_initialize {1240///1241/// Address of first (lowest) byte of the memory buffer. This buffer must1242/// be in contiguous physical memory and cannot be swapped out. The UNDI1243/// will be using this for transmit and receive buffering.1244///1245PXE_UINT64 MemoryAddr;12461247///1248/// MemoryLength must be greater than or equal to MemoryRequired1249/// returned by the Get Init Info command.1250///1251PXE_UINT32 MemoryLength;12521253///1254/// Desired link speed in Mbit/sec. Common ethernet values are 10, 1001255/// and 1000. Setting a value of zero will auto-detect and/or use the1256/// default link speed (operation depends on UNDI/NIC functionality).1257///1258PXE_UINT32 LinkSpeed;12591260///1261/// Suggested number and size of receive and transmit buffers to1262/// allocate. If MemoryAddr and MemoryLength are non-zero, this1263/// allocation comes out of the supplied memory buffer. If MemoryAddr1264/// and MemoryLength are zero, this allocation comes out of memory1265/// on the NIC.1266///1267/// If these fields are set to zero, the UNDI will allocate buffer1268/// counts and sizes as it sees fit.1269///1270PXE_UINT16 TxBufCnt;1271PXE_UINT16 TxBufSize;1272PXE_UINT16 RxBufCnt;1273PXE_UINT16 RxBufSize;12741275///1276/// The following configuration parameters are optional and must be zero1277/// to use the default values.1278///1279PXE_UINT8 DuplexMode;12801281PXE_UINT8 LoopBackMode;1282} PXE_CPB_INITIALIZE;12831284#define PXE_DUPLEX_DEFAULT 0x001285#define PXE_FORCE_FULL_DUPLEX 0x011286#define PXE_ENABLE_FULL_DUPLEX 0x021287#define PXE_FORCE_HALF_DUPLEX 0x041288#define PXE_DISABLE_FULL_DUPLEX 0x0812891290#define LOOPBACK_NORMAL 01291#define LOOPBACK_INTERNAL 11292#define LOOPBACK_EXTERNAL 212931294typedef struct s_pxe_db_initialize {1295///1296/// Actual amount of memory used from the supplied memory buffer. This1297/// may be less that the amount of memory suppllied and may be zero if1298/// the UNDI and network device do not use external memory buffers.1299///1300/// Memory used by the UNDI and network device is allocated from the1301/// lowest memory buffer address.1302///1303PXE_UINT32 MemoryUsed;13041305///1306/// Actual number and size of receive and transmit buffers that were1307/// allocated.1308///1309PXE_UINT16 TxBufCnt;1310PXE_UINT16 TxBufSize;1311PXE_UINT16 RxBufCnt;1312PXE_UINT16 RxBufSize;1313} PXE_DB_INITIALIZE;13141315typedef struct s_pxe_cpb_receive_filters {1316///1317/// List of multicast MAC addresses. This list, if present, will1318/// replace the existing multicast MAC address filter list.1319///1320PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];1321} PXE_CPB_RECEIVE_FILTERS;13221323typedef struct s_pxe_db_receive_filters {1324///1325/// Filtered multicast MAC address list.1326///1327PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];1328} PXE_DB_RECEIVE_FILTERS;13291330typedef struct s_pxe_cpb_station_address {1331///1332/// If supplied and supported, the current station MAC address1333/// will be changed.1334///1335PXE_MAC_ADDR StationAddr;1336} PXE_CPB_STATION_ADDRESS;13371338typedef struct s_pxe_dpb_station_address {1339///1340/// Current station MAC address.1341///1342PXE_MAC_ADDR StationAddr;13431344///1345/// Station broadcast MAC address.1346///1347PXE_MAC_ADDR BroadcastAddr;13481349///1350/// Permanent station MAC address.1351///1352PXE_MAC_ADDR PermanentAddr;1353} PXE_DB_STATION_ADDRESS;13541355typedef struct s_pxe_db_statistics {1356///1357/// Bit field identifying what statistic data is collected by the1358/// UNDI/NIC.1359/// If bit 0x00 is set, Data[0x00] is collected.1360/// If bit 0x01 is set, Data[0x01] is collected.1361/// If bit 0x20 is set, Data[0x20] is collected.1362/// If bit 0x21 is set, Data[0x21] is collected.1363/// Etc.1364///1365PXE_UINT64 Supported;13661367///1368/// Statistic data.1369///1370PXE_UINT64 Data[64];1371} PXE_DB_STATISTICS;13721373///1374/// Total number of frames received. Includes frames with errors and1375/// dropped frames.1376///1377#define PXE_STATISTICS_RX_TOTAL_FRAMES 0x0013781379///1380/// Number of valid frames received and copied into receive buffers.1381///1382#define PXE_STATISTICS_RX_GOOD_FRAMES 0x0113831384///1385/// Number of frames below the minimum length for the media.1386/// This would be <64 for ethernet.1387///1388#define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x0213891390///1391/// Number of frames longer than the maxminum length for the1392/// media. This would be >1500 for ethernet.1393///1394#define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x0313951396///1397/// Valid frames that were dropped because receive buffers were full.1398///1399#define PXE_STATISTICS_RX_DROPPED_FRAMES 0x0414001401///1402/// Number of valid unicast frames received and not dropped.1403///1404#define PXE_STATISTICS_RX_UNICAST_FRAMES 0x0514051406///1407/// Number of valid broadcast frames received and not dropped.1408///1409#define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x0614101411///1412/// Number of valid mutlicast frames received and not dropped.1413///1414#define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x0714151416///1417/// Number of frames w/ CRC or alignment errors.1418///1419#define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x0814201421///1422/// Total number of bytes received. Includes frames with errors1423/// and dropped frames.1424///1425#define PXE_STATISTICS_RX_TOTAL_BYTES 0x0914261427///1428/// Transmit statistics.1429///1430#define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A1431#define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B1432#define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C1433#define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D1434#define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E1435#define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F1436#define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x101437#define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x111438#define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x121439#define PXE_STATISTICS_TX_TOTAL_BYTES 0x1314401441///1442/// Number of collisions detection on this subnet.1443///1444#define PXE_STATISTICS_COLLISIONS 0x1414451446///1447/// Number of frames destined for unsupported protocol.1448///1449#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x1514501451///1452/// Number of valid frames received that were duplicated.1453///1454#define PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x1614551456///1457/// Number of encrypted frames received that failed to decrypt.1458///1459#define PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x1714601461///1462/// Number of frames that failed to transmit after exceeding the retry limit.1463///1464#define PXE_STATISTICS_TX_ERROR_FRAMES 0x1814651466///1467/// Number of frames transmitted successfully after more than one attempt.1468///1469#define PXE_STATISTICS_TX_RETRY_FRAMES 0x1914701471typedef struct s_pxe_cpb_mcast_ip_to_mac {1472///1473/// Multicast IP address to be converted to multicast MAC address.1474///1475PXE_IP_ADDR IP;1476} PXE_CPB_MCAST_IP_TO_MAC;14771478typedef struct s_pxe_db_mcast_ip_to_mac {1479///1480/// Multicast MAC address.1481///1482PXE_MAC_ADDR MAC;1483} PXE_DB_MCAST_IP_TO_MAC;14841485typedef struct s_pxe_cpb_nvdata_sparse {1486///1487/// NvData item list. Only items in this list will be updated.1488///1489struct {1490///1491/// Non-volatile storage address to be changed.1492///1493PXE_UINT32 Addr;14941495///1496/// Data item to write into above storage address.1497///1498union {1499PXE_UINT8 Byte;1500PXE_UINT16 Word;1501PXE_UINT32 Dword;1502} Data;1503} Item[MAX_EEPROM_LEN];1504} PXE_CPB_NVDATA_SPARSE;15051506///1507/// When using bulk update, the size of the CPB structure must be1508/// the same size as the non-volatile NIC storage.1509///1510typedef union u_pxe_cpb_nvdata_bulk {1511///1512/// Array of byte-wide data items.1513///1514PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];15151516///1517/// Array of word-wide data items.1518///1519PXE_UINT16 Word[MAX_EEPROM_LEN << 1];15201521///1522/// Array of dword-wide data items.1523///1524PXE_UINT32 Dword[MAX_EEPROM_LEN];1525} PXE_CPB_NVDATA_BULK;15261527typedef struct s_pxe_db_nvdata {1528///1529/// Arrays of data items from non-volatile storage.1530///1531union {1532///1533/// Array of byte-wide data items.1534///1535PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];15361537///1538/// Array of word-wide data items.1539///1540PXE_UINT16 Word[MAX_EEPROM_LEN << 1];15411542///1543/// Array of dword-wide data items.1544///1545PXE_UINT32 Dword[MAX_EEPROM_LEN];1546} Data;1547} PXE_DB_NVDATA;15481549typedef struct s_pxe_db_get_status {1550///1551/// Length of next receive frame (header + data). If this is zero,1552/// there is no next receive frame available.1553///1554PXE_UINT32 RxFrameLen;15551556///1557/// Reserved, set to zero.1558///1559PXE_UINT32 reserved;15601561///1562/// Addresses of transmitted buffers that need to be recycled.1563///1564PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];1565} PXE_DB_GET_STATUS;15661567typedef struct s_pxe_cpb_fill_header {1568///1569/// Source and destination MAC addresses. These will be copied into1570/// the media header without doing byte swapping.1571///1572PXE_MAC_ADDR SrcAddr;1573PXE_MAC_ADDR DestAddr;15741575///1576/// Address of first byte of media header. The first byte of packet data1577/// follows the last byte of the media header.1578///1579PXE_UINT64 MediaHeader;15801581///1582/// Length of packet data in bytes (not including the media header).1583///1584PXE_UINT32 PacketLen;15851586///1587/// Protocol type. This will be copied into the media header without1588/// doing byte swapping. Protocol type numbers can be obtained from1589/// the Assigned Numbers RFC 1700.1590///1591PXE_UINT16 Protocol;15921593///1594/// Length of the media header in bytes.1595///1596PXE_UINT16 MediaHeaderLen;1597} PXE_CPB_FILL_HEADER;15981599#define PXE_PROTOCOL_ETHERNET_IP 0x08001600#define PXE_PROTOCOL_ETHERNET_ARP 0x08061601#define MAX_XMIT_FRAGMENTS 1616021603typedef struct s_pxe_cpb_fill_header_fragmented {1604///1605/// Source and destination MAC addresses. These will be copied into1606/// the media header without doing byte swapping.1607///1608PXE_MAC_ADDR SrcAddr;1609PXE_MAC_ADDR DestAddr;16101611///1612/// Length of packet data in bytes (not including the media header).1613///1614PXE_UINT32 PacketLen;16151616///1617/// Protocol type. This will be copied into the media header without1618/// doing byte swapping. Protocol type numbers can be obtained from1619/// the Assigned Numbers RFC 1700.1620///1621PXE_MEDIA_PROTOCOL Protocol;16221623///1624/// Length of the media header in bytes.1625///1626PXE_UINT16 MediaHeaderLen;16271628///1629/// Number of packet fragment descriptors.1630///1631PXE_UINT16 FragCnt;16321633///1634/// Reserved, must be set to zero.1635///1636PXE_UINT16 reserved;16371638///1639/// Array of packet fragment descriptors. The first byte of the media1640/// header is the first byte of the first fragment.1641///1642struct {1643///1644/// Address of this packet fragment.1645///1646PXE_UINT64 FragAddr;16471648///1649/// Length of this packet fragment.1650///1651PXE_UINT32 FragLen;16521653///1654/// Reserved, must be set to zero.1655///1656PXE_UINT32 reserved;1657} FragDesc[MAX_XMIT_FRAGMENTS];1658} PXE_CPB_FILL_HEADER_FRAGMENTED;16591660typedef struct s_pxe_cpb_transmit {1661///1662/// Address of first byte of frame buffer. This is also the first byte1663/// of the media header.1664///1665PXE_UINT64 FrameAddr;16661667///1668/// Length of the data portion of the frame buffer in bytes. Do not1669/// include the length of the media header.1670///1671PXE_UINT32 DataLen;16721673///1674/// Length of the media header in bytes.1675///1676PXE_UINT16 MediaheaderLen;16771678///1679/// Reserved, must be zero.1680///1681PXE_UINT16 reserved;1682} PXE_CPB_TRANSMIT;16831684typedef struct s_pxe_cpb_transmit_fragments {1685///1686/// Length of packet data in bytes (not including the media header).1687///1688PXE_UINT32 FrameLen;16891690///1691/// Length of the media header in bytes.1692///1693PXE_UINT16 MediaheaderLen;16941695///1696/// Number of packet fragment descriptors.1697///1698PXE_UINT16 FragCnt;16991700///1701/// Array of frame fragment descriptors. The first byte of the first1702/// fragment is also the first byte of the media header.1703///1704struct {1705///1706/// Address of this frame fragment.1707///1708PXE_UINT64 FragAddr;17091710///1711/// Length of this frame fragment.1712///1713PXE_UINT32 FragLen;17141715///1716/// Reserved, must be set to zero.1717///1718PXE_UINT32 reserved;1719} FragDesc[MAX_XMIT_FRAGMENTS];1720} PXE_CPB_TRANSMIT_FRAGMENTS;17211722typedef struct s_pxe_cpb_receive {1723///1724/// Address of first byte of receive buffer. This is also the first byte1725/// of the frame header.1726///1727PXE_UINT64 BufferAddr;17281729///1730/// Length of receive buffer. This must be large enough to hold the1731/// received frame (media header + data). If the length of smaller than1732/// the received frame, data will be lost.1733///1734PXE_UINT32 BufferLen;17351736///1737/// Reserved, must be set to zero.1738///1739PXE_UINT32 reserved;1740} PXE_CPB_RECEIVE;17411742typedef struct s_pxe_db_receive {1743///1744/// Source and destination MAC addresses from media header.1745///1746PXE_MAC_ADDR SrcAddr;1747PXE_MAC_ADDR DestAddr;17481749///1750/// Length of received frame. May be larger than receive buffer size.1751/// The receive buffer will not be overwritten. This is how to tell1752/// if data was lost because the receive buffer was too small.1753///1754PXE_UINT32 FrameLen;17551756///1757/// Protocol type from media header.1758///1759PXE_MEDIA_PROTOCOL Protocol;17601761///1762/// Length of media header in received frame.1763///1764PXE_UINT16 MediaHeaderLen;17651766///1767/// Type of receive frame.1768///1769PXE_FRAME_TYPE Type;17701771///1772/// Reserved, must be zero.1773///1774PXE_UINT8 reserved[7];1775} PXE_DB_RECEIVE;17761777#pragma pack()17781779#endif178017811782