Path: blob/main/sys/contrib/ncsw/Peripherals/FM/MACSEC/fm_macsec_master.h
48420 views
/*1* Copyright 2008-2015 Freescale Semiconductor Inc.2*3* Redistribution and use in source and binary forms, with or without4* modification, are permitted provided that the following conditions are met:5* * Redistributions of source code must retain the above copyright6* notice, this list of conditions and the following disclaimer.7* * Redistributions in binary form must reproduce the above copyright8* notice, this list of conditions and the following disclaimer in the9* documentation and/or other materials provided with the distribution.10* * Neither the name of Freescale Semiconductor nor the11* names of its contributors may be used to endorse or promote products12* derived from this software without specific prior written permission.13*14*15* ALTERNATIVELY, this software may be distributed under the terms of the16* GNU General Public License ("GPL") as published by the Free Software17* Foundation, either version 2 of that License or (at your option) any18* later version.19*20* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY21* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED22* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE23* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY24* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES25* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;26* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND27* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT28* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS29* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.30*/3132/******************************************************************************33@File fm_macsec_master.h3435@Description FM MACSEC internal structures and definitions.36*//***************************************************************************/37#ifndef __FM_MACSEC_MASTER_H38#define __FM_MACSEC_MASTER_H3940#include "error_ext.h"41#include "std_ext.h"4243#include "fm_macsec.h"444546#define MACSEC_ICV_SIZE 1647#define MACSEC_SECTAG_SIZE 1648#define MACSEC_SCI_SIZE 849#define MACSEC_FCS_SIZE 45051/**************************************************************************//**52@Description Exceptions53*//***************************************************************************/5455#define FM_MACSEC_EX_TX_SC_0 0x8000000056#define FM_MACSEC_EX_TX_SC(sc) (FM_MACSEC_EX_TX_SC_0 >> (sc))57#define FM_MACSEC_EX_ECC 0x000000015859#define GET_EXCEPTION_FLAG(bitMask, exception, id) switch (exception){ \60case e_FM_MACSEC_EX_TX_SC: \61bitMask = FM_MACSEC_EX_TX_SC(id); break; \62case e_FM_MACSEC_EX_ECC: \63bitMask = FM_MACSEC_EX_ECC; break; \64default: bitMask = 0;break;}6566#define FM_MACSEC_USER_EX_SINGLE_BIT_ECC 0x8000000067#define FM_MACSEC_USER_EX_MULTI_BIT_ECC 0x400000006869#define GET_USER_EXCEPTION_FLAG(bitMask, exception) switch (exception){ \70case e_FM_MACSEC_EX_SINGLE_BIT_ECC: \71bitMask = FM_MACSEC_USER_EX_SINGLE_BIT_ECC; break; \72case e_FM_MACSEC_EX_MULTI_BIT_ECC: \73bitMask = FM_MACSEC_USER_EX_MULTI_BIT_ECC; break; \74default: bitMask = 0;break;}7576/**************************************************************************//**77@Description Events78*//***************************************************************************/7980#define FM_MACSEC_EV_TX_SC_0_NEXT_PN 0x8000000081#define FM_MACSEC_EV_TX_SC_NEXT_PN(sc) (FM_MACSEC_EV_TX_SC_0_NEXT_PN >> (sc))8283#define GET_EVENT_FLAG(bitMask, event, id) switch (event){ \84case e_FM_MACSEC_EV_TX_SC_NEXT_PN: \85bitMask = FM_MACSEC_EV_TX_SC_NEXT_PN(id); break; \86default: bitMask = 0;break;}8788/**************************************************************************//**89@Description Defaults90*//***************************************************************************/91#define DEFAULT_userExceptions (FM_MACSEC_USER_EX_SINGLE_BIT_ECC |\92FM_MACSEC_USER_EX_MULTI_BIT_ECC)9394#define DEFAULT_exceptions (FM_MACSEC_EX_TX_SC(0) |\95FM_MACSEC_EX_TX_SC(1) |\96FM_MACSEC_EX_TX_SC(2) |\97FM_MACSEC_EX_TX_SC(3) |\98FM_MACSEC_EX_TX_SC(4) |\99FM_MACSEC_EX_TX_SC(5) |\100FM_MACSEC_EX_TX_SC(6) |\101FM_MACSEC_EX_TX_SC(7) |\102FM_MACSEC_EX_TX_SC(8) |\103FM_MACSEC_EX_TX_SC(9) |\104FM_MACSEC_EX_TX_SC(10) |\105FM_MACSEC_EX_TX_SC(11) |\106FM_MACSEC_EX_TX_SC(12) |\107FM_MACSEC_EX_TX_SC(13) |\108FM_MACSEC_EX_TX_SC(14) |\109FM_MACSEC_EX_TX_SC(15) |\110FM_MACSEC_EX_ECC )111112#define DEFAULT_events (FM_MACSEC_EV_TX_SC_NEXT_PN(0) |\113FM_MACSEC_EV_TX_SC_NEXT_PN(1) |\114FM_MACSEC_EV_TX_SC_NEXT_PN(2) |\115FM_MACSEC_EV_TX_SC_NEXT_PN(3) |\116FM_MACSEC_EV_TX_SC_NEXT_PN(4) |\117FM_MACSEC_EV_TX_SC_NEXT_PN(5) |\118FM_MACSEC_EV_TX_SC_NEXT_PN(6) |\119FM_MACSEC_EV_TX_SC_NEXT_PN(7) |\120FM_MACSEC_EV_TX_SC_NEXT_PN(8) |\121FM_MACSEC_EV_TX_SC_NEXT_PN(9) |\122FM_MACSEC_EV_TX_SC_NEXT_PN(10) |\123FM_MACSEC_EV_TX_SC_NEXT_PN(11) |\124FM_MACSEC_EV_TX_SC_NEXT_PN(12) |\125FM_MACSEC_EV_TX_SC_NEXT_PN(13) |\126FM_MACSEC_EV_TX_SC_NEXT_PN(14) |\127FM_MACSEC_EV_TX_SC_NEXT_PN(15) )128129#define DEFAULT_unknownSciFrameTreatment e_FM_MACSEC_UNKNOWN_SCI_FRAME_TREATMENT_DISCARD_BOTH130#define DEFAULT_invalidTagsFrameTreatment FALSE131#define DEFAULT_encryptWithNoChangedTextFrameTreatment FALSE132#define DEFAULT_untagFrameTreatment e_FM_MACSEC_UNTAG_FRAME_TREATMENT_DELIVER_UNCONTROLLED_DISCARD_CONTROLLED133#define DEFAULT_changedTextWithNoEncryptFrameTreatment FALSE134#define DEFAULT_onlyScbIsSetFrameTreatment FALSE135#define DEFAULT_keysUnreadable FALSE136#define DEFAULT_normalMode TRUE137#define DEFAULT_sc0ReservedForPTP FALSE138#define DEFAULT_initNextPn 1139#define DEFAULT_pnExhThr 0xffffffff140#define DEFAULT_sectagOverhead (MACSEC_ICV_SIZE + MACSEC_SECTAG_SIZE)141#define DEFAULT_mflSubtract MACSEC_FCS_SIZE142143144/**************************************************************************//**145@Description Memory Mapped Registers146*//***************************************************************************/147148#if defined(__MWERKS__) && !defined(__GNUC__)149#pragma pack(push,1)150#endif /* defined(__MWERKS__) && ... */151152typedef _Packed struct153{154/* MACsec configuration */155volatile uint32_t cfg; /**< MACsec configuration */156volatile uint32_t et; /**< MACsec EtherType */157volatile uint8_t res1[56]; /**< reserved */158volatile uint32_t mfl; /**< Maximum Frame Length */159volatile uint32_t tpnet; /**< TX Packet Number exhaustion threshold */160volatile uint8_t res2[56]; /**< reserved */161volatile uint32_t rxsca; /**< RX SC access select */162volatile uint8_t res3[60]; /**< reserved */163volatile uint32_t txsca; /**< TX SC access select */164volatile uint8_t res4[60]; /**< reserved */165166/* RX configuration, status and statistic */167volatile uint32_t rxsci1h; /**< RX Secure Channel Identifier first half */168volatile uint32_t rxsci2h; /**< RX Secure Channel Identifier second half */169volatile uint8_t res5[8]; /**< reserved */170volatile uint32_t ifio1hs; /**< ifInOctets first half Statistic */171volatile uint32_t ifio2hs; /**< ifInOctets second half Statistic */172volatile uint32_t ifiups; /**< ifInUcastPkts Statistic */173volatile uint8_t res6[4]; /**< reserved */174volatile uint32_t ifimps; /**< ifInMulticastPkts Statistic */175volatile uint32_t ifibps; /**< ifInBroadcastPkts Statistic */176volatile uint32_t rxsccfg; /**< RX Secure Channel configuration */177volatile uint32_t rpw; /**< replayWindow */178volatile uint8_t res7[16]; /**< reserved */179volatile uint32_t inov1hs; /**< InOctetsValidated first half Statistic */180volatile uint32_t inov2hs; /**< InOctetsValidated second half Statistic */181volatile uint32_t inod1hs; /**< InOctetsDecrypted first half Statistic */182volatile uint32_t inod2hs; /**< InOctetsDecrypted second half Statistic */183volatile uint32_t rxscipus; /**< RX Secure Channel InPktsUnchecked Statistic */184volatile uint32_t rxscipds; /**< RX Secure Channel InPktsDelayed Statistic */185volatile uint32_t rxscipls; /**< RX Secure Channel InPktsLate Statistic */186volatile uint8_t res8[4]; /**< reserved */187volatile uint32_t rxaninuss[MAX_NUM_OF_SA_PER_SC]; /**< RX AN 0-3 InNotUsingSA Statistic */188volatile uint32_t rxanipuss[MAX_NUM_OF_SA_PER_SC]; /**< RX AN 0-3 InPktsUnusedSA Statistic */189_Packed struct190{191volatile uint32_t rxsacs; /**< RX Security Association configuration and status */192volatile uint32_t rxsanpn; /**< RX Security Association nextPN */193volatile uint32_t rxsalpn; /**< RX Security Association lowestPN */194volatile uint32_t rxsaipos; /**< RX Security Association InPktsOK Statistic */195volatile uint32_t rxsak[4]; /**< RX Security Association key (128 bit) */196volatile uint32_t rxsah[4]; /**< RX Security Association hash (128 bit) */197volatile uint32_t rxsaipis; /**< RX Security Association InPktsInvalid Statistic */198volatile uint32_t rxsaipnvs; /**< RX Security Association InPktsNotValid Statistic */199volatile uint8_t res9[8]; /**< reserved */200} _PackedType fmMacsecRxScSa[NUM_OF_SA_PER_RX_SC];201202/* TX configuration, status and statistic */203volatile uint32_t txsci1h; /**< TX Secure Channel Identifier first half */204volatile uint32_t txsci2h; /**< TX Secure Channel Identifier second half */205volatile uint8_t res10[8]; /**< reserved */206volatile uint32_t ifoo1hs; /**< ifOutOctets first half Statistic */207volatile uint32_t ifoo2hs; /**< ifOutOctets second half Statistic */208volatile uint32_t ifoups; /**< ifOutUcastPkts Statistic */209volatile uint32_t opus; /**< OutPktsUntagged Statistic */210volatile uint32_t ifomps; /**< ifOutMulticastPkts Statistic */211volatile uint32_t ifobps; /**< ifOutBroadcastPkts Statistic */212volatile uint32_t txsccfg; /**< TX Secure Channel configuration */213volatile uint32_t optls; /**< OutPktsTooLong Statistic */214volatile uint8_t res11[16]; /**< reserved */215volatile uint32_t oop1hs; /**< OutOctetsProtected first half Statistic */216volatile uint32_t oop2hs; /**< OutOctetsProtected second half Statistic */217volatile uint32_t ooe1hs; /**< OutOctetsEncrypted first half Statistic */218volatile uint32_t ooe2hs; /**< OutOctetsEncrypted second half Statistic */219volatile uint8_t res12[48]; /**< reserved */220_Packed struct221{222volatile uint32_t txsacs; /**< TX Security Association configuration and status */223volatile uint32_t txsanpn; /**< TX Security Association nextPN */224volatile uint32_t txsaopps; /**< TX Security Association OutPktsProtected Statistic */225volatile uint32_t txsaopes; /**< TX Security Association OutPktsEncrypted Statistic */226volatile uint32_t txsak[4]; /**< TX Security Association key (128 bit) */227volatile uint32_t txsah[4]; /**< TX Security Association hash (128 bit) */228volatile uint8_t res13[16]; /**< reserved */229} _PackedType fmMacsecTxScSa[NUM_OF_SA_PER_TX_SC];230volatile uint8_t res14[248]; /**< reserved */231232/* Global configuration and status */233volatile uint32_t ip_rev1; /**< MACsec IP Block Revision 1 register */234volatile uint32_t ip_rev2; /**< MACsec IP Block Revision 2 register */235volatile uint32_t evr; /**< MACsec Event Register */236volatile uint32_t ever; /**< MACsec Event Enable Register */237volatile uint32_t evfr; /**< MACsec Event Force Register */238volatile uint32_t err; /**< MACsec Error Register */239volatile uint32_t erer; /**< MACsec Error Enable Register */240volatile uint32_t erfr; /**< MACsec Error Force Register */241volatile uint8_t res15[40]; /**< reserved */242volatile uint32_t meec; /**< MACsec Memory ECC Error Capture Register */243volatile uint32_t idle; /**< MACsec Idle status Register */244volatile uint8_t res16[184]; /**< reserved */245/* DEBUG */246volatile uint32_t rxec; /**< MACsec RX error capture Register */247volatile uint8_t res17[28]; /**< reserved */248volatile uint32_t txec; /**< MACsec TX error capture Register */249volatile uint8_t res18[220]; /**< reserved */250251/* Macsec Rx global statistic */252volatile uint32_t ifiocp1hs; /**< ifInOctetsCp first half Statistic */253volatile uint32_t ifiocp2hs; /**< ifInOctetsCp second half Statistic */254volatile uint32_t ifiupcps; /**< ifInUcastPktsCp Statistic */255volatile uint8_t res19[4]; /**< reserved */256volatile uint32_t ifioup1hs; /**< ifInOctetsUp first half Statistic */257volatile uint32_t ifioup2hs; /**< ifInOctetsUp second half Statistic */258volatile uint32_t ifiupups; /**< ifInUcastPktsUp Statistic */259volatile uint8_t res20[4]; /**< reserved */260volatile uint32_t ifimpcps; /**< ifInMulticastPktsCp Statistic */261volatile uint32_t ifibpcps; /**< ifInBroadcastPktsCp Statistic */262volatile uint32_t ifimpups; /**< ifInMulticastPktsUp Statistic */263volatile uint32_t ifibpups; /**< ifInBroadcastPktsUp Statistic */264volatile uint32_t ipwts; /**< InPktsWithoutTag Statistic */265volatile uint32_t ipkays; /**< InPktsKaY Statistic */266volatile uint32_t ipbts; /**< InPktsBadTag Statistic */267volatile uint32_t ipsnfs; /**< InPktsSCINotFound Statistic */268volatile uint32_t ipuecs; /**< InPktsUnsupportedEC Statistic */269volatile uint32_t ipescbs; /**< InPktsEponSingleCopyBroadcast Statistic */270volatile uint32_t iptls; /**< InPktsTooLong Statistic */271volatile uint8_t res21[52]; /**< reserved */272273/* Macsec Tx global statistic */274volatile uint32_t opds; /**< OutPktsDiscarded Statistic */275#if (DPAA_VERSION >= 11)276volatile uint8_t res22[124]; /**< reserved */277_Packed struct278{279volatile uint32_t rxsak[8]; /**< RX Security Association key (128/256 bit) */280volatile uint8_t res23[32]; /**< reserved */281} _PackedType rxScSaKey[NUM_OF_SA_PER_RX_SC];282_Packed struct283{284volatile uint32_t txsak[8]; /**< TX Security Association key (128/256 bit) */285volatile uint8_t res24[32]; /**< reserved */286} _PackedType txScSaKey[NUM_OF_SA_PER_TX_SC];287#endif /* (DPAA_VERSION >= 11) */288} _PackedType t_FmMacsecRegs;289290#if defined(__MWERKS__) && !defined(__GNUC__)291#pragma pack(pop)292#endif /* defined(__MWERKS__) && ... */293294295/**************************************************************************//**296@Description General defines297*//***************************************************************************/298299#define SCI_HIGH_MASK 0xffffffff00000000LL300#define SCI_LOW_MASK 0x00000000ffffffffLL301302#define LONG_SHIFT 32303304#define GET_SCI_FIRST_HALF(sci) (uint32_t)((macsecSCI_t)((macsecSCI_t)(sci) & SCI_HIGH_MASK) >> LONG_SHIFT)305#define GET_SCI_SECOND_HALF(sci) (uint32_t)((macsecSCI_t)(sci) & SCI_LOW_MASK)306307/**************************************************************************//**308@Description Configuration defines309*//***************************************************************************/310311/* masks */312#define CFG_UECT 0x00000800313#define CFG_ESCBT 0x00000400314#define CFG_USFT 0x00000300315#define CFG_ITT 0x00000080316#define CFG_KFT 0x00000040317#define CFG_UFT 0x00000030318#define CFG_KSS 0x00000004319#define CFG_BYPN 0x00000002320#define CFG_S0I 0x00000001321322#define ET_TYPE 0x0000ffff323324#define MFL_MAX_LEN 0x0000ffff325326#define RXSCA_SC_SEL 0x0000000f327328#define TXSCA_SC_SEL 0x0000000f329330#define IP_REV_1_IP_ID 0xffff0000331#define IP_REV_1_IP_MJ 0x0000ff00332#define IP_REV_1_IP_MM 0x000000ff333334#define IP_REV_2_IP_INT 0x00ff0000335#define IP_REV_2_IP_ERR 0x0000ff00336#define IP_REV_2_IP_CFG 0x000000ff337338#define MECC_CAP 0x80000000339#define MECC_CET 0x40000000340#define MECC_SERCNT 0x00ff0000341#define MECC_MEMADDR 0x000001ff342343/* shifts */344#define CFG_UECT_SHIFT (31-20)345#define CFG_ESCBT_SHIFT (31-21)346#define CFG_USFT_SHIFT (31-23)347#define CFG_ITT_SHIFT (31-24)348#define CFG_KFT_SHIFT (31-25)349#define CFG_UFT_SHIFT (31-27)350#define CFG_KSS_SHIFT (31-29)351#define CFG_BYPN_SHIFT (31-30)352#define CFG_S0I_SHIFT (31-31)353354#define IP_REV_1_IP_ID_SHIFT (31-15)355#define IP_REV_1_IP_MJ_SHIFT (31-23)356#define IP_REV_1_IP_MM_SHIFT (31-31)357358#define IP_REV_2_IP_INT_SHIFT (31-15)359#define IP_REV_2_IP_ERR_SHIFT (31-23)360#define IP_REV_2_IP_CFG_SHIFT (31-31)361362#define MECC_CAP_SHIFT (31-0)363#define MECC_CET_SHIFT (31-1)364#define MECC_SERCNT_SHIFT (31-15)365#define MECC_MEMADDR_SHIFT (31-31)366367/**************************************************************************//**368@Description RX SC defines369*//***************************************************************************/370371/* masks */372#define RX_SCCFG_SCI_EN_MASK 0x00000800373#define RX_SCCFG_RP_MASK 0x00000400374#define RX_SCCFG_VF_MASK 0x00000300375#define RX_SCCFG_CO_MASK 0x0000003f376377/* shifts */378#define RX_SCCFG_SCI_EN_SHIFT (31-20)379#define RX_SCCFG_RP_SHIFT (31-21)380#define RX_SCCFG_VF_SHIFT (31-23)381#define RX_SCCFG_CO_SHIFT (31-31)382#define RX_SCCFG_CS_SHIFT (31-7)383384/**************************************************************************//**385@Description RX SA defines386*//***************************************************************************/387388/* masks */389#define RX_SACFG_ACTIVE 0x80000000390#define RX_SACFG_AN_MASK 0x00000006391#define RX_SACFG_EN_MASK 0x00000001392393/* shifts */394#define RX_SACFG_AN_SHIFT (31-30)395#define RX_SACFG_EN_SHIFT (31-31)396397/**************************************************************************//**398@Description TX SC defines399*//***************************************************************************/400401/* masks */402#define TX_SCCFG_AN_MASK 0x000c0000403#define TX_SCCFG_ASA_MASK 0x00020000404#define TX_SCCFG_SCE_MASK 0x00010000405#define TX_SCCFG_CO_MASK 0x00003f00406#define TX_SCCFG_CE_MASK 0x00000010407#define TX_SCCFG_PF_MASK 0x00000008408#define TX_SCCFG_AIS_MASK 0x00000004409#define TX_SCCFG_UES_MASK 0x00000002410#define TX_SCCFG_USCB_MASK 0x00000001411412/* shifts */413#define TX_SCCFG_AN_SHIFT (31-13)414#define TX_SCCFG_ASA_SHIFT (31-14)415#define TX_SCCFG_SCE_SHIFT (31-15)416#define TX_SCCFG_CO_SHIFT (31-23)417#define TX_SCCFG_CE_SHIFT (31-27)418#define TX_SCCFG_PF_SHIFT (31-28)419#define TX_SCCFG_AIS_SHIFT (31-29)420#define TX_SCCFG_UES_SHIFT (31-30)421#define TX_SCCFG_USCB_SHIFT (31-31)422#define TX_SCCFG_CS_SHIFT (31-7)423424/**************************************************************************//**425@Description TX SA defines426*//***************************************************************************/427428/* masks */429#define TX_SACFG_ACTIVE 0x80000000430431432typedef struct433{434void (*f_Isr) (t_Handle h_Arg, uint32_t id);435t_Handle h_SrcHandle;436} t_FmMacsecIntrSrc;437438typedef struct439{440e_FmMacsecUnknownSciFrameTreatment unknownSciTreatMode;441bool invalidTagsDeliverUncontrolled;442bool changedTextWithNoEncryptDeliverUncontrolled;443bool onlyScbIsSetDeliverUncontrolled;444bool encryptWithNoChangedTextDiscardUncontrolled;445e_FmMacsecUntagFrameTreatment untagTreatMode;446uint32_t pnExhThr;447bool keysUnreadable;448bool byPassMode;449bool reservedSc0;450uint32_t sectagOverhead;451uint32_t mflSubtract;452} t_FmMacsecDriverParam;453454typedef struct455{456t_FmMacsecControllerDriver fmMacsecControllerDriver;457t_Handle h_Fm;458t_FmMacsecRegs *p_FmMacsecRegs;459t_Handle h_FmMac; /**< A handle to the FM MAC object related to */460char fmMacsecModuleName[MODULE_NAME_SIZE];461t_FmMacsecIntrSrc intrMng[NUM_OF_INTER_MODULE_EVENTS];462uint32_t events;463uint32_t exceptions;464uint32_t userExceptions;465t_FmMacsecExceptionsCallback *f_Exception; /**< Exception Callback Routine */466t_Handle h_App; /**< A handle to an application layer object; This handle will467be passed by the driver upon calling the above callbacks */468bool rxScTable[NUM_OF_RX_SC];469uint32_t numRxScAvailable;470bool txScTable[NUM_OF_TX_SC];471uint32_t numTxScAvailable;472t_Handle rxScSpinLock;473t_Handle txScSpinLock;474t_FmMacsecDriverParam *p_FmMacsecDriverParam;475} t_FmMacsec;476477478#endif /* __FM_MACSEC_MASTER_H */479480481