Path: blob/main/sys/contrib/ncsw/Peripherals/FM/Pcd/fm_pcd.h
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/*1* Copyright 2008-2012 Freescale Semiconductor Inc.2*3* Redistribution and use in source and binary forms, with or without4* modification, are permitted provided that the following conditions are met:5* * Redistributions of source code must retain the above copyright6* notice, this list of conditions and the following disclaimer.7* * Redistributions in binary form must reproduce the above copyright8* notice, this list of conditions and the following disclaimer in the9* documentation and/or other materials provided with the distribution.10* * Neither the name of Freescale Semiconductor nor the11* names of its contributors may be used to endorse or promote products12* derived from this software without specific prior written permission.13*14*15* ALTERNATIVELY, this software may be distributed under the terms of the16* GNU General Public License ("GPL") as published by the Free Software17* Foundation, either version 2 of that License or (at your option) any18* later version.19*20* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY21* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED22* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE23* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY24* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES25* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;26* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND27* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT28* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS29* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.30*/313233/******************************************************************************34@File fm_pcd.h3536@Description FM PCD ...37*//***************************************************************************/38#ifndef __FM_PCD_H39#define __FM_PCD_H4041#include "std_ext.h"42#include "error_ext.h"43#include "list_ext.h"44#include "fm_pcd_ext.h"45#include "fm_common.h"46#include "fsl_fman_prs.h"47#include "fsl_fman_kg.h"4849#define __ERR_MODULE__ MODULE_FM_PCD505152/****************************/53/* Defaults */54/****************************/55#define DEFAULT_plcrAutoRefresh FALSE56#define DEFAULT_fmPcdKgErrorExceptions (FM_EX_KG_DOUBLE_ECC | FM_EX_KG_KEYSIZE_OVERFLOW)57#define DEFAULT_fmPcdPlcrErrorExceptions (FM_PCD_EX_PLCR_DOUBLE_ECC | FM_PCD_EX_PLCR_INIT_ENTRY_ERROR)58#define DEFAULT_fmPcdPlcrExceptions 059#define DEFAULT_fmPcdPrsErrorExceptions (FM_PCD_EX_PRS_DOUBLE_ECC)6061#define DEFAULT_fmPcdPrsExceptions FM_PCD_EX_PRS_SINGLE_ECC62#define DEFAULT_numOfUsedProfilesPerWindow 1663#define DEFAULT_numOfSharedPlcrProfiles 46465/****************************/66/* Network defines */67/****************************/68#define UDP_HEADER_SIZE 86970#define ESP_SPI_OFFSET 071#define ESP_SPI_SIZE 472#define ESP_SEQ_NUM_OFFSET ESP_SPI_SIZE73#define ESP_SEQ_NUM_SIZE 47475/****************************/76/* General defines */77/****************************/78#define ILLEGAL_CLS_PLAN 0xff79#define ILLEGAL_NETENV 0xff8081#define FM_PCD_MAX_NUM_OF_ALIAS_HDRS 38283/****************************/84/* Error defines */85/****************************/8687#define FM_PCD_EX_PLCR_DOUBLE_ECC 0x2000000088#define FM_PCD_EX_PLCR_INIT_ENTRY_ERROR 0x1000000089#define FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE 0x0800000090#define FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE 0x040000009192#define GET_FM_PCD_EXCEPTION_FLAG(bitMask, exception) \93switch (exception){ \94case e_FM_PCD_KG_EXCEPTION_DOUBLE_ECC: \95bitMask = FM_EX_KG_DOUBLE_ECC; break; \96case e_FM_PCD_PLCR_EXCEPTION_DOUBLE_ECC: \97bitMask = FM_PCD_EX_PLCR_DOUBLE_ECC; break; \98case e_FM_PCD_KG_EXCEPTION_KEYSIZE_OVERFLOW: \99bitMask = FM_EX_KG_KEYSIZE_OVERFLOW; break; \100case e_FM_PCD_PLCR_EXCEPTION_INIT_ENTRY_ERROR: \101bitMask = FM_PCD_EX_PLCR_INIT_ENTRY_ERROR; break; \102case e_FM_PCD_PLCR_EXCEPTION_PRAM_SELF_INIT_COMPLETE: \103bitMask = FM_PCD_EX_PLCR_PRAM_SELF_INIT_COMPLETE; break; \104case e_FM_PCD_PLCR_EXCEPTION_ATOMIC_ACTION_COMPLETE: \105bitMask = FM_PCD_EX_PLCR_ATOMIC_ACTION_COMPLETE; break; \106case e_FM_PCD_PRS_EXCEPTION_DOUBLE_ECC: \107bitMask = FM_PCD_EX_PRS_DOUBLE_ECC; break; \108case e_FM_PCD_PRS_EXCEPTION_SINGLE_ECC: \109bitMask = FM_PCD_EX_PRS_SINGLE_ECC; break; \110default: bitMask = 0;break;}111112/***********************************************************************/113/* Policer defines */114/***********************************************************************/115#define FM_PCD_PLCR_GCR_STEN 0x40000000116#define FM_PCD_PLCR_DOUBLE_ECC 0x80000000117#define FM_PCD_PLCR_INIT_ENTRY_ERROR 0x40000000118#define FM_PCD_PLCR_PRAM_SELF_INIT_COMPLETE 0x80000000119#define FM_PCD_PLCR_ATOMIC_ACTION_COMPLETE 0x40000000120121/***********************************************************************/122/* Memory map */123/***********************************************************************/124#if defined(__MWERKS__) && !defined(__GNUC__)125#pragma pack(push,1)126#endif /* defined(__MWERKS__) && ... */127128129typedef struct {130/* General Configuration and Status Registers */131volatile uint32_t fmpl_gcr; /* 0x000 FMPL_GCR - FM Policer General Configuration */132volatile uint32_t fmpl_gsr; /* 0x004 FMPL_GSR - FM Policer Global Status Register */133volatile uint32_t fmpl_evr; /* 0x008 FMPL_EVR - FM Policer Event Register */134volatile uint32_t fmpl_ier; /* 0x00C FMPL_IER - FM Policer Interrupt Enable Register */135volatile uint32_t fmpl_ifr; /* 0x010 FMPL_IFR - FM Policer Interrupt Force Register */136volatile uint32_t fmpl_eevr; /* 0x014 FMPL_EEVR - FM Policer Error Event Register */137volatile uint32_t fmpl_eier; /* 0x018 FMPL_EIER - FM Policer Error Interrupt Enable Register */138volatile uint32_t fmpl_eifr; /* 0x01C FMPL_EIFR - FM Policer Error Interrupt Force Register */139/* Global Statistic Counters */140volatile uint32_t fmpl_rpcnt; /* 0x020 FMPL_RPC - FM Policer RED Packets Counter */141volatile uint32_t fmpl_ypcnt; /* 0x024 FMPL_YPC - FM Policer YELLOW Packets Counter */142volatile uint32_t fmpl_rrpcnt; /* 0x028 FMPL_RRPC - FM Policer Recolored RED Packet Counter */143volatile uint32_t fmpl_rypcnt; /* 0x02C FMPL_RYPC - FM Policer Recolored YELLOW Packet Counter */144volatile uint32_t fmpl_tpcnt; /* 0x030 FMPL_TPC - FM Policer Total Packet Counter */145volatile uint32_t fmpl_flmcnt; /* 0x034 FMPL_FLMC - FM Policer Frame Length Mismatch Counter */146volatile uint32_t fmpl_res0[21]; /* 0x038 - 0x08B Reserved */147/* Profile RAM Access Registers */148volatile uint32_t fmpl_par; /* 0x08C FMPL_PAR - FM Policer Profile Action Register*/149t_FmPcdPlcrProfileRegs profileRegs;150/* Error Capture Registers */151volatile uint32_t fmpl_serc; /* 0x100 FMPL_SERC - FM Policer Soft Error Capture */152volatile uint32_t fmpl_upcr; /* 0x104 FMPL_UPCR - FM Policer Uninitialized Profile Capture Register */153volatile uint32_t fmpl_res2; /* 0x108 Reserved */154/* Debug Registers */155volatile uint32_t fmpl_res3[61]; /* 0x10C-0x200 Reserved Debug*/156/* Profile Selection Mapping Registers Per Port-ID (n=1-11, 16) */157volatile uint32_t fmpl_dpmr; /* 0x200 FMPL_DPMR - FM Policer Default Mapping Register */158volatile uint32_t fmpl_pmr[63]; /*+default 0x204-0x2FF FMPL_PMR1 - FMPL_PMR63, - FM Policer Profile Mapping Registers.159(for port-ID 1-11, only for supported Port-ID registers) */160} t_FmPcdPlcrRegs;161162#if defined(__MWERKS__) && !defined(__GNUC__)163#pragma pack(pop)164#endif /* defined(__MWERKS__) && ... */165166167/***********************************************************************/168/* Driver's internal structures */169/***********************************************************************/170171typedef struct {172bool known;173uint8_t id;174} t_FmPcdKgSchemesExtractsEntry;175176typedef struct {177t_FmPcdKgSchemesExtractsEntry extractsArray[FM_PCD_KG_MAX_NUM_OF_EXTRACTS_PER_KEY];178} t_FmPcdKgSchemesExtracts;179180typedef struct {181t_Handle h_Manip;182bool keepRes;183e_FmPcdEngine nextEngine;184uint8_t parseCode;185} t_FmPcdInfoForManip;186187/**************************************************************************//**188@Description A structure of parameters to communicate189between the port and PCD regarding the KG scheme.190*//***************************************************************************/191typedef struct {192uint8_t netEnvId; /* in */193uint8_t numOfDistinctionUnits; /* in */194uint8_t unitIds[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS]; /* in */195uint32_t vector; /* out */196} t_NetEnvParams;197198typedef struct {199bool allocated;200uint8_t ownerId; /* guestId for KG in multi-partition only.201portId for PLCR in any environment */202} t_FmPcdAllocMng;203204typedef struct {205volatile bool lock;206bool used;207uint8_t owners;208uint8_t netEnvId;209uint8_t guestId;210uint8_t baseEntry;211uint16_t sizeOfGrp;212protocolOpt_t optArray[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];213} t_FmPcdKgClsPlanGrp;214215typedef struct {216t_Handle h_FmPcd;217uint8_t schemeId;218t_FmPcdLock *p_Lock;219bool valid;220uint8_t netEnvId;221uint8_t owners;222uint32_t matchVector;223uint32_t ccUnits;224bool nextRelativePlcrProfile;225uint16_t relativeProfileId;226uint16_t numOfProfiles;227t_FmPcdKgKeyOrder orderedArray;228e_FmPcdEngine nextEngine;229e_FmPcdDoneAction doneAction;230bool requiredActionFlag;231uint32_t requiredAction;232bool extractedOrs;233uint8_t bitOffsetInPlcrProfile;234bool directPlcr;235#if (DPAA_VERSION >= 11)236bool vspe;237#endif238} t_FmPcdKgScheme;239240typedef union {241struct fman_kg_scheme_regs schemeRegs;242struct fman_kg_pe_regs portRegs;243struct fman_kg_cp_regs clsPlanRegs;244} u_FmPcdKgIndirectAccessRegs;245246typedef struct {247struct fman_kg_regs *p_FmPcdKgRegs;248uint32_t schemeExceptionsBitMask;249uint8_t numOfSchemes;250t_Handle h_HwSpinlock;251uint8_t schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];252t_FmPcdKgScheme schemes[FM_PCD_KG_NUM_OF_SCHEMES];253t_FmPcdKgClsPlanGrp clsPlanGrps[FM_MAX_NUM_OF_PORTS];254uint8_t emptyClsPlanGrpId;255t_FmPcdAllocMng schemesMng[FM_PCD_KG_NUM_OF_SCHEMES]; /* only for MASTER ! */256t_FmPcdAllocMng clsPlanBlocksMng[FM_PCD_MAX_NUM_OF_CLS_PLANS/CLS_PLAN_NUM_PER_GRP];257u_FmPcdKgIndirectAccessRegs *p_IndirectAccessRegs;258} t_FmPcdKg;259260typedef struct {261uint16_t profilesBase;262uint16_t numOfProfiles;263t_Handle h_FmPort;264} t_FmPcdPlcrMapParam;265266typedef struct {267uint16_t absoluteProfileId;268t_Handle h_FmPcd;269bool valid;270t_FmPcdLock *p_Lock;271t_FmPcdAllocMng profilesMng;272bool requiredActionFlag;273uint32_t requiredAction;274e_FmPcdEngine nextEngineOnGreen; /**< Green next engine type */275u_FmPcdPlcrNextEngineParams paramsOnGreen; /**< Green next engine params */276277e_FmPcdEngine nextEngineOnYellow; /**< Yellow next engine type */278u_FmPcdPlcrNextEngineParams paramsOnYellow; /**< Yellow next engine params */279280e_FmPcdEngine nextEngineOnRed; /**< Red next engine type */281u_FmPcdPlcrNextEngineParams paramsOnRed; /**< Red next engine params */282} t_FmPcdPlcrProfile;283284typedef struct {285t_FmPcdPlcrRegs *p_FmPcdPlcrRegs;286uint16_t partPlcrProfilesBase;287uint16_t partNumOfPlcrProfiles;288t_FmPcdPlcrProfile profiles[FM_PCD_PLCR_NUM_ENTRIES];289uint16_t numOfSharedProfiles;290uint16_t sharedProfilesIds[FM_PCD_PLCR_NUM_ENTRIES];291t_FmPcdPlcrMapParam portsMapping[FM_MAX_NUM_OF_PORTS];292t_Handle h_HwSpinlock;293t_Handle h_SwSpinlock;294} t_FmPcdPlcr;295296typedef struct {297uint32_t *p_SwPrsCode;298uint32_t *p_CurrSwPrs;299uint8_t currLabel;300struct fman_prs_regs *p_FmPcdPrsRegs;301t_FmPcdPrsLabelParams labelsTable[FM_PCD_PRS_NUM_OF_LABELS];302uint32_t fmPcdPrsPortIdStatistics;303} t_FmPcdPrs;304305typedef struct {306struct {307e_NetHeaderType hdr;308protocolOpt_t opt; /* only one option !! */309} hdrs[FM_PCD_MAX_NUM_OF_INTERCHANGEABLE_HDRS];310} t_FmPcdIntDistinctionUnit;311312typedef struct {313e_NetHeaderType hdr;314protocolOpt_t opt; /* only one option !! */315e_NetHeaderType aliasHdr;316} t_FmPcdNetEnvAliases;317318typedef struct {319uint8_t netEnvId;320t_Handle h_FmPcd;321t_Handle h_Spinlock;322bool used;323uint8_t owners;324uint8_t clsPlanGrpId;325t_FmPcdIntDistinctionUnit units[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];326uint32_t unitsVectors[FM_PCD_MAX_NUM_OF_DISTINCTION_UNITS];327uint32_t lcvs[FM_PCD_PRS_NUM_OF_HDRS];328uint32_t macsecVector;329t_FmPcdNetEnvAliases aliasHdrs[FM_PCD_MAX_NUM_OF_ALIAS_HDRS];330} t_FmPcdNetEnv;331332typedef struct {333struct fman_prs_cfg dfltCfg;334bool plcrAutoRefresh;335uint16_t prsMaxParseCycleLimit;336} t_FmPcdDriverParam;337338typedef struct {339t_Handle h_Fm;340t_Handle h_FmMuram;341t_FmRevisionInfo fmRevInfo;342343uint64_t physicalMuramBase;344345t_Handle h_Spinlock;346t_List freeLocksLst;347t_List acquiredLocksLst;348349t_Handle h_IpcSession; /* relevant for guest only */350bool enabled;351uint8_t guestId; /**< Guest Partition Id */352uint8_t numOfEnabledGuestPartitionsPcds;353char fmPcdModuleName[MODULE_NAME_SIZE];354char fmPcdIpcHandlerModuleName[MODULE_NAME_SIZE]; /* relevant for guest only - this is the master's name */355t_FmPcdNetEnv netEnvs[FM_MAX_NUM_OF_PORTS];356t_FmPcdKg *p_FmPcdKg;357t_FmPcdPlcr *p_FmPcdPlcr;358t_FmPcdPrs *p_FmPcdPrs;359360void *p_CcShadow; /**< CC MURAM shadow */361uint32_t ccShadowSize;362uint32_t ccShadowAlign;363volatile bool shadowLock;364t_Handle h_ShadowSpinlock;365366t_Handle h_Hc;367368uint32_t exceptions;369t_FmPcdExceptionCallback *f_Exception;370t_FmPcdIdExceptionCallback *f_FmPcdIndexedException;371t_Handle h_App;372uintptr_t ipv6FrameIdAddr;373uintptr_t capwapFrameIdAddr;374bool advancedOffloadSupport;375376t_FmPcdDriverParam *p_FmPcdDriverParam;377} t_FmPcd;378379#if (DPAA_VERSION >= 11)380typedef uint8_t t_FmPcdFrmReplicUpdateType;381#define FRM_REPLIC_UPDATE_COUNTER 0x01382#define FRM_REPLIC_UPDATE_INFO 0x02383#endif /* (DPAA_VERSION >= 11) */384/***********************************************************************/385/* PCD internal routines */386/***********************************************************************/387388t_Error PcdGetVectorForOpt(t_FmPcd *p_FmPcd, uint8_t netEnvId, protocolOpt_t opt, uint32_t *p_Vector);389t_Error PcdGetUnitsVector(t_FmPcd *p_FmPcd, t_NetEnvParams *p_Params);390bool PcdNetEnvIsUnitWithoutOpts(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint32_t unitVector);391t_Error PcdGetClsPlanGrpParams(t_FmPcd *p_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_GrpParams);392void FmPcdSetClsPlanGrpId(t_FmPcd *p_FmPcd, uint8_t netEnvId, uint8_t clsPlanGrpId);393e_NetHeaderType FmPcdGetAliasHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);394uint8_t FmPcdNetEnvGetUnitIdForSingleHdr(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);395uint8_t FmPcdNetEnvGetUnitId(t_FmPcd *p_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr, bool interchangeable, protocolOpt_t opt);396397t_Error FmPcdManipBuildIpReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, bool isIpv4, uint8_t groupId);398t_Error FmPcdManipDeleteIpReassmSchemes(t_Handle h_Manip);399t_Error FmPcdManipBuildCapwapReassmScheme(t_FmPcd *p_FmPcd, t_Handle h_NetEnv, t_Handle h_CcTree, t_Handle h_Manip, uint8_t groupId);400t_Error FmPcdManipDeleteCapwapReassmSchemes(t_Handle h_Manip);401bool FmPcdManipIpReassmIsIpv6Hdr(t_Handle h_Manip);402403t_Handle KgConfig( t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);404t_Error KgInit(t_FmPcd *p_FmPcd);405t_Error KgFree(t_FmPcd *p_FmPcd);406void KgSetClsPlan(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanSet *p_Set);407bool KgIsSchemeAlwaysDirect(t_Handle h_FmPcd, uint8_t schemeId);408void KgEnable(t_FmPcd *p_FmPcd);409void KgDisable(t_FmPcd *p_FmPcd);410t_Error KgAllocClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t *p_First);411void KgFreeClsPlanEntries(t_Handle h_FmPcd, uint16_t numOfClsPlanEntries, uint8_t guestId, uint8_t base);412413/* only for MULTI partittion */414t_Error FmPcdKgAllocSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);415t_Error FmPcdKgFreeSchemes(t_Handle h_FmPcd, uint8_t numOfSchemes, uint8_t guestId, uint8_t *p_SchemesIds);416/* only for SINGLE partittion */417t_Error KgBindPortToSchemes(t_Handle h_FmPcd , uint8_t hardwarePortId, uint32_t spReg);418419t_FmPcdLock *FmPcdAcquireLock(t_Handle h_FmPcd);420void FmPcdReleaseLock(t_Handle h_FmPcd, t_FmPcdLock *p_Lock);421422t_Handle PlcrConfig(t_FmPcd *p_FmPcd, t_FmPcdParams *p_FmPcdParams);423t_Error PlcrInit(t_FmPcd *p_FmPcd);424t_Error PlcrFree(t_FmPcd *p_FmPcd);425void PlcrEnable(t_FmPcd *p_FmPcd);426void PlcrDisable(t_FmPcd *p_FmPcd);427uint16_t PlcrAllocProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);428void PlcrFreeProfilesForPartition(t_FmPcd *p_FmPcd, uint16_t base, uint16_t numOfProfiles, uint8_t guestId);429t_Error PlcrSetPortProfiles(t_FmPcd *p_FmPcd,430uint8_t hardwarePortId,431uint16_t numOfProfiles,432uint16_t base);433t_Error PlcrClearPortProfiles(t_FmPcd *p_FmPcd, uint8_t hardwarePortId);434435t_Handle PrsConfig(t_FmPcd *p_FmPcd,t_FmPcdParams *p_FmPcdParams);436t_Error PrsInit(t_FmPcd *p_FmPcd);437void PrsEnable(t_FmPcd *p_FmPcd);438void PrsDisable(t_FmPcd *p_FmPcd);439void PrsFree(t_FmPcd *p_FmPcd );440t_Error PrsIncludePortInStatistics(t_FmPcd *p_FmPcd, uint8_t hardwarePortId, bool include);441442t_Error FmPcdCcGetGrpParams(t_Handle treeId, uint8_t grpId, uint32_t *p_GrpBits, uint8_t *p_GrpBase);443uint8_t FmPcdCcGetOffset(t_Handle h_CcNode);444uint8_t FmPcdCcGetParseCode(t_Handle h_CcNode);445uint16_t FmPcdCcGetNumOfKeys(t_Handle h_CcNode);446t_Error ValidateNextEngineParams(t_Handle h_FmPcd, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams, e_FmPcdCcStatsMode supportedStatsMode);447448void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);449t_Error FmPcdManipCheckParamsForCcNextEngine(t_FmPcdCcNextEngineParams *p_InfoForManip, uint32_t *requiredAction);450void FmPcdManipUpdateAdResultForCc(t_Handle h_Manip,451t_FmPcdCcNextEngineParams *p_CcNextEngineParams,452t_Handle p_Ad,453t_Handle *p_AdNewPtr);454void FmPcdManipUpdateAdContLookupForCc(t_Handle h_Manip, t_Handle p_Ad, t_Handle *p_AdNew, uint32_t adTableOffset);455void FmPcdManipUpdateOwner(t_Handle h_Manip, bool add);456t_Error FmPcdManipCheckParamsWithCcNodeParams(t_Handle h_Manip, t_Handle h_FmPcdCcNode);457#ifdef FM_CAPWAP_SUPPORT458t_Handle FmPcdManipApplSpecificBuild(void);459bool FmPcdManipIsCapwapApplSpecific(t_Handle h_Manip);460#endif /* FM_CAPWAP_SUPPORT */461#if (DPAA_VERSION >= 11)462void * FrmReplicGroupGetSourceTableDescriptor(t_Handle h_ReplicGroup);463void FrmReplicGroupUpdateOwner(t_Handle h_ReplicGroup, bool add);464void FrmReplicGroupUpdateAd(t_Handle h_ReplicGroup, void *p_Ad, t_Handle *h_AdNew);465466void FmPcdCcGetAdTablesThatPointOnReplicGroup(t_Handle h_Node,467t_Handle h_ReplicGroup,468t_List *p_AdTables,469uint32_t *p_NumOfAdTables);470#endif /* (DPAA_VERSION >= 11) */471472void EnqueueNodeInfoToRelevantLst(t_List *p_List, t_CcNodeInformation *p_CcInfo, t_Handle h_Spinlock);473void DequeueNodeInfoFromRelevantLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);474t_CcNodeInformation* FindNodeInfoInReleventLst(t_List *p_List, t_Handle h_Info, t_Handle h_Spinlock);475t_List *FmPcdManipGetSpinlock(t_Handle h_Manip);476t_List *FmPcdManipGetNodeLstPointedOnThisManip(t_Handle h_Manip);477478typedef struct479{480t_Handle h_StatsAd;481t_Handle h_StatsCounters;482#if (DPAA_VERSION >= 11)483t_Handle h_StatsFLRs;484#endif /* (DPAA_VERSION >= 11) */485} t_FmPcdCcStatsParams;486487void NextStepAd(t_Handle h_Ad,488t_FmPcdCcStatsParams *p_FmPcdCcStatsParams,489t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams,490t_FmPcd *p_FmPcd);491void ReleaseLst(t_List *p_List);492493static __inline__ t_Handle FmPcdGetMuramHandle(t_Handle h_FmPcd)494{495t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;496ASSERT_COND(p_FmPcd);497return p_FmPcd->h_FmMuram;498}499500static __inline__ uint64_t FmPcdGetMuramPhysBase(t_Handle h_FmPcd)501{502t_FmPcd *p_FmPcd = (t_FmPcd*)h_FmPcd;503ASSERT_COND(p_FmPcd);504return p_FmPcd->physicalMuramBase;505}506507static __inline__ uint32_t FmPcdLockSpinlock(t_FmPcdLock *p_Lock)508{509ASSERT_COND(p_Lock);510return XX_LockIntrSpinlock(p_Lock->h_Spinlock);511}512513static __inline__ void FmPcdUnlockSpinlock(t_FmPcdLock *p_Lock, uint32_t flags)514{515ASSERT_COND(p_Lock);516XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, flags);517}518519static __inline__ bool FmPcdLockTryLock(t_FmPcdLock *p_Lock)520{521uint32_t intFlags;522523ASSERT_COND(p_Lock);524intFlags = XX_LockIntrSpinlock(p_Lock->h_Spinlock);525if (p_Lock->flag)526{527XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);528return FALSE;529}530p_Lock->flag = TRUE;531XX_UnlockIntrSpinlock(p_Lock->h_Spinlock, intFlags);532return TRUE;533}534535static __inline__ void FmPcdLockUnlock(t_FmPcdLock *p_Lock)536{537ASSERT_COND(p_Lock);538p_Lock->flag = FALSE;539}540541542#endif /* __FM_PCD_H */543544545