Path: blob/main/sys/contrib/ncsw/Peripherals/FM/SP/fman_sp.c
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/*1* Copyright 2013 Freescale Semiconductor Inc.2*3* Redistribution and use in source and binary forms, with or without4* modification, are permitted provided that the following conditions are met:5* * Redistributions of source code must retain the above copyright6* notice, this list of conditions and the following disclaimer.7* * Redistributions in binary form must reproduce the above copyright8* notice, this list of conditions and the following disclaimer in the9* documentation and/or other materials provided with the distribution.10* * Neither the name of Freescale Semiconductor nor the11* names of its contributors may be used to endorse or promote products12* derived from this software without specific prior written permission.13*14*15* ALTERNATIVELY, this software may be distributed under the terms of the16* GNU General Public License ("GPL") as published by the Free Software17* Foundation, either version 2 of that License or (at your option) any18* later version.19*20* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY21* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED22* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE23* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY24* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES25* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;26* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND27* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT28* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS29* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.30*/3132#include "fsl_fman_sp.h"333435uint32_t fman_vsp_get_statistics(struct fm_pcd_storage_profile_regs *regs,36uint16_t index)37{38struct fm_pcd_storage_profile_regs *sp_regs;39sp_regs = ®s[index];40return ioread32be(&sp_regs->fm_sp_acnt);41}4243void fman_vsp_set_statistics(struct fm_pcd_storage_profile_regs *regs,44uint16_t index, uint32_t value)45{46struct fm_pcd_storage_profile_regs *sp_regs;47sp_regs = ®s[index];48iowrite32be(value, &sp_regs->fm_sp_acnt);49}5051void fman_vsp_defconfig(struct fm_storage_profile_params *cfg)52{53cfg->dma_swap_data =54DEFAULT_FMAN_SP_DMA_SWAP_DATA;55cfg->int_context_cache_attr =56DEFAULT_FMAN_SP_DMA_INT_CONTEXT_CACHE_ATTR;57cfg->header_cache_attr =58DEFAULT_FMAN_SP_DMA_HEADER_CACHE_ATTR;59cfg->scatter_gather_cache_attr =60DEFAULT_FMAN_SP_DMA_SCATTER_GATHER_CACHE_ATTR;61cfg->dma_write_optimize =62DEFAULT_FMAN_SP_DMA_WRITE_OPTIMIZE;63cfg->no_scather_gather =64DEFAULT_FMAN_SP_NO_SCATTER_GATHER;65}6667static inline uint32_t calc_vec_dep(int max_pools, bool *pools,68struct fman_ext_pools *ext_buf_pools, uint32_t mask)69{70int i, j;71uint32_t vector = 0;72for (i = 0; i < max_pools; i++)73if (pools[i])74for (j = 0; j < ext_buf_pools->num_pools_used; j++)75if (i == ext_buf_pools->ext_buf_pool[j].id) {76vector |= mask >> j;77break;78}79return vector;80}8182void fman_vsp_init(struct fm_pcd_storage_profile_regs *regs,83uint16_t index, struct fm_storage_profile_params *fm_vsp_params,84int port_max_num_of_ext_pools, int bm_max_num_of_pools,85int max_num_of_pfc_priorities)86{87int i = 0, j = 0;88struct fm_pcd_storage_profile_regs *sp_regs;89uint32_t tmp_reg, vector;90struct fman_ext_pools *ext_buf_pools = &fm_vsp_params->fm_ext_pools;91struct fman_buf_pool_depletion *buf_pool_depletion =92&fm_vsp_params->buf_pool_depletion;93struct fman_backup_bm_pools *backup_pools =94&fm_vsp_params->backup_pools;95struct fman_sp_int_context_data_copy *int_context_data_copy =96fm_vsp_params->int_context;97struct fman_sp_buf_margins *external_buffer_margins =98fm_vsp_params->buf_margins;99bool no_scather_gather = fm_vsp_params->no_scather_gather;100uint16_t liodn_offset = fm_vsp_params->liodn_offset;101102sp_regs = ®s[index];103104/* fill external buffers manager pool information register*/105for (i = 0; i < ext_buf_pools->num_pools_used; i++) {106tmp_reg = FMAN_SP_EXT_BUF_POOL_VALID |107FMAN_SP_EXT_BUF_POOL_EN_COUNTER;108tmp_reg |= ((uint32_t)ext_buf_pools->ext_buf_pool[i].id <<109FMAN_SP_EXT_BUF_POOL_ID_SHIFT);110tmp_reg |= ext_buf_pools->ext_buf_pool[i].size;111/* functionality available only for some deriviatives112(limited by config) */113for (j = 0; j < backup_pools->num_backup_pools; j++)114if (ext_buf_pools->ext_buf_pool[i].id ==115backup_pools->pool_ids[j]) {116tmp_reg |= FMAN_SP_EXT_BUF_POOL_BACKUP;117break;118}119iowrite32be(tmp_reg, &sp_regs->fm_sp_ebmpi[i]);120}121122/* clear unused pools */123for (i = ext_buf_pools->num_pools_used;124i < port_max_num_of_ext_pools; i++)125iowrite32be(0, &sp_regs->fm_sp_ebmpi[i]);126127/* fill pool depletion register*/128tmp_reg = 0;129if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->pools_grp_mode_enable) {130/* calculate vector for number of pools depletion */131vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->132pools_to_consider, ext_buf_pools, 0x80000000);133134/* configure num of pools and vector for number of pools mode */135tmp_reg |= (((uint32_t)buf_pool_depletion->num_pools - 1) <<136FMAN_SP_POOL_DEP_NUM_OF_POOLS_SHIFT);137tmp_reg |= vector;138}139140if (buf_pool_depletion->buf_pool_depletion_enabled && buf_pool_depletion->single_pool_mode_enable) {141/* calculate vector for number of pools depletion */142vector = calc_vec_dep(bm_max_num_of_pools, buf_pool_depletion->143pools_to_consider_for_single_mode,144ext_buf_pools, 0x00000080);145146/* configure num of pools and vector for number of pools mode */147tmp_reg |= vector;148}149150/* fill QbbPEV */151if (buf_pool_depletion->buf_pool_depletion_enabled) {152vector = 0;153for (i = 0; i < max_num_of_pfc_priorities; i++)154if (buf_pool_depletion->pfc_priorities_en[i] == TRUE)155vector |= 0x00000100 << i;156tmp_reg |= vector;157}158iowrite32be(tmp_reg, &sp_regs->fm_sp_mpd);159160/* fill dma attributes register */161tmp_reg = 0;162tmp_reg |= (uint32_t)fm_vsp_params->dma_swap_data <<163FMAN_SP_DMA_ATTR_SWP_SHIFT;164tmp_reg |= (uint32_t)fm_vsp_params->int_context_cache_attr <<165FMAN_SP_DMA_ATTR_IC_CACHE_SHIFT;166tmp_reg |= (uint32_t)fm_vsp_params->header_cache_attr <<167FMAN_SP_DMA_ATTR_HDR_CACHE_SHIFT;168tmp_reg |= (uint32_t)fm_vsp_params->scatter_gather_cache_attr <<169FMAN_SP_DMA_ATTR_SG_CACHE_SHIFT;170if (fm_vsp_params->dma_write_optimize)171tmp_reg |= FMAN_SP_DMA_ATTR_WRITE_OPTIMIZE;172iowrite32be(tmp_reg, &sp_regs->fm_sp_da);173174/* IC parameters - fill internal context parameters register */175tmp_reg = 0;176tmp_reg |= (((uint32_t)int_context_data_copy->ext_buf_offset/177OFFSET_UNITS) << FMAN_SP_IC_TO_EXT_SHIFT);178tmp_reg |= (((uint32_t)int_context_data_copy->int_context_offset/179OFFSET_UNITS) << FMAN_SP_IC_FROM_INT_SHIFT);180tmp_reg |= (((uint32_t)int_context_data_copy->size/OFFSET_UNITS) <<181FMAN_SP_IC_SIZE_SHIFT);182iowrite32be(tmp_reg, &sp_regs->fm_sp_icp);183184/* buffer margins - fill external buffer margins register */185tmp_reg = 0;186tmp_reg |= (((uint32_t)external_buffer_margins->start_margins) <<187FMAN_SP_EXT_BUF_MARG_START_SHIFT);188tmp_reg |= (((uint32_t)external_buffer_margins->end_margins) <<189FMAN_SP_EXT_BUF_MARG_END_SHIFT);190if (no_scather_gather)191tmp_reg |= FMAN_SP_SG_DISABLE;192iowrite32be(tmp_reg, &sp_regs->fm_sp_ebm);193194/* buffer margins - fill spliodn register */195iowrite32be(liodn_offset, &sp_regs->fm_sp_spliodn);196}197198199