Path: blob/main/sys/contrib/ncsw/Peripherals/FM/inc/fm_common.h
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/*1* Copyright 2008-2012 Freescale Semiconductor Inc.2*3* Redistribution and use in source and binary forms, with or without4* modification, are permitted provided that the following conditions are met:5* * Redistributions of source code must retain the above copyright6* notice, this list of conditions and the following disclaimer.7* * Redistributions in binary form must reproduce the above copyright8* notice, this list of conditions and the following disclaimer in the9* documentation and/or other materials provided with the distribution.10* * Neither the name of Freescale Semiconductor nor the11* names of its contributors may be used to endorse or promote products12* derived from this software without specific prior written permission.13*14*15* ALTERNATIVELY, this software may be distributed under the terms of the16* GNU General Public License ("GPL") as published by the Free Software17* Foundation, either version 2 of that License or (at your option) any18* later version.19*20* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY21* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED22* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE23* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY24* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES25* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;26* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND27* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT28* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS29* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.30*/313233/******************************************************************************34@File fm_common.h3536@Description FM internal structures and definitions.37*//***************************************************************************/38#ifndef __FM_COMMON_H39#define __FM_COMMON_H4041#include "error_ext.h"42#include "std_ext.h"43#include "fm_pcd_ext.h"44#include "fm_ext.h"45#include "fm_port_ext.h"464748#define e_FM_PORT_TYPE_OH_HOST_COMMAND e_FM_PORT_TYPE_DUMMY4950#define CLS_PLAN_NUM_PER_GRP 85152#define IP_OFFLOAD_PACKAGE_NUMBER 10653#define CAPWAP_OFFLOAD_PACKAGE_NUMBER 10854#define IS_OFFLOAD_PACKAGE(num) ((num == IP_OFFLOAD_PACKAGE_NUMBER) || (num == CAPWAP_OFFLOAD_PACKAGE_NUMBER))55565758/**************************************************************************//**59@Description Modules registers offsets60*//***************************************************************************/61#define FM_MM_MURAM 0x0000000062#define FM_MM_BMI 0x0008000063#define FM_MM_QMI 0x0008040064#define FM_MM_PRS 0x000c700065#define FM_MM_KG 0x000C100066#define FM_MM_DMA 0x000C200067#define FM_MM_FPM 0x000C300068#define FM_MM_PLCR 0x000C000069#define FM_MM_IMEM 0x000C400070#define FM_MM_CGP 0x000DB00071#define FM_MM_TRB(i) (0x000D0200 + 0x400 * (i))72#if (DPAA_VERSION >= 11)73#define FM_MM_SP 0x000dc00074#endif /* (DPAA_VERSION >= 11) */757677/**************************************************************************//**78@Description Enum for inter-module interrupts registration79*//***************************************************************************/80typedef enum e_FmEventModules{81e_FM_MOD_PRS, /**< Parser event */82e_FM_MOD_KG, /**< Keygen event */83e_FM_MOD_PLCR, /**< Policer event */84e_FM_MOD_10G_MAC, /**< 10G MAC event */85e_FM_MOD_1G_MAC, /**< 1G MAC event */86e_FM_MOD_TMR, /**< Timer event */87e_FM_MOD_FMAN_CTRL, /**< FMAN Controller Timer event */88e_FM_MOD_MACSEC,89e_FM_MOD_DUMMY_LAST90} e_FmEventModules;9192/**************************************************************************//**93@Description Enum for interrupts types94*//***************************************************************************/95typedef enum e_FmIntrType {96e_FM_INTR_TYPE_ERR,97e_FM_INTR_TYPE_NORMAL98} e_FmIntrType;99100/**************************************************************************//**101@Description Enum for inter-module interrupts registration102*//***************************************************************************/103typedef enum e_FmInterModuleEvent104{105e_FM_EV_PRS = 0, /**< Parser event */106e_FM_EV_ERR_PRS, /**< Parser error event */107e_FM_EV_KG, /**< Keygen event */108e_FM_EV_ERR_KG, /**< Keygen error event */109e_FM_EV_PLCR, /**< Policer event */110e_FM_EV_ERR_PLCR, /**< Policer error event */111e_FM_EV_ERR_10G_MAC0, /**< 10G MAC 0 error event */112e_FM_EV_ERR_10G_MAC1, /**< 10G MAC 1 error event */113e_FM_EV_ERR_1G_MAC0, /**< 1G MAC 0 error event */114e_FM_EV_ERR_1G_MAC1, /**< 1G MAC 1 error event */115e_FM_EV_ERR_1G_MAC2, /**< 1G MAC 2 error event */116e_FM_EV_ERR_1G_MAC3, /**< 1G MAC 3 error event */117e_FM_EV_ERR_1G_MAC4, /**< 1G MAC 4 error event */118e_FM_EV_ERR_1G_MAC5, /**< 1G MAC 5 error event */119e_FM_EV_ERR_1G_MAC6, /**< 1G MAC 6 error event */120e_FM_EV_ERR_1G_MAC7, /**< 1G MAC 7 error event */121e_FM_EV_ERR_MACSEC_MAC0,122e_FM_EV_TMR, /**< Timer event */123e_FM_EV_10G_MAC0, /**< 10G MAC 0 event (Magic packet detection)*/124e_FM_EV_10G_MAC1, /**< 10G MAC 1 event (Magic packet detection)*/125e_FM_EV_1G_MAC0, /**< 1G MAC 0 event (Magic packet detection)*/126e_FM_EV_1G_MAC1, /**< 1G MAC 1 event (Magic packet detection)*/127e_FM_EV_1G_MAC2, /**< 1G MAC 2 (Magic packet detection)*/128e_FM_EV_1G_MAC3, /**< 1G MAC 3 (Magic packet detection)*/129e_FM_EV_1G_MAC4, /**< 1G MAC 4 (Magic packet detection)*/130e_FM_EV_1G_MAC5, /**< 1G MAC 5 (Magic packet detection)*/131e_FM_EV_1G_MAC6, /**< 1G MAC 6 (Magic packet detection)*/132e_FM_EV_1G_MAC7, /**< 1G MAC 7 (Magic packet detection)*/133e_FM_EV_MACSEC_MAC0, /**< MACSEC MAC 0 event */134e_FM_EV_FMAN_CTRL_0, /**< Fman controller event 0 */135e_FM_EV_FMAN_CTRL_1, /**< Fman controller event 1 */136e_FM_EV_FMAN_CTRL_2, /**< Fman controller event 2 */137e_FM_EV_FMAN_CTRL_3, /**< Fman controller event 3 */138e_FM_EV_DUMMY_LAST139} e_FmInterModuleEvent;140141142#if defined(__MWERKS__) && !defined(__GNUC__)143#pragma pack(push,1)144#endif /* defined(__MWERKS__) && ... */145146/**************************************************************************//**147@Description PCD KG scheme registers148*//***************************************************************************/149typedef _Packed struct t_FmPcdPlcrProfileRegs {150volatile uint32_t fmpl_pemode; /* 0x090 FMPL_PEMODE - FM Policer Profile Entry Mode*/151volatile uint32_t fmpl_pegnia; /* 0x094 FMPL_PEGNIA - FM Policer Profile Entry GREEN Next Invoked Action*/152volatile uint32_t fmpl_peynia; /* 0x098 FMPL_PEYNIA - FM Policer Profile Entry YELLOW Next Invoked Action*/153volatile uint32_t fmpl_pernia; /* 0x09C FMPL_PERNIA - FM Policer Profile Entry RED Next Invoked Action*/154volatile uint32_t fmpl_pecir; /* 0x0A0 FMPL_PECIR - FM Policer Profile Entry Committed Information Rate*/155volatile uint32_t fmpl_pecbs; /* 0x0A4 FMPL_PECBS - FM Policer Profile Entry Committed Burst Size*/156volatile uint32_t fmpl_pepepir_eir; /* 0x0A8 FMPL_PEPIR_EIR - FM Policer Profile Entry Peak/Excess Information Rate*/157volatile uint32_t fmpl_pepbs_ebs; /* 0x0AC FMPL_PEPBS_EBS - FM Policer Profile Entry Peak/Excess Information Rate*/158volatile uint32_t fmpl_pelts; /* 0x0B0 FMPL_PELTS - FM Policer Profile Entry Last TimeStamp*/159volatile uint32_t fmpl_pects; /* 0x0B4 FMPL_PECTS - FM Policer Profile Entry Committed Token Status*/160volatile uint32_t fmpl_pepts_ets; /* 0x0B8 FMPL_PEPTS_ETS - FM Policer Profile Entry Peak/Excess Token Status*/161volatile uint32_t fmpl_pegpc; /* 0x0BC FMPL_PEGPC - FM Policer Profile Entry GREEN Packet Counter*/162volatile uint32_t fmpl_peypc; /* 0x0C0 FMPL_PEYPC - FM Policer Profile Entry YELLOW Packet Counter*/163volatile uint32_t fmpl_perpc; /* 0x0C4 FMPL_PERPC - FM Policer Profile Entry RED Packet Counter */164volatile uint32_t fmpl_perypc; /* 0x0C8 FMPL_PERYPC - FM Policer Profile Entry Recolored YELLOW Packet Counter*/165volatile uint32_t fmpl_perrpc; /* 0x0CC FMPL_PERRPC - FM Policer Profile Entry Recolored RED Packet Counter*/166volatile uint32_t fmpl_res1[12]; /* 0x0D0-0x0FF Reserved */167} _PackedType t_FmPcdPlcrProfileRegs;168169170typedef _Packed struct t_FmPcdCcCapwapReassmTimeoutParams {171volatile uint32_t portIdAndCapwapReassmTbl;172volatile uint32_t fqidForTimeOutFrames;173volatile uint32_t timeoutRequestTime;174}_PackedType t_FmPcdCcCapwapReassmTimeoutParams;175176/**************************************************************************//**177@Description PCD CTRL Parameters Page178*//***************************************************************************/179typedef _Packed struct t_FmPcdCtrlParamsPage {180volatile uint8_t reserved0[16];181volatile uint32_t iprIpv4Nia;182volatile uint32_t iprIpv6Nia;183volatile uint8_t reserved1[24];184volatile uint32_t ipfOptionsCounter;185volatile uint8_t reserved2[12];186volatile uint32_t misc;187volatile uint32_t errorsDiscardMask;188volatile uint32_t discardMask;189volatile uint8_t reserved3[4];190volatile uint32_t postBmiFetchNia;191volatile uint8_t reserved4[172];192} _PackedType t_FmPcdCtrlParamsPage;193194195196#if defined(__MWERKS__) && !defined(__GNUC__)197#pragma pack(pop)198#endif /* defined(__MWERKS__) && ... */199200201/*for UNDER_CONSTRUCTION_FM_RMU_USE_SEC its defined in fm_ext.h*/202typedef uint32_t t_FmFmanCtrl;203204#define FPM_PORT_FM_CTL1 0x00000001205#define FPM_PORT_FM_CTL2 0x00000002206207208209typedef struct t_FmPcdCcFragScratchPoolCmdParams {210uint32_t numOfBuffers;211uint8_t bufferPoolId;212} t_FmPcdCcFragScratchPoolCmdParams;213214typedef struct t_FmPcdCcReassmTimeoutParams {215bool activate;216uint8_t tsbs;217uint32_t iprcpt;218} t_FmPcdCcReassmTimeoutParams;219220typedef struct {221uint8_t baseEntry;222uint16_t numOfClsPlanEntries;223uint32_t vectors[FM_PCD_MAX_NUM_OF_CLS_PLANS];224} t_FmPcdKgInterModuleClsPlanSet;225226/**************************************************************************//**227@Description Structure for binding a port to keygen schemes.228*//***************************************************************************/229typedef struct t_FmPcdKgInterModuleBindPortToSchemes {230uint8_t hardwarePortId;231uint8_t netEnvId;232bool useClsPlan; /**< TRUE if this port uses the clsPlan mechanism */233uint8_t numOfSchemes;234uint8_t schemesIds[FM_PCD_KG_NUM_OF_SCHEMES];235} t_FmPcdKgInterModuleBindPortToSchemes;236237typedef struct {238uint32_t nextCcNodeInfo;239t_List node;240} t_CcNodeInfo;241242typedef struct243{244t_Handle h_CcNode;245uint16_t index;246t_List node;247}t_CcNodeInformation;248#define CC_NODE_F_OBJECT(ptr) NCSW_LIST_OBJECT(ptr, t_CcNodeInformation, node)249250typedef enum e_ModifyState251{252e_MODIFY_STATE_ADD = 0,253e_MODIFY_STATE_REMOVE,254e_MODIFY_STATE_CHANGE255} e_ModifyState;256257typedef struct258{259t_Handle h_Manip;260t_List node;261}t_ManipInfo;262#define CC_NEXT_NODE_F_OBJECT(ptr) NCSW_LIST_OBJECT(ptr, t_CcNodeInfo, node)263264typedef struct {265uint32_t type;266uint8_t prOffset;267uint16_t dataOffset;268uint8_t internalBufferOffset;269uint8_t numOfTasks;270uint8_t numOfExtraTasks;271uint8_t hardwarePortId;272t_FmRevisionInfo revInfo;273uint32_t nia;274uint32_t discardMask;275} t_GetCcParams;276277typedef struct {278uint32_t type;279int psoSize;280uint32_t nia;281t_FmFmanCtrl orFmanCtrl;282bool overwrite;283uint8_t ofpDpde;284} t_SetCcParams;285286typedef struct {287t_GetCcParams getCcParams;288t_SetCcParams setCcParams;289} t_FmPortGetSetCcParams;290291typedef struct {292uint32_t type;293bool sleep;294} t_FmSetParams;295296typedef struct {297uint32_t type;298uint32_t fmqm_gs;299uint32_t fm_npi;300uint32_t fm_cld;301uint32_t fmfp_extc;302} t_FmGetParams;303304typedef struct {305t_FmSetParams setParams;306t_FmGetParams getParams;307} t_FmGetSetParams;308309t_Error FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_Params);310311static __inline__ bool TRY_LOCK(t_Handle h_Spinlock, volatile bool *p_Flag)312{313uint32_t intFlags;314if (h_Spinlock)315intFlags = XX_LockIntrSpinlock(h_Spinlock);316else317intFlags = XX_DisableAllIntr();318319if (*p_Flag)320{321if (h_Spinlock)322XX_UnlockIntrSpinlock(h_Spinlock, intFlags);323else324XX_RestoreAllIntr(intFlags);325return FALSE;326}327*p_Flag = TRUE;328329if (h_Spinlock)330XX_UnlockIntrSpinlock(h_Spinlock, intFlags);331else332XX_RestoreAllIntr(intFlags);333334return TRUE;335}336337#define RELEASE_LOCK(_flag) _flag = FALSE;338339/**************************************************************************//**340@Collection Defines used for manipulation CC and BMI341@{342*//***************************************************************************/343#define INTERNAL_CONTEXT_OFFSET 0x80000000344#define OFFSET_OF_PR 0x40000000345#define MANIP_EXTRA_SPACE 0x20000000346#define NUM_OF_TASKS 0x10000000347#define OFFSET_OF_DATA 0x08000000348#define HW_PORT_ID 0x04000000349#define FM_REV 0x02000000350#define GET_NIA_FPNE 0x01000000351#define GET_NIA_PNDN 0x00800000352#define NUM_OF_EXTRA_TASKS 0x00400000353#define DISCARD_MASK 0x00200000354355#define UPDATE_NIA_PNEN 0x80000000356#define UPDATE_PSO 0x40000000357#define UPDATE_NIA_PNDN 0x20000000358#define UPDATE_FMFP_PRC_WITH_ONE_RISC_ONLY 0x10000000359#define UPDATE_OFP_DPTE 0x08000000360#define UPDATE_NIA_FENE 0x04000000361#define UPDATE_NIA_CMNE 0x02000000362#define UPDATE_NIA_FPNE 0x01000000363/* @} */364365/**************************************************************************//**366@Collection Defines used for manipulation CC and CC367@{368*//***************************************************************************/369#define UPDATE_NIA_ENQ_WITHOUT_DMA 0x80000000370#define UPDATE_CC_WITH_TREE 0x40000000371#define UPDATE_CC_WITH_DELETE_TREE 0x20000000372#define UPDATE_KG_NIA_CC_WA 0x10000000373#define UPDATE_KG_OPT_MODE 0x08000000374#define UPDATE_KG_NIA 0x04000000375#define UPDATE_CC_SHADOW_CLEAR 0x02000000376/* @} */377378#define UPDATE_FPM_BRKC_SLP 0x80000000379#define UPDATE_FPM_EXTC 0x40000000380#define UPDATE_FPM_EXTC_CLEAR 0x20000000381#define GET_FMQM_GS 0x10000000382#define GET_FM_NPI 0x08000000383#define GET_FMFP_EXTC 0x04000000384#define CLEAR_IRAM_READY 0x02000000385#define UPDATE_FM_CLD 0x01000000386#define GET_FM_CLD 0x00800000387#define FM_MAX_NUM_OF_PORTS (FM_MAX_NUM_OF_OH_PORTS + \388FM_MAX_NUM_OF_1G_RX_PORTS + \389FM_MAX_NUM_OF_10G_RX_PORTS + \390FM_MAX_NUM_OF_1G_TX_PORTS + \391FM_MAX_NUM_OF_10G_TX_PORTS)392393#define MODULE_NAME_SIZE 30394#define DUMMY_PORT_ID 0395396#define FM_LIODN_OFFSET_MASK 0x3FF397398/**************************************************************************//**399@Description NIA Description400*//***************************************************************************/401#define NIA_ENG_MASK 0x007C0000402#define NIA_AC_MASK 0x0003ffff403404#define NIA_ORDER_RESTOR 0x00800000405#define NIA_ENG_FM_CTL 0x00000000406#define NIA_ENG_PRS 0x00440000407#define NIA_ENG_KG 0x00480000408#define NIA_ENG_PLCR 0x004C0000409#define NIA_ENG_BMI 0x00500000410#define NIA_ENG_QMI_ENQ 0x00540000411#define NIA_ENG_QMI_DEQ 0x00580000412413#define NIA_FM_CTL_AC_CC 0x00000006414#define NIA_FM_CTL_AC_HC 0x0000000C415#define NIA_FM_CTL_AC_IND_MODE_TX 0x00000008416#define NIA_FM_CTL_AC_IND_MODE_RX 0x0000000A417#define NIA_FM_CTL_AC_POP_TO_N_STEP 0x0000000e418#define NIA_FM_CTL_AC_PRE_BMI_FETCH_HEADER 0x00000010419#define NIA_FM_CTL_AC_PRE_BMI_FETCH_FULL_FRAME 0x00000018420#define NIA_FM_CTL_AC_POST_BMI_FETCH 0x00000012421#define NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME 0x0000001A422#define NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME 0x0000001E423#define NIA_FM_CTL_AC_POST_BMI_ENQ_ORR 0x00000014424#define NIA_FM_CTL_AC_POST_BMI_ENQ 0x00000022425#define NIA_FM_CTL_AC_PRE_CC 0x00000020426#define NIA_FM_CTL_AC_POST_TX 0x00000024427/* V3 only */428#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME 0x00000028429#define NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_DISCARD_FRAME 0x0000002A430#define NIA_FM_CTL_AC_NO_IPACC_POP_TO_N_STEP 0x0000002C431432#define NIA_BMI_AC_ENQ_FRAME 0x00000002433#define NIA_BMI_AC_TX_RELEASE 0x000002C0434#define NIA_BMI_AC_RELEASE 0x000000C0435#define NIA_BMI_AC_DISCARD 0x000000C1436#define NIA_BMI_AC_TX 0x00000274437#define NIA_BMI_AC_FETCH 0x00000208438#define NIA_BMI_AC_MASK 0x000003FF439440#define NIA_KG_DIRECT 0x00000100441#define NIA_KG_CC_EN 0x00000200442#define NIA_PLCR_ABSOLUTE 0x00008000443444#define NIA_BMI_AC_ENQ_FRAME_WITHOUT_DMA 0x00000202445446#if defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || defined(FM_ERROR_VSP_NO_MATCH_SW006)447#define GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd) \448(uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \449(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME) : \450(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME))451#define GET_NIA_BMI_AC_DISCARD_FRAME(h_FmPcd) \452(uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \453(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME) : \454(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_DISCARD_FRAME))455#define GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME() \456(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_NO_IPACC_PRE_BMI_ENQ_FRAME)457#else458#define GET_NIA_BMI_AC_ENQ_FRAME(h_FmPcd) \459(uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \460(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_ENQ_FRAME) : \461(NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME))462#define GET_NIA_BMI_AC_DISCARD_FRAME(h_FmPcd) \463(uint32_t)((FmPcdIsAdvancedOffloadSupported(h_FmPcd)) ? \464(NIA_ENG_FM_CTL | NIA_FM_CTL_AC_PRE_BMI_DISCARD_FRAME) : \465(NIA_ENG_BMI | NIA_BMI_AC_DISCARD))466#define GET_NO_PCD_NIA_BMI_AC_ENQ_FRAME() \467(NIA_ENG_BMI | NIA_BMI_AC_ENQ_FRAME)468#endif /* defined(FM_OP_NO_VSP_NO_RELEASE_ERRATA_FMAN_A006675) || ... */469470/**************************************************************************//**471@Description CTRL Parameters Page defines472*//***************************************************************************/473#define FM_CTL_PARAMS_PAGE_OP_FIX_EN 0x80000000474#define FM_CTL_PARAMS_PAGE_OFFLOAD_SUPPORT_EN 0x40000000475#define FM_CTL_PARAMS_PAGE_ALWAYS_ON 0x00000100476477#define FM_CTL_PARAMS_PAGE_ERROR_VSP_MASK 0x0000003f478479/**************************************************************************//**480@Description Port Id defines481*//***************************************************************************/482#if (DPAA_VERSION == 10)483#define BASE_OH_PORTID 1484#else485#define BASE_OH_PORTID 2486#endif /* (DPAA_VERSION == 10) */487#define BASE_1G_RX_PORTID 8488#define BASE_10G_RX_PORTID 0x10489#define BASE_1G_TX_PORTID 0x28490#define BASE_10G_TX_PORTID 0x30491492#define FM_PCD_PORT_OH_BASE_INDX 0493#define FM_PCD_PORT_1G_RX_BASE_INDX (FM_PCD_PORT_OH_BASE_INDX+FM_MAX_NUM_OF_OH_PORTS)494#define FM_PCD_PORT_10G_RX_BASE_INDX (FM_PCD_PORT_1G_RX_BASE_INDX+FM_MAX_NUM_OF_1G_RX_PORTS)495#define FM_PCD_PORT_1G_TX_BASE_INDX (FM_PCD_PORT_10G_RX_BASE_INDX+FM_MAX_NUM_OF_10G_RX_PORTS)496#define FM_PCD_PORT_10G_TX_BASE_INDX (FM_PCD_PORT_1G_TX_BASE_INDX+FM_MAX_NUM_OF_1G_TX_PORTS)497498#if (FM_MAX_NUM_OF_OH_PORTS > 0)499#define CHECK_PORT_ID_OH_PORTS(_relativePortId) \500if ((_relativePortId) >= FM_MAX_NUM_OF_OH_PORTS) \501REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal OH_PORT port id"))502#else503#define CHECK_PORT_ID_OH_PORTS(_relativePortId) \504REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal OH_PORT port id"))505#endif506#if (FM_MAX_NUM_OF_1G_RX_PORTS > 0)507#define CHECK_PORT_ID_1G_RX_PORTS(_relativePortId) \508if ((_relativePortId) >= FM_MAX_NUM_OF_1G_RX_PORTS) \509REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_RX_PORT port id"))510#else511#define CHECK_PORT_ID_1G_RX_PORTS(_relativePortId) \512REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_RX_PORT port id"))513#endif514#if (FM_MAX_NUM_OF_10G_RX_PORTS > 0)515#define CHECK_PORT_ID_10G_RX_PORTS(_relativePortId) \516if ((_relativePortId) >= FM_MAX_NUM_OF_10G_RX_PORTS) \517REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_RX_PORT port id"))518#else519#define CHECK_PORT_ID_10G_RX_PORTS(_relativePortId) \520REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_RX_PORT port id"))521#endif522#if (FM_MAX_NUM_OF_1G_TX_PORTS > 0)523#define CHECK_PORT_ID_1G_TX_PORTS(_relativePortId) \524if ((_relativePortId) >= FM_MAX_NUM_OF_1G_TX_PORTS) \525REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_TX_PORT port id"))526#else527#define CHECK_PORT_ID_1G_TX_PORTS(_relativePortId) \528REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 1G_TX_PORT port id"))529#endif530#if (FM_MAX_NUM_OF_10G_TX_PORTS > 0)531#define CHECK_PORT_ID_10G_TX_PORTS(_relativePortId) \532if ((_relativePortId) >= FM_MAX_NUM_OF_10G_TX_PORTS) \533REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_TX_PORT port id"))534#else535#define CHECK_PORT_ID_10G_TX_PORTS(_relativePortId) \536REPORT_ERROR(MAJOR, E_INVALID_VALUE, ("Illegal 10G_TX_PORT port id"))537#endif538539uint8_t SwPortIdToHwPortId(e_FmPortType type, uint8_t relativePortId, uint8_t majorRev, uint8_t minorRev);540541#define HW_PORT_ID_TO_SW_PORT_ID(_relativePortId, hardwarePortId) \542{ if (((hardwarePortId) >= BASE_OH_PORTID) && \543((hardwarePortId) < BASE_OH_PORTID+FM_MAX_NUM_OF_OH_PORTS)) \544_relativePortId = (uint8_t)((hardwarePortId)-BASE_OH_PORTID); \545else if (((hardwarePortId) >= BASE_10G_TX_PORTID) && \546((hardwarePortId) < BASE_10G_TX_PORTID+FM_MAX_NUM_OF_10G_TX_PORTS)) \547_relativePortId = (uint8_t)((hardwarePortId)-BASE_10G_TX_PORTID); \548else if (((hardwarePortId) >= BASE_1G_TX_PORTID) && \549((hardwarePortId) < BASE_1G_TX_PORTID+FM_MAX_NUM_OF_1G_TX_PORTS)) \550_relativePortId = (uint8_t)((hardwarePortId)-BASE_1G_TX_PORTID); \551else if (((hardwarePortId) >= BASE_10G_RX_PORTID) && \552((hardwarePortId) < BASE_10G_RX_PORTID+FM_MAX_NUM_OF_10G_RX_PORTS)) \553_relativePortId = (uint8_t)((hardwarePortId)-BASE_10G_RX_PORTID); \554else if (((hardwarePortId) >= BASE_1G_RX_PORTID) && \555((hardwarePortId) < BASE_1G_RX_PORTID+FM_MAX_NUM_OF_1G_RX_PORTS)) \556_relativePortId = (uint8_t)((hardwarePortId)-BASE_1G_RX_PORTID); \557else { \558_relativePortId = (uint8_t)DUMMY_PORT_ID; \559ASSERT_COND(TRUE); \560} \561}562563#define HW_PORT_ID_TO_SW_PORT_INDX(swPortIndex, hardwarePortId) \564do { \565if (((hardwarePortId) >= BASE_OH_PORTID) && ((hardwarePortId) < BASE_OH_PORTID+FM_MAX_NUM_OF_OH_PORTS)) \566swPortIndex = (uint8_t)((hardwarePortId)-BASE_OH_PORTID+FM_PCD_PORT_OH_BASE_INDX); \567else if (((hardwarePortId) >= BASE_1G_RX_PORTID) && \568((hardwarePortId) < BASE_1G_RX_PORTID+FM_MAX_NUM_OF_1G_RX_PORTS)) \569swPortIndex = (uint8_t)((hardwarePortId)-BASE_1G_RX_PORTID+FM_PCD_PORT_1G_RX_BASE_INDX); \570else if (((hardwarePortId) >= BASE_10G_RX_PORTID) && \571((hardwarePortId) < BASE_10G_RX_PORTID+FM_MAX_NUM_OF_10G_RX_PORTS)) \572swPortIndex = (uint8_t)((hardwarePortId)-BASE_10G_RX_PORTID+FM_PCD_PORT_10G_RX_BASE_INDX); \573else if (((hardwarePortId) >= BASE_1G_TX_PORTID) && \574((hardwarePortId) < BASE_1G_TX_PORTID+FM_MAX_NUM_OF_1G_TX_PORTS)) \575swPortIndex = (uint8_t)((hardwarePortId)-BASE_1G_TX_PORTID+FM_PCD_PORT_1G_TX_BASE_INDX); \576else if (((hardwarePortId) >= BASE_10G_TX_PORTID) && \577((hardwarePortId) < BASE_10G_TX_PORTID+FM_MAX_NUM_OF_10G_TX_PORTS)) \578swPortIndex = (uint8_t)((hardwarePortId)-BASE_10G_TX_PORTID+FM_PCD_PORT_10G_TX_BASE_INDX); \579else ASSERT_COND(FALSE); \580} while (0)581582#define SW_PORT_INDX_TO_HW_PORT_ID(hardwarePortId, swPortIndex) \583do { \584if (((swPortIndex) >= FM_PCD_PORT_OH_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_1G_RX_BASE_INDX)) \585hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_OH_BASE_INDX+BASE_OH_PORTID); \586else if (((swPortIndex) >= FM_PCD_PORT_1G_RX_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_10G_RX_BASE_INDX)) \587hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_1G_RX_BASE_INDX+BASE_1G_RX_PORTID); \588else if (((swPortIndex) >= FM_PCD_PORT_10G_RX_BASE_INDX) && ((swPortIndex) < FM_MAX_NUM_OF_PORTS)) \589hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_10G_RX_BASE_INDX+BASE_10G_RX_PORTID); \590else if (((swPortIndex) >= FM_PCD_PORT_1G_TX_BASE_INDX) && ((swPortIndex) < FM_PCD_PORT_10G_TX_BASE_INDX)) \591hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_1G_TX_BASE_INDX+BASE_1G_TX_PORTID); \592else if (((swPortIndex) >= FM_PCD_PORT_10G_TX_BASE_INDX) && ((swPortIndex) < FM_MAX_NUM_OF_PORTS)) \593hardwarePortId = (uint8_t)((swPortIndex)-FM_PCD_PORT_10G_TX_BASE_INDX+BASE_10G_TX_PORTID); \594else ASSERT_COND(FALSE); \595} while (0)596597#define BMI_MAX_FIFO_SIZE (FM_MURAM_SIZE)598#define BMI_FIFO_UNITS 0x100599600typedef struct {601void (*f_Isr) (t_Handle h_Arg);602t_Handle h_SrcHandle;603uint8_t guestId;604} t_FmIntrSrc;605606#define ILLEGAL_HDR_NUM 0xFF607#define NO_HDR_NUM FM_PCD_PRS_NUM_OF_HDRS608609#define IS_PRIVATE_HEADER(hdr) (((hdr) == HEADER_TYPE_USER_DEFINED_SHIM1) || \610((hdr) == HEADER_TYPE_USER_DEFINED_SHIM2))611#define IS_SPECIAL_HEADER(hdr) ((hdr) == HEADER_TYPE_MACSEC)612613static __inline__ uint8_t GetPrsHdrNum(e_NetHeaderType hdr)614{615switch (hdr)616{ case (HEADER_TYPE_ETH): return 0;617case (HEADER_TYPE_LLC_SNAP): return 1;618case (HEADER_TYPE_VLAN): return 2;619case (HEADER_TYPE_PPPoE): return 3;620case (HEADER_TYPE_PPP): return 3;621case (HEADER_TYPE_MPLS): return 4;622case (HEADER_TYPE_IPv4): return 5;623case (HEADER_TYPE_IPv6): return 6;624case (HEADER_TYPE_GRE): return 7;625case (HEADER_TYPE_MINENCAP): return 8;626case (HEADER_TYPE_USER_DEFINED_L3): return 9;627case (HEADER_TYPE_TCP): return 10;628case (HEADER_TYPE_UDP): return 11;629case (HEADER_TYPE_IPSEC_AH):630case (HEADER_TYPE_IPSEC_ESP): return 12;631case (HEADER_TYPE_SCTP): return 13;632case (HEADER_TYPE_DCCP): return 14;633case (HEADER_TYPE_USER_DEFINED_L4): return 15;634case (HEADER_TYPE_USER_DEFINED_SHIM1):635case (HEADER_TYPE_USER_DEFINED_SHIM2):636case (HEADER_TYPE_MACSEC): return NO_HDR_NUM;637default:638return ILLEGAL_HDR_NUM;639}640}641642#define FM_PCD_MAX_NUM_OF_OPTIONS(clsPlanEntries) ((clsPlanEntries==256)? 8:((clsPlanEntries==128)? 7: ((clsPlanEntries==64)? 6: ((clsPlanEntries==32)? 5:0))))643644645/**************************************************************************//**646@Description A structure for initializing a keygen classification plan group647*//***************************************************************************/648typedef struct t_FmPcdKgInterModuleClsPlanGrpParams {649uint8_t netEnvId; /* IN */650bool grpExists; /* OUT (unused in FmPcdKgBuildClsPlanGrp)*/651uint8_t clsPlanGrpId; /* OUT */652bool emptyClsPlanGrp; /* OUT */653uint8_t numOfOptions; /* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/654protocolOpt_t options[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];655/* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/656uint32_t optVectors[FM_PCD_MAX_NUM_OF_OPTIONS(FM_PCD_MAX_NUM_OF_CLS_PLANS)];657/* OUT in FmPcdGetSetClsPlanGrpParams IN in FmPcdKgBuildClsPlanGrp*/658} t_FmPcdKgInterModuleClsPlanGrpParams;659660typedef struct t_FmPcdLock {661t_Handle h_Spinlock;662volatile bool flag;663t_List node;664} t_FmPcdLock;665#define FM_PCD_LOCK_OBJ(ptr) NCSW_LIST_OBJECT(ptr, t_FmPcdLock, node)666667668typedef t_Error (t_FmPortGetSetCcParamsCallback) (t_Handle h_FmPort,669t_FmPortGetSetCcParams *p_FmPortGetSetCcParams);670671672/***********************************************************************/673/* Common API for FM-PCD module */674/***********************************************************************/675t_Handle FmPcdGetHcHandle(t_Handle h_FmPcd);676uint32_t FmPcdGetSwPrsOffset(t_Handle h_FmPcd, e_NetHeaderType hdr, uint8_t indexPerHdr);677uint32_t FmPcdGetLcv(t_Handle h_FmPcd, uint32_t netEnvId, uint8_t hdrNum);678uint32_t FmPcdGetMacsecLcv(t_Handle h_FmPcd, uint32_t netEnvId);679void FmPcdIncNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId);680void FmPcdDecNetEnvOwners(t_Handle h_FmPcd, uint8_t netEnvId);681uint8_t FmPcdGetNetEnvId(t_Handle h_NetEnv);682void FmPcdPortRegister(t_Handle h_FmPcd, t_Handle h_FmPort, uint8_t hardwarePortId);683uint32_t FmPcdLock(t_Handle h_FmPcd);684void FmPcdUnlock(t_Handle h_FmPcd, uint32_t intFlags);685bool FmPcdNetEnvIsHdrExist(t_Handle h_FmPcd, uint8_t netEnvId, e_NetHeaderType hdr);686t_Error FmPcdFragHcScratchPoolInit(t_Handle h_FmPcd, uint8_t scratchBpid);687t_Error FmPcdRegisterReassmPort(t_Handle h_FmPcd, t_Handle h_IpReasmCommonPramTbl);688t_Error FmPcdUnregisterReassmPort(t_Handle h_FmPcd, t_Handle h_IpReasmCommonPramTbl);689bool FmPcdIsAdvancedOffloadSupported(t_Handle h_FmPcd);690bool FmPcdLockTryLockAll(t_Handle h_FmPcd);691void FmPcdLockUnlockAll(t_Handle h_FmPcd);692t_Error FmPcdHcSync(t_Handle h_FmPcd);693t_Handle FmGetPcd(t_Handle h_Fm);694/***********************************************************************/695/* Common API for FM-PCD KG module */696/***********************************************************************/697uint8_t FmPcdKgGetClsPlanGrpBase(t_Handle h_FmPcd, uint8_t clsPlanGrp);698uint16_t FmPcdKgGetClsPlanGrpSize(t_Handle h_FmPcd, uint8_t clsPlanGrp);699t_Error FmPcdKgBuildClsPlanGrp(t_Handle h_FmPcd, t_FmPcdKgInterModuleClsPlanGrpParams *p_Grp, t_FmPcdKgInterModuleClsPlanSet *p_ClsPlanSet);700701uint8_t FmPcdKgGetSchemeId(t_Handle h_Scheme);702#if (DPAA_VERSION >= 11)703bool FmPcdKgGetVspe(t_Handle h_Scheme);704#endif /* (DPAA_VERSION >= 11) */705uint8_t FmPcdKgGetRelativeSchemeId(t_Handle h_FmPcd, uint8_t schemeId);706void FmPcdKgDestroyClsPlanGrp(t_Handle h_FmPcd, uint8_t grpId);707t_Error FmPcdKgCheckInvalidateSchemeSw(t_Handle h_Scheme);708t_Error FmPcdKgBuildBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_BindPortToSchemes, uint32_t *p_SpReg, bool add);709bool FmPcdKgHwSchemeIsValid(uint32_t schemeModeReg);710uint32_t FmPcdKgBuildWriteSchemeActionReg(uint8_t schemeId, bool updateCounter);711uint32_t FmPcdKgBuildReadSchemeActionReg(uint8_t schemeId);712uint32_t FmPcdKgBuildWriteClsPlanBlockActionReg(uint8_t grpId);713uint32_t FmPcdKgBuildWritePortSchemeBindActionReg(uint8_t hardwarePortId);714uint32_t FmPcdKgBuildReadPortSchemeBindActionReg(uint8_t hardwarePortId);715uint32_t FmPcdKgBuildWritePortClsPlanBindActionReg(uint8_t hardwarePortId);716bool FmPcdKgIsSchemeValidSw(t_Handle h_Scheme);717718t_Error FmPcdKgBindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind);719t_Error FmPcdKgUnbindPortToSchemes(t_Handle h_FmPcd , t_FmPcdKgInterModuleBindPortToSchemes *p_SchemeBind);720uint32_t FmPcdKgGetRequiredAction(t_Handle h_FmPcd, uint8_t schemeId);721uint32_t FmPcdKgGetRequiredActionFlag(t_Handle h_FmPcd, uint8_t schemeId);722e_FmPcdDoneAction FmPcdKgGetDoneAction(t_Handle h_FmPcd, uint8_t schemeId);723e_FmPcdEngine FmPcdKgGetNextEngine(t_Handle h_FmPcd, uint8_t schemeId);724void FmPcdKgUpdateRequiredAction(t_Handle h_Scheme, uint32_t requiredAction);725bool FmPcdKgIsDirectPlcr(t_Handle h_FmPcd, uint8_t schemeId);726bool FmPcdKgIsDistrOnPlcrProfile(t_Handle h_FmPcd, uint8_t schemeId);727uint16_t FmPcdKgGetRelativeProfileId(t_Handle h_FmPcd, uint8_t schemeId);728t_Handle FmPcdKgGetSchemeHandle(t_Handle h_FmPcd, uint8_t relativeSchemeId);729bool FmPcdKgIsSchemeHasOwners(t_Handle h_Scheme);730t_Error FmPcdKgCcGetSetParams(t_Handle h_FmPcd, t_Handle h_Scheme, uint32_t requiredAction, uint32_t value);731t_Error FmPcdKgSetOrBindToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t netEnvId, protocolOpt_t *p_OptArray, uint8_t *p_ClsPlanGrpId, bool *p_IsEmptyClsPlanGrp);732t_Error FmPcdKgDeleteOrUnbindPortToClsPlanGrp(t_Handle h_FmPcd, uint8_t hardwarePortId, uint8_t clsPlanGrpId);733734/***********************************************************************/735/* Common API for FM-PCD parser module */736/***********************************************************************/737t_Error FmPcdPrsIncludePortInStatistics(t_Handle p_FmPcd, uint8_t hardwarePortId, bool include);738739/***********************************************************************/740/* Common API for FM-PCD policer module */741/***********************************************************************/742t_Error FmPcdPlcrAllocProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId, uint16_t numOfProfiles);743t_Error FmPcdPlcrFreeProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId);744bool FmPcdPlcrIsProfileValid(t_Handle h_FmPcd, uint16_t absoluteProfileId);745uint16_t FmPcdPlcrGetPortProfilesBase(t_Handle h_FmPcd, uint8_t hardwarePortId);746uint16_t FmPcdPlcrGetPortNumOfProfiles(t_Handle h_FmPcd, uint8_t hardwarePortId);747uint32_t FmPcdPlcrBuildWritePlcrActionRegs(uint16_t absoluteProfileId);748uint32_t FmPcdPlcrBuildCounterProfileReg(e_FmPcdPlcrProfileCounters counter);749uint32_t FmPcdPlcrBuildWritePlcrActionReg(uint16_t absoluteProfileId);750uint32_t FmPcdPlcrBuildReadPlcrActionReg(uint16_t absoluteProfileId);751uint16_t FmPcdPlcrProfileGetAbsoluteId(t_Handle h_Profile);752t_Error FmPcdPlcrGetAbsoluteIdByProfileParams(t_Handle h_FmPcd,753e_FmPcdProfileTypeSelection profileType,754t_Handle h_FmPort,755uint16_t relativeProfile,756uint16_t *p_AbsoluteId);757void FmPcdPlcrInvalidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);758void FmPcdPlcrValidateProfileSw(t_Handle h_FmPcd, uint16_t absoluteProfileId);759bool FmPcdPlcrHwProfileIsValid(uint32_t profileModeReg);760uint32_t FmPcdPlcrGetRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId);761uint32_t FmPcdPlcrGetRequiredActionFlag(t_Handle h_FmPcd, uint16_t absoluteProfileId);762uint32_t FmPcdPlcrBuildNiaProfileReg(bool green, bool yellow, bool red);763void FmPcdPlcrUpdateRequiredAction(t_Handle h_FmPcd, uint16_t absoluteProfileId, uint32_t requiredAction);764t_Error FmPcdPlcrCcGetSetParams(t_Handle h_FmPcd, uint16_t profileIndx,uint32_t requiredAction);765766/***********************************************************************/767/* Common API for FM-PCD CC module */768/***********************************************************************/769uint8_t FmPcdCcGetParseCode(t_Handle h_CcNode);770uint8_t FmPcdCcGetOffset(t_Handle h_CcNode);771t_Error FmPcdCcRemoveKey(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex);772t_Error FmPcdCcAddKey(t_Handle h_FmPcd, t_Handle h_CcNode, uint16_t keyIndex, uint8_t keySize, t_FmPcdCcKeyParams *p_FmPCdCcKeyParams);773t_Error FmPcdCcModifyKey(t_Handle h_FmPcd, t_Handle h_CcNode, uint16_t keyIndex, uint8_t keySize, uint8_t *p_Key, uint8_t *p_Mask);774t_Error FmPcdCcModifyKeyAndNextEngine(t_Handle h_FmPcd, t_Handle h_FmPcdCcNode, uint16_t keyIndex, uint8_t keySize, t_FmPcdCcKeyParams *p_FmPcdCcKeyParams);775t_Error FmPcdCcModifyMissNextEngineParamNode(t_Handle h_FmPcd,t_Handle h_FmPcdCcNode, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);776t_Error FmPcdCcModifyNextEngineParamTree(t_Handle h_FmPcd, t_Handle h_FmPcdCcTree, uint8_t grpId, uint8_t index, t_FmPcdCcNextEngineParams *p_FmPcdCcNextEngineParams);777uint32_t FmPcdCcGetNodeAddrOffsetFromNodeInfo(t_Handle h_FmPcd, t_Handle h_Pointer);778t_Handle FmPcdCcTreeGetSavedManipParams(t_Handle h_FmTree);779void FmPcdCcTreeSetSavedManipParams(t_Handle h_FmTree, t_Handle h_SavedManipParams);780t_Error FmPcdCcTreeAddIPR(t_Handle h_FmPcd, t_Handle h_FmTree, t_Handle h_NetEnv, t_Handle h_ReassemblyManip, bool schemes);781t_Error FmPcdCcTreeAddCPR(t_Handle h_FmPcd, t_Handle h_FmTree, t_Handle h_NetEnv, t_Handle h_ReassemblyManip, bool schemes);782t_Error FmPcdCcBindTree(t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_CcTree, uint32_t *p_Offset,t_Handle h_FmPort);783t_Error FmPcdCcUnbindTree(t_Handle h_FmPcd, t_Handle h_CcTree);784785/***********************************************************************/786/* Common API for FM-PCD Manip module */787/***********************************************************************/788t_Error FmPcdManipUpdate(t_Handle h_FmPcd, t_Handle h_PcdParams, t_Handle h_FmPort, t_Handle h_Manip, t_Handle h_Ad, bool validate, int level, t_Handle h_FmTree, bool modify);789790/***********************************************************************/791/* Common API for FM-Port module */792/***********************************************************************/793#if (DPAA_VERSION >= 11)794typedef enum e_FmPortGprFuncType795{796e_FM_PORT_GPR_EMPTY = 0,797e_FM_PORT_GPR_MURAM_PAGE798} e_FmPortGprFuncType;799800t_Error FmPortSetGprFunc(t_Handle h_FmPort, e_FmPortGprFuncType gprFunc, void **p_Value);801#endif /* DPAA_VERSION >= 11) */802t_Error FmGetSetParams(t_Handle h_Fm, t_FmGetSetParams *p_FmGetSetParams);803t_Error FmPortGetSetCcParams(t_Handle h_FmPort, t_FmPortGetSetCcParams *p_FmPortGetSetCcParams);804uint8_t FmPortGetNetEnvId(t_Handle h_FmPort);805uint8_t FmPortGetHardwarePortId(t_Handle h_FmPort);806uint32_t FmPortGetPcdEngines(t_Handle h_FmPort);807void FmPortPcdKgSwUnbindClsPlanGrp (t_Handle h_FmPort);808809810#if (DPAA_VERSION >= 11)811t_Error FmPcdFrmReplicUpdate(t_Handle h_FmPcd, t_Handle h_FmPort, t_Handle h_FrmReplic);812#endif /* (DPAA_VERSION >= 11) */813814/**************************************************************************//**815@Function FmRegisterIntr816817@Description Used to register an inter-module event handler to be processed by FM818819@Param[in] h_Fm A handle to an FM Module.820@Param[in] mod The module that causes the event821@Param[in] modId Module id - if more than 1 instansiation of this822mode exists,0 otherwise.823@Param[in] intrType Interrupt type (error/normal) selection.824@Param[in] f_Isr The interrupt service routine.825@Param[in] h_Arg Argument to be passed to f_Isr.826827@Return None.828*//***************************************************************************/829void FmRegisterIntr(t_Handle h_Fm,830e_FmEventModules mod,831uint8_t modId,832e_FmIntrType intrType,833void (*f_Isr) (t_Handle h_Arg),834t_Handle h_Arg);835836/**************************************************************************//**837@Function FmUnregisterIntr838839@Description Used to un-register an inter-module event handler that was processed by FM840841@Param[in] h_Fm A handle to an FM Module.842@Param[in] mod The module that causes the event843@Param[in] modId Module id - if more than 1 instansiation of this844mode exists,0 otherwise.845@Param[in] intrType Interrupt type (error/normal) selection.846847@Return None.848*//***************************************************************************/849void FmUnregisterIntr(t_Handle h_Fm,850e_FmEventModules mod,851uint8_t modId,852e_FmIntrType intrType);853854/**************************************************************************//**855@Function FmRegisterFmCtlIntr856857@Description Used to register to one of the fmCtl events in the FM module858859@Param[in] h_Fm A handle to an FM Module.860@Param[in] eventRegId FmCtl event id (0-7).861@Param[in] f_Isr The interrupt service routine.862863@Return E_OK on success; Error code otherwise.864865@Cautions Allowed only following FM_Init().866*//***************************************************************************/867void FmRegisterFmCtlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Fm, uint32_t event));868869870/**************************************************************************//**871@Description enum for defining MAC types872*//***************************************************************************/873typedef enum e_FmMacType {874e_FM_MAC_10G = 0, /**< 10G MAC */875e_FM_MAC_1G /**< 1G MAC */876} e_FmMacType;877878/**************************************************************************//**879@Description Structure for port-FM communication during FM_PORT_Init.880Fields commented 'IN' are passed by the port module to be used881by the FM module.882Fields commented 'OUT' will be filled by FM before returning to port.883Some fields are optional (depending on configuration) and884will be analized by the port and FM modules accordingly.885*//***************************************************************************/886typedef struct t_FmInterModulePortInitParams {887uint8_t hardwarePortId; /**< IN. port Id */888e_FmPortType portType; /**< IN. Port type */889bool independentMode; /**< IN. TRUE if FM Port operates in independent mode */890uint16_t liodnOffset; /**< IN. Port's requested resource */891uint8_t numOfTasks; /**< IN. Port's requested resource */892uint8_t numOfExtraTasks; /**< IN. Port's requested resource */893uint8_t numOfOpenDmas; /**< IN. Port's requested resource */894uint8_t numOfExtraOpenDmas; /**< IN. Port's requested resource */895uint32_t sizeOfFifo; /**< IN. Port's requested resource */896uint32_t extraSizeOfFifo; /**< IN. Port's requested resource */897uint8_t deqPipelineDepth; /**< IN. Port's requested resource */898uint16_t maxFrameLength; /**< IN. Port's max frame length. */899uint16_t liodnBase; /**< IN. Irrelevant for P4080 rev 1.900LIODN base for this port, to be901used together with LIODN offset. */902t_FmPhysAddr fmMuramPhysBaseAddr;/**< OUT. FM-MURAM physical address*/903} t_FmInterModulePortInitParams;904905/**************************************************************************//**906@Description Structure for port-FM communication during FM_PORT_Free.907*//***************************************************************************/908typedef struct t_FmInterModulePortFreeParams {909uint8_t hardwarePortId; /**< IN. port Id */910e_FmPortType portType; /**< IN. Port type */911uint8_t deqPipelineDepth; /**< IN. Port's requested resource */912} t_FmInterModulePortFreeParams;913914/**************************************************************************//**915@Function FmGetPcdPrsBaseAddr916917@Description Get the base address of the Parser from the FM module918919@Param[in] h_Fm A handle to an FM Module.920921@Return Base address.922*//***************************************************************************/923uintptr_t FmGetPcdPrsBaseAddr(t_Handle h_Fm);924925/**************************************************************************//**926@Function FmGetPcdKgBaseAddr927928@Description Get the base address of the Keygen from the FM module929930@Param[in] h_Fm A handle to an FM Module.931932@Return Base address.933*//***************************************************************************/934uintptr_t FmGetPcdKgBaseAddr(t_Handle h_Fm);935936/**************************************************************************//**937@Function FmGetPcdPlcrBaseAddr938939@Description Get the base address of the Policer from the FM module940941@Param[in] h_Fm A handle to an FM Module.942943@Return Base address.944*//***************************************************************************/945uintptr_t FmGetPcdPlcrBaseAddr(t_Handle h_Fm);946947/**************************************************************************//**948@Function FmGetMuramHandle949950@Description Get the handle of the MURAM from the FM module951952@Param[in] h_Fm A handle to an FM Module.953954@Return MURAM module handle.955*//***************************************************************************/956t_Handle FmGetMuramHandle(t_Handle h_Fm);957958/**************************************************************************//**959@Function FmGetPhysicalMuramBase960961@Description Get the physical base address of the MURAM from the FM module962963@Param[in] h_Fm A handle to an FM Module.964@Param[in] fmPhysAddr Physical MURAM base965966@Return Physical base address.967*//***************************************************************************/968void FmGetPhysicalMuramBase(t_Handle h_Fm, t_FmPhysAddr *fmPhysAddr);969970/**************************************************************************//**971@Function FmGetTimeStampScale972973@Description Used internally by other modules in order to get the timeStamp974period as requested by the application.975976This function returns bit number that is incremented every 1 usec.977To calculate timestamp period in nsec, use9781000 / (1 << FmGetTimeStampScale()).979980@Param[in] h_Fm A handle to an FM Module.981982@Return Bit that counts 1 usec.983984@Cautions Allowed only following FM_Init().985*//***************************************************************************/986uint32_t FmGetTimeStampScale(t_Handle h_Fm);987988/**************************************************************************//**989@Function FmResumeStalledPort990991@Description Used internally by FM port to release a stalled port.992993@Param[in] h_Fm A handle to an FM Module.994@Param[in] hardwarePortId HW port id.995996@Return E_OK on success; Error code otherwise.997998@Cautions Allowed only following FM_Init().999*//***************************************************************************/1000t_Error FmResumeStalledPort(t_Handle h_Fm, uint8_t hardwarePortId);10011002/**************************************************************************//**1003@Function FmIsPortStalled10041005@Description Used internally by FM port to read the port's status.10061007@Param[in] h_Fm A handle to an FM Module.1008@Param[in] hardwarePortId HW port id.1009@Param[in] p_IsStalled A pointer to the boolean port stalled state10101011@Return E_OK on success; Error code otherwise.10121013@Cautions Allowed only following FM_Init().1014*//***************************************************************************/1015t_Error FmIsPortStalled(t_Handle h_Fm, uint8_t hardwarePortId, bool *p_IsStalled);10161017/**************************************************************************//**1018@Function FmResetMac10191020@Description Used by MAC driver to reset the MAC registers10211022@Param[in] h_Fm A handle to an FM Module.1023@Param[in] type MAC type.1024@Param[in] macId MAC id - according to type.10251026@Return E_OK on success; Error code otherwise.10271028@Cautions Allowed only following FM_Init().1029*//***************************************************************************/1030t_Error FmResetMac(t_Handle h_Fm, e_FmMacType type, uint8_t macId);10311032/**************************************************************************//**1033@Function FmGetClockFreq10341035@Description Used by MAC driver to get the FM clock frequency10361037@Param[in] h_Fm A handle to an FM Module.10381039@Return clock-freq on success; 0 otherwise.10401041@Cautions Allowed only following FM_Init().1042*//***************************************************************************/1043uint16_t FmGetClockFreq(t_Handle h_Fm);10441045/**************************************************************************//**1046@Function FmGetMacClockFreq10471048@Description Used by MAC driver to get the MAC clock frequency10491050@Param[in] h_Fm A handle to an FM Module.10511052@Return clock-freq on success; 0 otherwise.10531054@Cautions Allowed only following FM_Init().1055*//***************************************************************************/1056uint16_t FmGetMacClockFreq(t_Handle h_Fm);10571058/**************************************************************************//**1059@Function FmGetId10601061@Description Used by PCD driver to read rhe FM id10621063@Param[in] h_Fm A handle to an FM Module.10641065@Return E_OK on success; Error code otherwise.10661067@Cautions Allowed only following FM_Init().1068*//***************************************************************************/1069uint8_t FmGetId(t_Handle h_Fm);10701071/**************************************************************************//**1072@Function FmReset10731074@Description Used to reset the FM10751076@Param[in] h_Fm A handle to an FM Module.10771078@Return E_OK on success; Error code otherwise.1079*//***************************************************************************/1080t_Error FmReset(t_Handle h_Fm);10811082/**************************************************************************//**1083@Function FmGetSetPortParams10841085@Description Used by FM-PORT driver to pass and receive parameters between1086PORT and FM modules.10871088@Param[in] h_Fm A handle to an FM Module.1089@Param[in,out] p_PortParams A structure of FM Port parameters.10901091@Return E_OK on success; Error code otherwise.10921093@Cautions Allowed only following FM_Init().1094*//***************************************************************************/1095t_Error FmGetSetPortParams(t_Handle h_Fm,t_FmInterModulePortInitParams *p_PortParams);10961097/**************************************************************************//**1098@Function FmFreePortParams10991100@Description Used by FM-PORT driver to free port's resources within the FM.11011102@Param[in] h_Fm A handle to an FM Module.1103@Param[in,out] p_PortParams A structure of FM Port parameters.11041105@Return None.11061107@Cautions Allowed only following FM_Init().1108*//***************************************************************************/1109void FmFreePortParams(t_Handle h_Fm,t_FmInterModulePortFreeParams *p_PortParams);11101111/**************************************************************************//**1112@Function FmSetNumOfRiscsPerPort11131114@Description Used by FM-PORT driver to pass parameter between1115PORT and FM modules for working with number of RISC..11161117@Param[in] h_Fm A handle to an FM Module.1118@Param[in] hardwarePortId hardware port Id.1119@Param[in] numOfFmanCtrls number of Fman Controllers.1120@Param[in] orFmanCtrl Fman Controller for order restoration.11211122@Return None.11231124@Cautions Allowed only following FM_Init().1125*//***************************************************************************/1126t_Error FmSetNumOfRiscsPerPort(t_Handle h_Fm, uint8_t hardwarePortId, uint8_t numOfFmanCtrls, t_FmFmanCtrl orFmanCtrl);11271128#if (defined(DEBUG_ERRORS) && (DEBUG_ERRORS > 0))1129/**************************************************************************//*1130@Function FmDumpPortRegs11311132@Description Dumps FM port registers which are part of FM common registers11331134@Param[in] h_Fm A handle to an FM Module.1135@Param[in] hardwarePortId HW port id.11361137@Return E_OK on success; Error code otherwise.11381139@Cautions Allowed only FM_Init().1140*//***************************************************************************/1141t_Error FmDumpPortRegs(t_Handle h_Fm,uint8_t hardwarePortId);1142#endif /* (defined(DEBUG_ERRORS) && ... */11431144void FmRegisterPcd(t_Handle h_Fm, t_Handle h_FmPcd);1145void FmUnregisterPcd(t_Handle h_Fm);1146t_Handle FmGetPcdHandle(t_Handle h_Fm);1147t_Error FmEnableRamsEcc(t_Handle h_Fm);1148t_Error FmDisableRamsEcc(t_Handle h_Fm);1149void FmGetRevision(t_Handle h_Fm, t_FmRevisionInfo *p_FmRevisionInfo);1150t_Error FmAllocFmanCtrlEventReg(t_Handle h_Fm, uint8_t *p_EventId);1151void FmFreeFmanCtrlEventReg(t_Handle h_Fm, uint8_t eventId);1152void FmSetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, uint32_t enableEvents);1153uint32_t FmGetFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId);1154void FmRegisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId, void (*f_Isr) (t_Handle h_Fm, uint32_t event), t_Handle h_Arg);1155void FmUnregisterFmanCtrlIntr(t_Handle h_Fm, uint8_t eventRegId);1156t_Error FmSetMacMaxFrame(t_Handle h_Fm, e_FmMacType type, uint8_t macId, uint16_t mtu);1157bool FmIsMaster(t_Handle h_Fm);1158uint8_t FmGetGuestId(t_Handle h_Fm);1159uint16_t FmGetTnumAgingPeriod(t_Handle h_Fm);1160t_Error FmSetPortPreFetchConfiguration(t_Handle h_Fm, uint8_t portNum, bool preFetchConfigured);1161t_Error FmGetPortPreFetchConfiguration(t_Handle h_Fm, uint8_t portNum, bool *p_PortConfigured, bool *p_PreFetchConfigured);116211631164#ifdef FM_TX_ECC_FRMS_ERRATA_10GMAC_A0041165t_Error Fm10GTxEccWorkaround(t_Handle h_Fm, uint8_t macId);1166#endif /* FM_TX_ECC_FRMS_ERRATA_10GMAC_A004 */11671168void FmMuramClear(t_Handle h_FmMuram);1169t_Error FmSetNumOfOpenDmas(t_Handle h_Fm,1170uint8_t hardwarePortId,1171uint8_t *p_NumOfOpenDmas,1172uint8_t *p_NumOfExtraOpenDmas,1173bool initialConfig);1174t_Error FmSetNumOfTasks(t_Handle h_Fm,1175uint8_t hardwarePortId,1176uint8_t *p_NumOfTasks,1177uint8_t *p_NumOfExtraTasks,1178bool initialConfig);1179t_Error FmSetSizeOfFifo(t_Handle h_Fm,1180uint8_t hardwarePortId,1181uint32_t *p_SizeOfFifo,1182uint32_t *p_ExtraSizeOfFifo,1183bool initialConfig);11841185t_Error FmSetCongestionGroupPFCpriority(t_Handle h_Fm,1186uint32_t congestionGroupId,1187uint8_t priorityBitMap);11881189#if (DPAA_VERSION >= 11)1190t_Error FmVSPAllocForPort(t_Handle h_Fm,1191e_FmPortType portType,1192uint8_t portId,1193uint8_t numOfStorageProfiles);11941195t_Error FmVSPFreeForPort(t_Handle h_Fm,1196e_FmPortType portType,1197uint8_t portId);11981199t_Error FmVSPGetAbsoluteProfileId(t_Handle h_Fm,1200e_FmPortType portType,1201uint8_t portId,1202uint16_t relativeProfile,1203uint16_t *p_AbsoluteId);1204t_Error FmVSPCheckRelativeProfile(t_Handle h_Fm,1205e_FmPortType portType,1206uint8_t portId,1207uint16_t relativeProfile);12081209uintptr_t FmGetVSPBaseAddr(t_Handle h_Fm);1210#endif /* (DPAA_VERSION >= 11) */121112121213#endif /* __FM_COMMON_H */121412151216