Path: blob/main/sys/contrib/vchiq/interface/vchiq_arm/vchiq_kmod.c
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/*-1* Copyright (c) 2012-2015 Oleksandr Tymoshenko <[email protected]>2*3* Redistribution and use in source and binary forms, with or without4* modification, are permitted provided that the following conditions5* are met:6* 1. Redistributions of source code must retain the above copyright7* notice, this list of conditions and the following disclaimer.8* 2. Redistributions in binary form must reproduce the above copyright9* notice, this list of conditions and the following disclaimer in the10* documentation and/or other materials provided with the distribution.11*12* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND13* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE14* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE15* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE16* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL17* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS18* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)19* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT20* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY21* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF22* SUCH DAMAGE.23*/2425#include <sys/cdefs.h>26__FBSDID("$FreeBSD$");2728#include <sys/param.h>29#include <sys/systm.h>30#include <sys/bus.h>31#include <sys/kernel.h>32#include <sys/module.h>33#include <sys/malloc.h>34#include <sys/rman.h>35#include <sys/timeet.h>36#include <sys/timetc.h>37#include <sys/watchdog.h>38#include <machine/bus.h>39#include <machine/cpu.h>40#include <machine/frame.h>41#include <machine/intr.h>4243#include <dev/fdt/fdt_common.h>44#include <dev/ofw/openfirm.h>45#include <dev/ofw/ofw_bus.h>46#include <dev/ofw/ofw_bus_subr.h>4748#include <machine/bus.h>49/* XXXMDC Is this necessary at all? */50#if defined(__aarch64__)51#else52#include <machine/fdt.h>53#endif5455#include "vchiq_arm.h"56#include "vchiq_2835.h"5758#define VCHIQ_LOCK do { \59mtx_lock(&bcm_vchiq_sc->lock); \60} while(0)6162#define VCHIQ_UNLOCK do { \63mtx_unlock(&bcm_vchiq_sc->lock); \64} while(0)6566#ifdef DEBUG67#define dprintf(fmt, args...) printf(fmt, ##args)68#else69#define dprintf(fmt, args...)70#endif7172struct bcm_vchiq_softc {73struct mtx lock;74struct resource * mem_res;75struct resource * irq_res;76void* intr_hl;77bus_space_tag_t bst;78bus_space_handle_t bsh;79int regs_offset;80};8182static struct bcm_vchiq_softc *bcm_vchiq_sc = NULL;838485#define CONFIG_INVALID 086#define CONFIG_VALID 1 << 087#define BSD_REG_ADDRS 1 << 188#define LONG_BULK_SPACE 1 << 28990/*91* Also controls the use of the standard VC address offset for bulk data DMA92* (normal bulks use that offset; bulks for long address spaces use physical93* page addresses)94*/95extern unsigned int g_long_bulk_space;969798/*99* XXXMDC100* The man page for ofw_bus_is_compatible describes ``features''101* as ``can be used''. Here we use understand them as ``must be used''102*/103104static struct ofw_compat_data compat_data[] = {105{"broadcom,bcm2835-vchiq", BSD_REG_ADDRS | CONFIG_VALID},106{"brcm,bcm2835-vchiq", CONFIG_VALID},107{"brcm,bcm2711-vchiq", LONG_BULK_SPACE | CONFIG_VALID},108{NULL, CONFIG_INVALID}109};110111#define vchiq_read_4(reg) \112bus_space_read_4(bcm_vchiq_sc->bst, bcm_vchiq_sc->bsh, (reg) + \113bcm_vchiq_sc->regs_offset)114#define vchiq_write_4(reg, val) \115bus_space_write_4(bcm_vchiq_sc->bst, bcm_vchiq_sc->bsh, (reg) + \116bcm_vchiq_sc->regs_offset, val)117118/*119* Extern functions */120void vchiq_exit(void);121int vchiq_init(void);122123extern VCHIQ_STATE_T g_state;124extern int g_cache_line_size;125126static void127bcm_vchiq_intr(void *arg)128{129VCHIQ_STATE_T *state = &g_state;130unsigned int status;131132/* Read (and clear) the doorbell */133status = vchiq_read_4(0x40);134135if (status & 0x4) { /* Was the doorbell rung? */136remote_event_pollall(state);137}138}139140void141remote_event_signal(REMOTE_EVENT_T *event)142{143144wmb();145146event->fired = 1;147/* The test on the next line also ensures the write on the previous line148has completed */149/* UPDATE: not on arm64, it would seem... */150#if defined(__aarch64__)151dsb(sy);152#endif153if (event->armed) {154/* trigger vc interrupt */155#if defined(__aarch64__)156dsb(sy);157#else158dsb();159#endif160vchiq_write_4(0x48, 0);161}162}163164static int165bcm_vchiq_probe(device_t dev)166{167168if ((ofw_bus_search_compatible(dev, compat_data)->ocd_data & CONFIG_VALID) == 0)169return (ENXIO);170171device_set_desc(dev, "BCM2835 VCHIQ");172return (BUS_PROBE_DEFAULT);173}174175/* debug_sysctl */176extern int vchiq_core_log_level;177extern int vchiq_arm_log_level;178179static int180bcm_vchiq_attach(device_t dev)181{182struct bcm_vchiq_softc *sc = device_get_softc(dev);183phandle_t node;184pcell_t cell;185int rid = 0;186187if (bcm_vchiq_sc != NULL)188return (EINVAL);189190sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);191if (sc->mem_res == NULL) {192device_printf(dev, "could not allocate memory resource\n");193return (ENXIO);194}195196sc->bst = rman_get_bustag(sc->mem_res);197sc->bsh = rman_get_bushandle(sc->mem_res);198199rid = 0;200sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);201if (sc->irq_res == NULL) {202device_printf(dev, "could not allocate interrupt resource\n");203return (ENXIO);204}205206uintptr_t dev_compat_d = ofw_bus_search_compatible(dev, compat_data)->ocd_data;207/* XXXMDC: shouldn't happen (checked for in probe)--but, for symmetry */208if ((dev_compat_d & CONFIG_VALID) == 0){209device_printf(dev, "attempting to attach using invalid config.\n");210bus_release_resource(dev, SYS_RES_IRQ, rid, sc->irq_res);211return (EINVAL);212}213if ((dev_compat_d & BSD_REG_ADDRS) == 0)214sc->regs_offset = -0x40;215if(dev_compat_d & LONG_BULK_SPACE)216g_long_bulk_space = 1;217218node = ofw_bus_get_node(dev);219if ((OF_getencprop(node, "cache-line-size", &cell, sizeof(cell))) > 0)220g_cache_line_size = cell;221222vchiq_core_initialize();223224/* debug_sysctl */225struct sysctl_ctx_list *ctx_l = device_get_sysctl_ctx(dev);226struct sysctl_oid *tree_node = device_get_sysctl_tree(dev);227struct sysctl_oid_list *tree = SYSCTL_CHILDREN(tree_node);228SYSCTL_ADD_INT(229ctx_l, tree, OID_AUTO, "log", CTLFLAG_RW,230&vchiq_core_log_level, vchiq_core_log_level, "log level"231);232SYSCTL_ADD_INT(233ctx_l, tree, OID_AUTO, "arm_log", CTLFLAG_RW,234&vchiq_arm_log_level, vchiq_arm_log_level, "arm log level"235);236237/* Setup and enable the timer */238if (bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,239NULL, bcm_vchiq_intr, sc,240&sc->intr_hl) != 0) {241bus_release_resource(dev, SYS_RES_IRQ, rid,242sc->irq_res);243device_printf(dev, "Unable to setup the clock irq handler.\n");244return (ENXIO);245}246247mtx_init(&sc->lock, "vchiq", 0, MTX_DEF);248bcm_vchiq_sc = sc;249250vchiq_init();251252bus_identify_children(dev);253bus_attach_children(dev);254255return (0);256}257258static int259bcm_vchiq_detach(device_t dev)260{261struct bcm_vchiq_softc *sc = device_get_softc(dev);262263vchiq_exit();264265if (sc->intr_hl)266bus_teardown_intr(dev, sc->irq_res, sc->intr_hl);267bus_release_resource(dev, SYS_RES_IRQ, 0,268sc->irq_res);269bus_release_resource(dev, SYS_RES_MEMORY, 0,270sc->mem_res);271272mtx_destroy(&sc->lock);273274return (0);275}276277278static device_method_t bcm_vchiq_methods[] = {279DEVMETHOD(device_probe, bcm_vchiq_probe),280DEVMETHOD(device_attach, bcm_vchiq_attach),281DEVMETHOD(device_detach, bcm_vchiq_detach),282283/* Bus interface */284DEVMETHOD(bus_add_child, bus_generic_add_child),285286{ 0, 0 }287};288289static driver_t bcm_vchiq_driver = {290"vchiq",291bcm_vchiq_methods,292sizeof(struct bcm_vchiq_softc),293};294295DRIVER_MODULE(vchiq, simplebus, bcm_vchiq_driver, 0, 0);296MODULE_VERSION(vchiq, 1);297298299