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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/contrib/xen/arch-x86/xen-mca.h
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/******************************************************************************
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* arch-x86/mca.h
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*
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* Contributed by Advanced Micro Devices, Inc.
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* Author: Christoph Egger <[email protected]>
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*
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* Guest OS machine check interface to x86 Xen.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/* Full MCA functionality has the following Usecases from the guest side:
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*
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* Must have's:
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* 1. Dom0 and DomU register machine check trap callback handlers
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* (already done via "set_trap_table" hypercall)
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* 2. Dom0 registers machine check event callback handler
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* (doable via EVTCHNOP_bind_virq)
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* 3. Dom0 and DomU fetches machine check data
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* 4. Dom0 wants Xen to notify a DomU
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* 5. Dom0 gets DomU ID from physical address
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* 6. Dom0 wants Xen to kill DomU (already done for "xm destroy")
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*
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* Nice to have's:
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* 7. Dom0 wants Xen to deactivate a physical CPU
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* This is better done as separate task, physical CPU hotplugging,
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* and hypercall(s) should be sysctl's
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* 8. Page migration proposed from Xen NUMA work, where Dom0 can tell Xen to
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* move a DomU (or Dom0 itself) away from a malicious page
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* producing correctable errors.
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* 9. offlining physical page:
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* Xen free's and never re-uses a certain physical page.
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* 10. Testfacility: Allow Dom0 to write values into machine check MSR's
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* and tell Xen to trigger a machine check
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*/
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#ifndef __XEN_PUBLIC_ARCH_X86_MCA_H__
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#define __XEN_PUBLIC_ARCH_X86_MCA_H__
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/* Hypercall */
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#define __HYPERVISOR_mca __HYPERVISOR_arch_0
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/*
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* The xen-unstable repo has interface version 0x03000001; out interface
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* is incompatible with that and any future minor revisions, so we
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* choose a different version number range that is numerically less
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* than that used in xen-unstable.
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*/
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#define XEN_MCA_INTERFACE_VERSION 0x01ecc003
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/* IN: Dom0 calls hypercall to retrieve nonurgent telemetry */
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#define XEN_MC_NONURGENT 0x0001
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/* IN: Dom0/DomU calls hypercall to retrieve urgent telemetry */
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#define XEN_MC_URGENT 0x0002
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/* IN: Dom0 acknowledges previosly-fetched telemetry */
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#define XEN_MC_ACK 0x0004
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/* OUT: All is ok */
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#define XEN_MC_OK 0x0
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/* OUT: Domain could not fetch data. */
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#define XEN_MC_FETCHFAILED 0x1
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/* OUT: There was no machine check data to fetch. */
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#define XEN_MC_NODATA 0x2
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/* OUT: Between notification time and this hypercall an other
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* (most likely) correctable error happened. The fetched data,
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* does not match the original machine check data. */
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#define XEN_MC_NOMATCH 0x4
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/* OUT: DomU did not register MC NMI handler. Try something else. */
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#define XEN_MC_CANNOTHANDLE 0x8
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/* OUT: Notifying DomU failed. Retry later or try something else. */
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#define XEN_MC_NOTDELIVERED 0x10
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/* Note, XEN_MC_CANNOTHANDLE and XEN_MC_NOTDELIVERED are mutually exclusive. */
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/* Applicable to all mc_vcpuid fields below. */
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#define XEN_MC_VCPUID_INVALID 0xffff
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#ifndef __ASSEMBLY__
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#define VIRQ_MCA VIRQ_ARCH_0 /* G. (DOM0) Machine Check Architecture */
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/*
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* Machine Check Architecure:
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* structs are read-only and used to report all kinds of
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* correctable and uncorrectable errors detected by the HW.
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* Dom0 and DomU: register a handler to get notified.
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* Dom0 only: Correctable errors are reported via VIRQ_MCA
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* Dom0 and DomU: Uncorrectable errors are reported via nmi handlers
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*/
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#define MC_TYPE_GLOBAL 0
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#define MC_TYPE_BANK 1
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#define MC_TYPE_EXTENDED 2
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#define MC_TYPE_RECOVERY 3
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struct mcinfo_common {
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uint16_t type; /* structure type */
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uint16_t size; /* size of this struct in bytes */
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};
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typedef struct mcinfo_common xen_mcinfo_common_t;
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#define MC_FLAG_CORRECTABLE (1 << 0)
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#define MC_FLAG_UNCORRECTABLE (1 << 1)
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#define MC_FLAG_RECOVERABLE (1 << 2)
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#define MC_FLAG_POLLED (1 << 3)
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#define MC_FLAG_RESET (1 << 4)
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#define MC_FLAG_CMCI (1 << 5)
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#define MC_FLAG_MCE (1 << 6)
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/* contains global x86 mc information */
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struct mcinfo_global {
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xen_mcinfo_common_t common;
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/* running domain at the time in error (most likely the impacted one) */
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uint16_t mc_domid;
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uint16_t mc_vcpuid; /* virtual cpu scheduled for mc_domid */
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uint32_t mc_socketid; /* physical socket of the physical core */
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uint16_t mc_coreid; /* physical impacted core */
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uint16_t mc_core_threadid; /* core thread of physical core */
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uint32_t mc_apicid;
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uint32_t mc_flags;
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uint64_t mc_gstatus; /* global status */
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};
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/* contains bank local x86 mc information */
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struct mcinfo_bank {
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xen_mcinfo_common_t common;
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uint16_t mc_bank; /* bank nr */
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uint16_t mc_domid; /* Usecase 5: domain referenced by mc_addr on dom0
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* and if mc_addr is valid. Never valid on DomU. */
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uint64_t mc_status; /* bank status */
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uint64_t mc_addr; /* bank address, only valid
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* if addr bit is set in mc_status */
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uint64_t mc_misc;
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uint64_t mc_ctrl2;
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uint64_t mc_tsc;
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};
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struct mcinfo_msr {
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uint64_t reg; /* MSR */
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uint64_t value; /* MSR value */
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};
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typedef struct mcinfo_msr xen_mcinfo_msr_t;
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/* contains mc information from other
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* or additional mc MSRs */
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struct mcinfo_extended {
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xen_mcinfo_common_t common;
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/* You can fill up to five registers.
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* If you need more, then use this structure
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* multiple times. */
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uint32_t mc_msrs; /* Number of msr with valid values. */
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/*
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* Currently Intel extended MSR (32/64) include all gp registers
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* and E(R)FLAGS, E(R)IP, E(R)MISC, up to 11/19 of them might be
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* useful at present. So expand this array to 32 to leave room.
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*/
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xen_mcinfo_msr_t mc_msr[32];
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};
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/* Recovery Action flags. Giving recovery result information to DOM0 */
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/* Xen takes successful recovery action, the error is recovered */
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#define REC_ACTION_RECOVERED (0x1 << 0)
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/* No action is performed by XEN */
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#define REC_ACTION_NONE (0x1 << 1)
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/* It's possible DOM0 might take action ownership in some case */
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#define REC_ACTION_NEED_RESET (0x1 << 2)
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/* Different Recovery Action types, if the action is performed successfully,
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* REC_ACTION_RECOVERED flag will be returned.
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*/
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/* Page Offline Action */
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#define MC_ACTION_PAGE_OFFLINE (0x1 << 0)
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/* CPU offline Action */
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#define MC_ACTION_CPU_OFFLINE (0x1 << 1)
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/* L3 cache disable Action */
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#define MC_ACTION_CACHE_SHRINK (0x1 << 2)
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/* Below interface used between XEN/DOM0 for passing XEN's recovery action
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* information to DOM0.
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* usage Senario: After offlining broken page, XEN might pass its page offline
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* recovery action result to DOM0. DOM0 will save the information in
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* non-volatile memory for further proactive actions, such as offlining the
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* easy broken page earlier when doing next reboot.
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*/
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struct page_offline_action
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{
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/* Params for passing the offlined page number to DOM0 */
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uint64_t mfn;
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uint64_t status;
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};
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typedef struct page_offline_action xen_page_offline_action_t;
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struct cpu_offline_action
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{
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/* Params for passing the identity of the offlined CPU to DOM0 */
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uint32_t mc_socketid;
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uint16_t mc_coreid;
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uint16_t mc_core_threadid;
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};
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typedef struct cpu_offline_action xen_cpu_offline_action_t;
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#define MAX_UNION_SIZE 16
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struct mcinfo_recovery
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{
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xen_mcinfo_common_t common;
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uint16_t mc_bank; /* bank nr */
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uint8_t action_flags;
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uint8_t action_types;
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union {
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xen_page_offline_action_t page_retire;
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xen_cpu_offline_action_t cpu_offline;
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uint8_t pad[MAX_UNION_SIZE];
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} action_info;
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};
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#define MCINFO_HYPERCALLSIZE 1024
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#define MCINFO_MAXSIZE 768
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#define MCINFO_FLAGS_UNCOMPLETE 0x1
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struct mc_info {
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/* Number of mcinfo_* entries in mi_data */
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uint32_t mi_nentries;
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uint32_t flags;
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uint64_t mi_data[(MCINFO_MAXSIZE - 1) / 8];
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};
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typedef struct mc_info mc_info_t;
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DEFINE_XEN_GUEST_HANDLE(mc_info_t);
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#define __MC_MSR_ARRAYSIZE 8
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#if __XEN_INTERFACE_VERSION__ <= 0x00040d00
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#define __MC_NMSRS 1
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#endif
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#define MC_NCAPS 7 /* 7 CPU feature flag words */
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#define MC_CAPS_STD_EDX 0 /* cpuid level 0x00000001 (%edx) */
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#define MC_CAPS_AMD_EDX 1 /* cpuid level 0x80000001 (%edx) */
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#define MC_CAPS_TM 2 /* cpuid level 0x80860001 (TransMeta) */
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#define MC_CAPS_LINUX 3 /* Linux-defined */
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#define MC_CAPS_STD_ECX 4 /* cpuid level 0x00000001 (%ecx) */
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#define MC_CAPS_VIA 5 /* cpuid level 0xc0000001 */
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#define MC_CAPS_AMD_ECX 6 /* cpuid level 0x80000001 (%ecx) */
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struct mcinfo_logical_cpu {
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uint32_t mc_cpunr;
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uint32_t mc_chipid;
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uint16_t mc_coreid;
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uint16_t mc_threadid;
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uint32_t mc_apicid;
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uint32_t mc_clusterid;
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uint32_t mc_ncores;
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uint32_t mc_ncores_active;
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uint32_t mc_nthreads;
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int32_t mc_cpuid_level;
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uint32_t mc_family;
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uint32_t mc_vendor;
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uint32_t mc_model;
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uint32_t mc_step;
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char mc_vendorid[16];
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char mc_brandid[64];
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uint32_t mc_cpu_caps[MC_NCAPS];
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uint32_t mc_cache_size;
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uint32_t mc_cache_alignment;
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int32_t mc_nmsrvals;
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xen_mcinfo_msr_t mc_msrvalues[__MC_MSR_ARRAYSIZE];
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};
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typedef struct mcinfo_logical_cpu xen_mc_logical_cpu_t;
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DEFINE_XEN_GUEST_HANDLE(xen_mc_logical_cpu_t);
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/*
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* OS's should use these instead of writing their own lookup function
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* each with its own bugs and drawbacks.
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* We use macros instead of static inline functions to allow guests
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* to include this header in assembly files (*.S).
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*/
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/* Prototype:
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* uint32_t x86_mcinfo_nentries(struct mc_info *mi);
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*/
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#define x86_mcinfo_nentries(_mi) \
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(_mi)->mi_nentries
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/* Prototype:
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* struct mcinfo_common *x86_mcinfo_first(struct mc_info *mi);
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*/
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#define x86_mcinfo_first(_mi) \
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((struct mcinfo_common *)(_mi)->mi_data)
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/* Prototype:
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* struct mcinfo_common *x86_mcinfo_next(struct mcinfo_common *mic);
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*/
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#define x86_mcinfo_next(_mic) \
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((struct mcinfo_common *)((uint8_t *)(_mic) + (_mic)->size))
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/* Prototype:
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* void x86_mcinfo_lookup(void *ret, struct mc_info *mi, uint16_t type);
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*/
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#define x86_mcinfo_lookup(_ret, _mi, _type) \
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do { \
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uint32_t found, i; \
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struct mcinfo_common *_mic; \
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\
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found = 0; \
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(_ret) = NULL; \
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if (_mi == NULL) break; \
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_mic = x86_mcinfo_first(_mi); \
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for (i = 0; i < x86_mcinfo_nentries(_mi); i++) { \
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if (_mic->type == (_type)) { \
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found = 1; \
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break; \
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} \
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_mic = x86_mcinfo_next(_mic); \
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} \
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(_ret) = found ? _mic : NULL; \
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} while (0)
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/* Usecase 1
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* Register machine check trap callback handler
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* (already done via "set_trap_table" hypercall)
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*/
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/* Usecase 2
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* Dom0 registers machine check event callback handler
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* done by EVTCHNOP_bind_virq
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*/
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/* Usecase 3
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* Fetch machine check data from hypervisor.
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* Note, this hypercall is special, because both Dom0 and DomU must use this.
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*/
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#define XEN_MC_fetch 1
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struct xen_mc_fetch {
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/* IN/OUT variables. */
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uint32_t flags; /* IN: XEN_MC_NONURGENT, XEN_MC_URGENT,
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XEN_MC_ACK if ack'ing an earlier fetch */
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/* OUT: XEN_MC_OK, XEN_MC_FETCHFAILED,
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XEN_MC_NODATA, XEN_MC_NOMATCH */
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uint32_t _pad0;
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uint64_t fetch_id; /* OUT: id for ack, IN: id we are ack'ing */
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/* OUT variables. */
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XEN_GUEST_HANDLE(mc_info_t) data;
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};
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typedef struct xen_mc_fetch xen_mc_fetch_t;
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DEFINE_XEN_GUEST_HANDLE(xen_mc_fetch_t);
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/* Usecase 4
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* This tells the hypervisor to notify a DomU about the machine check error
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*/
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#define XEN_MC_notifydomain 2
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struct xen_mc_notifydomain {
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/* IN variables. */
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uint16_t mc_domid; /* The unprivileged domain to notify. */
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uint16_t mc_vcpuid; /* The vcpu in mc_domid to notify.
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* Usually echo'd value from the fetch hypercall. */
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/* IN/OUT variables. */
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uint32_t flags;
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/* IN: XEN_MC_CORRECTABLE, XEN_MC_TRAP */
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/* OUT: XEN_MC_OK, XEN_MC_CANNOTHANDLE, XEN_MC_NOTDELIVERED, XEN_MC_NOMATCH */
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};
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typedef struct xen_mc_notifydomain xen_mc_notifydomain_t;
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DEFINE_XEN_GUEST_HANDLE(xen_mc_notifydomain_t);
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#define XEN_MC_physcpuinfo 3
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struct xen_mc_physcpuinfo {
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/* IN/OUT */
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uint32_t ncpus;
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uint32_t _pad0;
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/* OUT */
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XEN_GUEST_HANDLE(xen_mc_logical_cpu_t) info;
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};
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typedef struct xen_mc_physcpuinfo xen_mc_physcpuinfo_t;
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#define XEN_MC_msrinject 4
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#define MC_MSRINJ_MAXMSRS 8
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struct xen_mc_msrinject {
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/* IN */
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uint32_t mcinj_cpunr; /* target processor id */
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uint32_t mcinj_flags; /* see MC_MSRINJ_F_* below */
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uint32_t mcinj_count; /* 0 .. count-1 in array are valid */
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domid_t mcinj_domid; /* valid only if MC_MSRINJ_F_GPADDR is
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present in mcinj_flags */
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uint16_t _pad0;
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xen_mcinfo_msr_t mcinj_msr[MC_MSRINJ_MAXMSRS];
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};
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typedef struct xen_mc_msrinject xen_mc_msrinject_t;
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/* Flags for mcinj_flags above; bits 16-31 are reserved */
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#define MC_MSRINJ_F_INTERPOSE 0x1
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#define MC_MSRINJ_F_GPADDR 0x2
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#define XEN_MC_mceinject 5
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struct xen_mc_mceinject {
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unsigned int mceinj_cpunr; /* target processor id */
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};
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typedef struct xen_mc_mceinject xen_mc_mceinject_t;
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#if defined(__XEN__) || defined(__XEN_TOOLS__)
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#define XEN_MC_inject_v2 6
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#define XEN_MC_INJECT_TYPE_MASK 0x7
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#define XEN_MC_INJECT_TYPE_MCE 0x0
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#define XEN_MC_INJECT_TYPE_CMCI 0x1
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#define XEN_MC_INJECT_TYPE_LMCE 0x2
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#define XEN_MC_INJECT_CPU_BROADCAST 0x8
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struct xen_mc_inject_v2 {
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uint32_t flags;
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xenctl_bitmap_t cpumap;
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};
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typedef struct xen_mc_inject_v2 xen_mc_inject_v2_t;
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#endif
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struct xen_mc {
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uint32_t cmd;
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uint32_t interface_version; /* XEN_MCA_INTERFACE_VERSION */
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union {
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xen_mc_fetch_t mc_fetch;
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xen_mc_notifydomain_t mc_notifydomain;
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xen_mc_physcpuinfo_t mc_physcpuinfo;
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xen_mc_msrinject_t mc_msrinject;
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xen_mc_mceinject_t mc_mceinject;
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#if defined(__XEN__) || defined(__XEN_TOOLS__)
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xen_mc_inject_v2_t mc_inject_v2;
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#endif
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} u;
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};
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typedef struct xen_mc xen_mc_t;
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DEFINE_XEN_GUEST_HANDLE(xen_mc_t);
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#endif /* __ASSEMBLY__ */
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#endif /* __XEN_PUBLIC_ARCH_X86_MCA_H__ */
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