/*1* Permission is hereby granted, free of charge, to any person obtaining a copy2* of this software and associated documentation files (the "Software"), to3* deal in the Software without restriction, including without limitation the4* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or5* sell copies of the Software, and to permit persons to whom the Software is6* furnished to do so, subject to the following conditions:7*8* The above copyright notice and this permission notice shall be included in9* all copies or substantial portions of the Software.10*11* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR12* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,13* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE14* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER15* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING16* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER17* DEALINGS IN THE SOFTWARE.18*19* Copyright (c) 2015, Roger Pau Monne <[email protected]>20*/2122#ifndef __XEN_PUBLIC_HVM_HVM_VCPU_H__23#define __XEN_PUBLIC_HVM_HVM_VCPU_H__2425#include "../xen.h"2627struct vcpu_hvm_x86_32 {28uint32_t eax;29uint32_t ecx;30uint32_t edx;31uint32_t ebx;32uint32_t esp;33uint32_t ebp;34uint32_t esi;35uint32_t edi;36uint32_t eip;37uint32_t eflags;3839uint32_t cr0;40uint32_t cr3;41uint32_t cr4;4243uint32_t pad1;4445/*46* EFER should only be used to set the NXE bit (if required)47* when starting a vCPU in 32bit mode with paging enabled or48* to set the LME/LMA bits in order to start the vCPU in49* compatibility mode.50*/51uint64_t efer;5253uint32_t cs_base;54uint32_t ds_base;55uint32_t ss_base;56uint32_t es_base;57uint32_t tr_base;58uint32_t cs_limit;59uint32_t ds_limit;60uint32_t ss_limit;61uint32_t es_limit;62uint32_t tr_limit;63uint16_t cs_ar;64uint16_t ds_ar;65uint16_t ss_ar;66uint16_t es_ar;67uint16_t tr_ar;6869uint16_t pad2[3];70};71typedef struct vcpu_hvm_x86_32 xen_vcpu_hvm_x86_32_t;7273/*74* The layout of the _ar fields of the segment registers is the75* following:76*77* Bits [0,3]: type (bits 40-43).78* Bit 4: s (descriptor type, bit 44).79* Bit [5,6]: dpl (descriptor privilege level, bits 45-46).80* Bit 7: p (segment-present, bit 47).81* Bit 8: avl (available for system software, bit 52).82* Bit 9: l (64-bit code segment, bit 53).83* Bit 10: db (meaning depends on the segment, bit 54).84* Bit 11: g (granularity, bit 55)85* Bits [12,15]: unused, must be blank.86*87* A more complete description of the meaning of this fields can be88* obtained from the Intel SDM, Volume 3, section 3.4.5.89*/9091struct vcpu_hvm_x86_64 {92uint64_t rax;93uint64_t rcx;94uint64_t rdx;95uint64_t rbx;96uint64_t rsp;97uint64_t rbp;98uint64_t rsi;99uint64_t rdi;100uint64_t rip;101uint64_t rflags;102103uint64_t cr0;104uint64_t cr3;105uint64_t cr4;106uint64_t efer;107108/*109* Using VCPU_HVM_MODE_64B implies that the vCPU is launched110* directly in long mode, so the cached parts of the segment111* registers get set to match that environment.112*113* If the user wants to launch the vCPU in compatibility mode114* the 32-bit structure should be used instead.115*/116};117typedef struct vcpu_hvm_x86_64 xen_vcpu_hvm_x86_64_t;118119struct vcpu_hvm_context {120#define VCPU_HVM_MODE_32B 0 /* 32bit fields of the structure will be used. */121#define VCPU_HVM_MODE_64B 1 /* 64bit fields of the structure will be used. */122uint32_t mode;123124uint32_t pad;125126/* CPU registers. */127union {128xen_vcpu_hvm_x86_32_t x86_32;129xen_vcpu_hvm_x86_64_t x86_64;130} cpu_regs;131};132typedef struct vcpu_hvm_context vcpu_hvm_context_t;133DEFINE_XEN_GUEST_HANDLE(vcpu_hvm_context_t);134135#endif /* __XEN_PUBLIC_HVM_HVM_VCPU_H__ */136137/*138* Local variables:139* mode: C140* c-file-style: "BSD"141* c-basic-offset: 4142* tab-width: 4143* indent-tabs-mode: nil144* End:145*/146147148