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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/dev/aic7xxx/aic7xxx_reg_print.c
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1
/*
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* DO NOT EDIT - This file is automatically generated
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* from the following source files:
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
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* $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
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*/
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9
#include <dev/aic7xxx/aic7xxx_osm.h>
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static ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
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{ "SCSIRSTO", 0x01, 0x01 },
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{ "ENAUTOATNP", 0x02, 0x02 },
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{ "ENAUTOATNI", 0x04, 0x04 },
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{ "ENAUTOATNO", 0x08, 0x08 },
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{ "ENRSELI", 0x10, 0x10 },
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{ "ENSELI", 0x20, 0x20 },
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{ "ENSELO", 0x40, 0x40 },
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{ "TEMODE", 0x80, 0x80 }
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};
21
22
int
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ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
24
{
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return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ",
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0x00, regvalue, cur_col, wrap));
27
}
28
29
static ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
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{ "CLRCHN", 0x02, 0x02 },
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{ "SCAMEN", 0x04, 0x04 },
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{ "SPIOEN", 0x08, 0x08 },
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{ "CLRSTCNT", 0x10, 0x10 },
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{ "FAST20", 0x20, 0x20 },
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{ "DFPEXP", 0x40, 0x40 },
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{ "DFON", 0x80, 0x80 }
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};
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39
int
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ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0",
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0x01, regvalue, cur_col, wrap));
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}
45
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static ahc_reg_parse_entry_t SXFRCTL1_parse_table[] = {
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{ "STPWEN", 0x01, 0x01 },
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{ "ACTNEGEN", 0x02, 0x02 },
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{ "ENSTIMER", 0x04, 0x04 },
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{ "ENSPCHK", 0x20, 0x20 },
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{ "SWRAPEN", 0x40, 0x40 },
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{ "BITBUCKET", 0x80, 0x80 },
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{ "STIMESEL", 0x18, 0x18 }
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};
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int
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ahc_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
58
{
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return (ahc_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
60
0x02, regvalue, cur_col, wrap));
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}
62
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static ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
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{ "ACKI", 0x01, 0x01 },
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{ "REQI", 0x02, 0x02 },
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{ "BSYI", 0x04, 0x04 },
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{ "SELI", 0x08, 0x08 },
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{ "ATNI", 0x10, 0x10 },
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{ "MSGI", 0x20, 0x20 },
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{ "IOI", 0x40, 0x40 },
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{ "CDI", 0x80, 0x80 },
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{ "P_DATAOUT", 0x00, 0x00 },
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{ "P_DATAOUT_DT", 0x20, 0x20 },
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{ "P_DATAIN", 0x40, 0x40 },
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{ "P_DATAIN_DT", 0x60, 0x60 },
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{ "P_COMMAND", 0x80, 0x80 },
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{ "P_MESGOUT", 0xa0, 0xa0 },
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{ "P_STATUS", 0xc0, 0xc0 },
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{ "PHASE_MASK", 0xe0, 0xe0 },
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{ "P_MESGIN", 0xe0, 0xe0 }
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};
82
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int
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ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
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{
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return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
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0x03, regvalue, cur_col, wrap));
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}
89
90
static ahc_reg_parse_entry_t SCSISIGO_parse_table[] = {
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{ "ACKO", 0x01, 0x01 },
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{ "REQO", 0x02, 0x02 },
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{ "BSYO", 0x04, 0x04 },
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{ "SELO", 0x08, 0x08 },
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{ "ATNO", 0x10, 0x10 },
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{ "MSGO", 0x20, 0x20 },
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{ "IOO", 0x40, 0x40 },
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{ "CDO", 0x80, 0x80 },
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{ "P_DATAOUT", 0x00, 0x00 },
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{ "P_DATAIN", 0x40, 0x40 },
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{ "P_COMMAND", 0x80, 0x80 },
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{ "P_MESGOUT", 0xa0, 0xa0 },
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{ "P_STATUS", 0xc0, 0xc0 },
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{ "PHASE_MASK", 0xe0, 0xe0 },
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{ "P_MESGIN", 0xe0, 0xe0 }
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};
107
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int
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ahc_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
110
{
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return (ahc_print_register(SCSISIGO_parse_table, 15, "SCSISIGO",
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0x03, regvalue, cur_col, wrap));
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}
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static ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
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{ "SINGLE_EDGE", 0x10, 0x10 },
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{ "ENABLE_CRC", 0x40, 0x40 },
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{ "WIDEXFER", 0x80, 0x80 },
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{ "SXFR_ULTRA2", 0x0f, 0x0f },
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{ "SOFS", 0x0f, 0x0f },
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{ "SXFR", 0x70, 0x70 }
122
};
123
124
int
125
ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
126
{
127
return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE",
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0x04, regvalue, cur_col, wrap));
129
}
130
131
static ahc_reg_parse_entry_t SCSIID_parse_table[] = {
132
{ "TWIN_CHNLB", 0x80, 0x80 },
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{ "OID", 0x0f, 0x0f },
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{ "TWIN_TID", 0x70, 0x70 },
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{ "SOFS_ULTRA2", 0x7f, 0x7f },
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{ "TID", 0xf0, 0xf0 }
137
};
138
139
int
140
ahc_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
141
{
142
return (ahc_print_register(SCSIID_parse_table, 5, "SCSIID",
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0x05, regvalue, cur_col, wrap));
144
}
145
146
int
147
ahc_scsidatl_print(u_int regvalue, u_int *cur_col, u_int wrap)
148
{
149
return (ahc_print_register(NULL, 0, "SCSIDATL",
150
0x06, regvalue, cur_col, wrap));
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}
152
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int
154
ahc_scsidath_print(u_int regvalue, u_int *cur_col, u_int wrap)
155
{
156
return (ahc_print_register(NULL, 0, "SCSIDATH",
157
0x07, regvalue, cur_col, wrap));
158
}
159
160
static ahc_reg_parse_entry_t OPTIONMODE_parse_table[] = {
161
{ "DIS_MSGIN_DUALEDGE", 0x01, 0x01 },
162
{ "AUTO_MSGOUT_DE", 0x02, 0x02 },
163
{ "SCSIDATL_IMGEN", 0x04, 0x04 },
164
{ "EXPPHASEDIS", 0x08, 0x08 },
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{ "BUSFREEREV", 0x10, 0x10 },
166
{ "ATNMGMNTEN", 0x20, 0x20 },
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{ "AUTOACKEN", 0x40, 0x40 },
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{ "AUTORATEEN", 0x80, 0x80 },
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{ "OPTIONMODE_DEFAULTS",0x03, 0x03 }
170
};
171
172
int
173
ahc_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
174
{
175
return (ahc_print_register(OPTIONMODE_parse_table, 9, "OPTIONMODE",
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0x08, regvalue, cur_col, wrap));
177
}
178
179
int
180
ahc_stcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
181
{
182
return (ahc_print_register(NULL, 0, "STCNT",
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0x08, regvalue, cur_col, wrap));
184
}
185
186
int
187
ahc_targcrccnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
188
{
189
return (ahc_print_register(NULL, 0, "TARGCRCCNT",
190
0x0a, regvalue, cur_col, wrap));
191
}
192
193
static ahc_reg_parse_entry_t CLRSINT0_parse_table[] = {
194
{ "CLRSPIORDY", 0x02, 0x02 },
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{ "CLRSWRAP", 0x08, 0x08 },
196
{ "CLRIOERR", 0x08, 0x08 },
197
{ "CLRSELINGO", 0x10, 0x10 },
198
{ "CLRSELDI", 0x20, 0x20 },
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{ "CLRSELDO", 0x40, 0x40 }
200
};
201
202
int
203
ahc_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
204
{
205
return (ahc_print_register(CLRSINT0_parse_table, 6, "CLRSINT0",
206
0x0b, regvalue, cur_col, wrap));
207
}
208
209
static ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
210
{ "DMADONE", 0x01, 0x01 },
211
{ "SPIORDY", 0x02, 0x02 },
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{ "SDONE", 0x04, 0x04 },
213
{ "SWRAP", 0x08, 0x08 },
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{ "IOERR", 0x08, 0x08 },
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{ "SELINGO", 0x10, 0x10 },
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{ "SELDI", 0x20, 0x20 },
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{ "SELDO", 0x40, 0x40 },
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{ "TARGET", 0x80, 0x80 }
219
};
220
221
int
222
ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
223
{
224
return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0",
225
0x0b, regvalue, cur_col, wrap));
226
}
227
228
static ahc_reg_parse_entry_t CLRSINT1_parse_table[] = {
229
{ "CLRREQINIT", 0x01, 0x01 },
230
{ "CLRPHASECHG", 0x02, 0x02 },
231
{ "CLRSCSIPERR", 0x04, 0x04 },
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{ "CLRBUSFREE", 0x08, 0x08 },
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{ "CLRSCSIRSTI", 0x20, 0x20 },
234
{ "CLRATNO", 0x40, 0x40 },
235
{ "CLRSELTIMEO", 0x80, 0x80 }
236
};
237
238
int
239
ahc_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
240
{
241
return (ahc_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
242
0x0c, regvalue, cur_col, wrap));
243
}
244
245
static ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
246
{ "REQINIT", 0x01, 0x01 },
247
{ "PHASECHG", 0x02, 0x02 },
248
{ "SCSIPERR", 0x04, 0x04 },
249
{ "BUSFREE", 0x08, 0x08 },
250
{ "PHASEMIS", 0x10, 0x10 },
251
{ "SCSIRSTI", 0x20, 0x20 },
252
{ "ATNTARG", 0x40, 0x40 },
253
{ "SELTO", 0x80, 0x80 }
254
};
255
256
int
257
ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
258
{
259
return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
260
0x0c, regvalue, cur_col, wrap));
261
}
262
263
static ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
264
{ "DUAL_EDGE_ERR", 0x01, 0x01 },
265
{ "CRCREQERR", 0x02, 0x02 },
266
{ "CRCENDERR", 0x04, 0x04 },
267
{ "CRCVALERR", 0x08, 0x08 },
268
{ "EXP_ACTIVE", 0x10, 0x10 },
269
{ "SHVALID", 0x40, 0x40 },
270
{ "OVERRUN", 0x80, 0x80 },
271
{ "SFCNT", 0x1f, 0x1f }
272
};
273
274
int
275
ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
276
{
277
return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2",
278
0x0d, regvalue, cur_col, wrap));
279
}
280
281
static ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
282
{ "OFFCNT", 0x0f, 0x0f },
283
{ "U2OFFCNT", 0x7f, 0x7f },
284
{ "SCSICNT", 0xf0, 0xf0 }
285
};
286
287
int
288
ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
289
{
290
return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3",
291
0x0e, regvalue, cur_col, wrap));
292
}
293
294
static ahc_reg_parse_entry_t SCSIID_ULTRA2_parse_table[] = {
295
{ "OID", 0x0f, 0x0f },
296
{ "TID", 0xf0, 0xf0 }
297
};
298
299
int
300
ahc_scsiid_ultra2_print(u_int regvalue, u_int *cur_col, u_int wrap)
301
{
302
return (ahc_print_register(SCSIID_ULTRA2_parse_table, 2, "SCSIID_ULTRA2",
303
0x0f, regvalue, cur_col, wrap));
304
}
305
306
static ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
307
{ "ENDMADONE", 0x01, 0x01 },
308
{ "ENSPIORDY", 0x02, 0x02 },
309
{ "ENSDONE", 0x04, 0x04 },
310
{ "ENSWRAP", 0x08, 0x08 },
311
{ "ENIOERR", 0x08, 0x08 },
312
{ "ENSELINGO", 0x10, 0x10 },
313
{ "ENSELDI", 0x20, 0x20 },
314
{ "ENSELDO", 0x40, 0x40 }
315
};
316
317
int
318
ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
319
{
320
return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0",
321
0x10, regvalue, cur_col, wrap));
322
}
323
324
static ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
325
{ "ENREQINIT", 0x01, 0x01 },
326
{ "ENPHASECHG", 0x02, 0x02 },
327
{ "ENSCSIPERR", 0x04, 0x04 },
328
{ "ENBUSFREE", 0x08, 0x08 },
329
{ "ENPHASEMIS", 0x10, 0x10 },
330
{ "ENSCSIRST", 0x20, 0x20 },
331
{ "ENATNTARG", 0x40, 0x40 },
332
{ "ENSELTIMO", 0x80, 0x80 }
333
};
334
335
int
336
ahc_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
337
{
338
return (ahc_print_register(SIMODE1_parse_table, 8, "SIMODE1",
339
0x11, regvalue, cur_col, wrap));
340
}
341
342
int
343
ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap)
344
{
345
return (ahc_print_register(NULL, 0, "SCSIBUSL",
346
0x12, regvalue, cur_col, wrap));
347
}
348
349
static ahc_reg_parse_entry_t SXFRCTL2_parse_table[] = {
350
{ "CMDDMAEN", 0x08, 0x08 },
351
{ "AUTORSTDIS", 0x10, 0x10 },
352
{ "ASYNC_SETUP", 0x07, 0x07 }
353
};
354
355
int
356
ahc_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
357
{
358
return (ahc_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
359
0x13, regvalue, cur_col, wrap));
360
}
361
362
int
363
ahc_scsibush_print(u_int regvalue, u_int *cur_col, u_int wrap)
364
{
365
return (ahc_print_register(NULL, 0, "SCSIBUSH",
366
0x13, regvalue, cur_col, wrap));
367
}
368
369
int
370
ahc_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
371
{
372
return (ahc_print_register(NULL, 0, "SHADDR",
373
0x14, regvalue, cur_col, wrap));
374
}
375
376
static ahc_reg_parse_entry_t SELTIMER_parse_table[] = {
377
{ "STAGE1", 0x01, 0x01 },
378
{ "STAGE2", 0x02, 0x02 },
379
{ "STAGE3", 0x04, 0x04 },
380
{ "STAGE4", 0x08, 0x08 },
381
{ "STAGE5", 0x10, 0x10 },
382
{ "STAGE6", 0x20, 0x20 }
383
};
384
385
int
386
ahc_seltimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
387
{
388
return (ahc_print_register(SELTIMER_parse_table, 6, "SELTIMER",
389
0x18, regvalue, cur_col, wrap));
390
}
391
392
static ahc_reg_parse_entry_t SELID_parse_table[] = {
393
{ "ONEBIT", 0x08, 0x08 },
394
{ "SELID_MASK", 0xf0, 0xf0 }
395
};
396
397
int
398
ahc_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
399
{
400
return (ahc_print_register(SELID_parse_table, 2, "SELID",
401
0x19, regvalue, cur_col, wrap));
402
}
403
404
static ahc_reg_parse_entry_t SCAMCTL_parse_table[] = {
405
{ "DFLTTID", 0x10, 0x10 },
406
{ "ALTSTIM", 0x20, 0x20 },
407
{ "CLRSCAMSELID", 0x40, 0x40 },
408
{ "ENSCAMSELO", 0x80, 0x80 },
409
{ "SCAMLVL", 0x03, 0x03 }
410
};
411
412
int
413
ahc_scamctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
414
{
415
return (ahc_print_register(SCAMCTL_parse_table, 5, "SCAMCTL",
416
0x1a, regvalue, cur_col, wrap));
417
}
418
419
int
420
ahc_targid_print(u_int regvalue, u_int *cur_col, u_int wrap)
421
{
422
return (ahc_print_register(NULL, 0, "TARGID",
423
0x1b, regvalue, cur_col, wrap));
424
}
425
426
static ahc_reg_parse_entry_t SPIOCAP_parse_table[] = {
427
{ "SSPIOCPS", 0x01, 0x01 },
428
{ "ROM", 0x02, 0x02 },
429
{ "EEPROM", 0x04, 0x04 },
430
{ "SEEPROM", 0x08, 0x08 },
431
{ "EXT_BRDCTL", 0x10, 0x10 },
432
{ "SOFTCMDEN", 0x20, 0x20 },
433
{ "SOFT0", 0x40, 0x40 },
434
{ "SOFT1", 0x80, 0x80 }
435
};
436
437
int
438
ahc_spiocap_print(u_int regvalue, u_int *cur_col, u_int wrap)
439
{
440
return (ahc_print_register(SPIOCAP_parse_table, 8, "SPIOCAP",
441
0x1b, regvalue, cur_col, wrap));
442
}
443
444
static ahc_reg_parse_entry_t BRDCTL_parse_table[] = {
445
{ "BRDCTL0", 0x01, 0x01 },
446
{ "BRDSTB_ULTRA2", 0x01, 0x01 },
447
{ "BRDCTL1", 0x02, 0x02 },
448
{ "BRDRW_ULTRA2", 0x02, 0x02 },
449
{ "BRDRW", 0x04, 0x04 },
450
{ "BRDDAT2", 0x04, 0x04 },
451
{ "BRDCS", 0x08, 0x08 },
452
{ "BRDDAT3", 0x08, 0x08 },
453
{ "BRDSTB", 0x10, 0x10 },
454
{ "BRDDAT4", 0x10, 0x10 },
455
{ "BRDDAT5", 0x20, 0x20 },
456
{ "BRDDAT6", 0x40, 0x40 },
457
{ "BRDDAT7", 0x80, 0x80 }
458
};
459
460
int
461
ahc_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
462
{
463
return (ahc_print_register(BRDCTL_parse_table, 13, "BRDCTL",
464
0x1d, regvalue, cur_col, wrap));
465
}
466
467
static ahc_reg_parse_entry_t SEECTL_parse_table[] = {
468
{ "SEEDI", 0x01, 0x01 },
469
{ "SEEDO", 0x02, 0x02 },
470
{ "SEECK", 0x04, 0x04 },
471
{ "SEECS", 0x08, 0x08 },
472
{ "SEERDY", 0x10, 0x10 },
473
{ "SEEMS", 0x20, 0x20 },
474
{ "EXTARBREQ", 0x40, 0x40 },
475
{ "EXTARBACK", 0x80, 0x80 }
476
};
477
478
int
479
ahc_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
480
{
481
return (ahc_print_register(SEECTL_parse_table, 8, "SEECTL",
482
0x1e, regvalue, cur_col, wrap));
483
}
484
485
static ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
486
{ "XCVR", 0x01, 0x01 },
487
{ "SELWIDE", 0x02, 0x02 },
488
{ "ENAB20", 0x04, 0x04 },
489
{ "SELBUSB", 0x08, 0x08 },
490
{ "ENAB40", 0x08, 0x08 },
491
{ "AUTOFLUSHDIS", 0x20, 0x20 },
492
{ "DIAGLEDON", 0x40, 0x40 },
493
{ "DIAGLEDEN", 0x80, 0x80 }
494
};
495
496
int
497
ahc_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
498
{
499
return (ahc_print_register(SBLKCTL_parse_table, 8, "SBLKCTL",
500
0x1f, regvalue, cur_col, wrap));
501
}
502
503
int
504
ahc_busy_targets_print(u_int regvalue, u_int *cur_col, u_int wrap)
505
{
506
return (ahc_print_register(NULL, 0, "BUSY_TARGETS",
507
0x20, regvalue, cur_col, wrap));
508
}
509
510
int
511
ahc_ultra_enb_print(u_int regvalue, u_int *cur_col, u_int wrap)
512
{
513
return (ahc_print_register(NULL, 0, "ULTRA_ENB",
514
0x30, regvalue, cur_col, wrap));
515
}
516
517
int
518
ahc_disc_dsb_print(u_int regvalue, u_int *cur_col, u_int wrap)
519
{
520
return (ahc_print_register(NULL, 0, "DISC_DSB",
521
0x32, regvalue, cur_col, wrap));
522
}
523
524
int
525
ahc_cmdsize_table_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
526
{
527
return (ahc_print_register(NULL, 0, "CMDSIZE_TABLE_TAIL",
528
0x34, regvalue, cur_col, wrap));
529
}
530
531
int
532
ahc_mwi_residual_print(u_int regvalue, u_int *cur_col, u_int wrap)
533
{
534
return (ahc_print_register(NULL, 0, "MWI_RESIDUAL",
535
0x38, regvalue, cur_col, wrap));
536
}
537
538
int
539
ahc_next_queued_scb_print(u_int regvalue, u_int *cur_col, u_int wrap)
540
{
541
return (ahc_print_register(NULL, 0, "NEXT_QUEUED_SCB",
542
0x39, regvalue, cur_col, wrap));
543
}
544
545
int
546
ahc_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
547
{
548
return (ahc_print_register(NULL, 0, "MSG_OUT",
549
0x3a, regvalue, cur_col, wrap));
550
}
551
552
static ahc_reg_parse_entry_t DMAPARAMS_parse_table[] = {
553
{ "FIFORESET", 0x01, 0x01 },
554
{ "FIFOFLUSH", 0x02, 0x02 },
555
{ "DIRECTION", 0x04, 0x04 },
556
{ "HDMAEN", 0x08, 0x08 },
557
{ "HDMAENACK", 0x08, 0x08 },
558
{ "SDMAEN", 0x10, 0x10 },
559
{ "SDMAENACK", 0x10, 0x10 },
560
{ "SCSIEN", 0x20, 0x20 },
561
{ "WIDEODD", 0x40, 0x40 },
562
{ "PRELOADEN", 0x80, 0x80 }
563
};
564
565
int
566
ahc_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
567
{
568
return (ahc_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
569
0x3b, regvalue, cur_col, wrap));
570
}
571
572
static ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
573
{ "NO_DISCONNECT", 0x01, 0x01 },
574
{ "SPHASE_PENDING", 0x02, 0x02 },
575
{ "DPHASE_PENDING", 0x04, 0x04 },
576
{ "CMDPHASE_PENDING", 0x08, 0x08 },
577
{ "TARG_CMD_PENDING", 0x10, 0x10 },
578
{ "DPHASE", 0x20, 0x20 },
579
{ "NO_CDB_SENT", 0x40, 0x40 },
580
{ "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
581
{ "NOT_IDENTIFIED", 0x80, 0x80 }
582
};
583
584
int
585
ahc_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
586
{
587
return (ahc_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
588
0x3c, regvalue, cur_col, wrap));
589
}
590
591
int
592
ahc_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
593
{
594
return (ahc_print_register(NULL, 0, "SAVED_SCSIID",
595
0x3d, regvalue, cur_col, wrap));
596
}
597
598
int
599
ahc_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
600
{
601
return (ahc_print_register(NULL, 0, "SAVED_LUN",
602
0x3e, regvalue, cur_col, wrap));
603
}
604
605
static ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
606
{ "MSGI", 0x20, 0x20 },
607
{ "IOI", 0x40, 0x40 },
608
{ "CDI", 0x80, 0x80 },
609
{ "P_DATAOUT", 0x00, 0x00 },
610
{ "P_BUSFREE", 0x01, 0x01 },
611
{ "P_DATAIN", 0x40, 0x40 },
612
{ "P_COMMAND", 0x80, 0x80 },
613
{ "P_MESGOUT", 0xa0, 0xa0 },
614
{ "P_STATUS", 0xc0, 0xc0 },
615
{ "PHASE_MASK", 0xe0, 0xe0 },
616
{ "P_MESGIN", 0xe0, 0xe0 }
617
};
618
619
int
620
ahc_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
621
{
622
return (ahc_print_register(LASTPHASE_parse_table, 11, "LASTPHASE",
623
0x3f, regvalue, cur_col, wrap));
624
}
625
626
int
627
ahc_waiting_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
628
{
629
return (ahc_print_register(NULL, 0, "WAITING_SCBH",
630
0x40, regvalue, cur_col, wrap));
631
}
632
633
int
634
ahc_disconnected_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
635
{
636
return (ahc_print_register(NULL, 0, "DISCONNECTED_SCBH",
637
0x41, regvalue, cur_col, wrap));
638
}
639
640
int
641
ahc_free_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
642
{
643
return (ahc_print_register(NULL, 0, "FREE_SCBH",
644
0x42, regvalue, cur_col, wrap));
645
}
646
647
int
648
ahc_complete_scbh_print(u_int regvalue, u_int *cur_col, u_int wrap)
649
{
650
return (ahc_print_register(NULL, 0, "COMPLETE_SCBH",
651
0x43, regvalue, cur_col, wrap));
652
}
653
654
int
655
ahc_hscb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
656
{
657
return (ahc_print_register(NULL, 0, "HSCB_ADDR",
658
0x44, regvalue, cur_col, wrap));
659
}
660
661
int
662
ahc_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
663
{
664
return (ahc_print_register(NULL, 0, "SHARED_DATA_ADDR",
665
0x48, regvalue, cur_col, wrap));
666
}
667
668
int
669
ahc_kernel_qinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
670
{
671
return (ahc_print_register(NULL, 0, "KERNEL_QINPOS",
672
0x4c, regvalue, cur_col, wrap));
673
}
674
675
int
676
ahc_qinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
677
{
678
return (ahc_print_register(NULL, 0, "QINPOS",
679
0x4d, regvalue, cur_col, wrap));
680
}
681
682
int
683
ahc_qoutpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
684
{
685
return (ahc_print_register(NULL, 0, "QOUTPOS",
686
0x4e, regvalue, cur_col, wrap));
687
}
688
689
int
690
ahc_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
691
{
692
return (ahc_print_register(NULL, 0, "KERNEL_TQINPOS",
693
0x4f, regvalue, cur_col, wrap));
694
}
695
696
int
697
ahc_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
698
{
699
return (ahc_print_register(NULL, 0, "TQINPOS",
700
0x50, regvalue, cur_col, wrap));
701
}
702
703
static ahc_reg_parse_entry_t ARG_1_parse_table[] = {
704
{ "SPARE", 0x01, 0x01 },
705
{ "CONT_TARG_SESSION", 0x02, 0x02 },
706
{ "CONT_MSG_LOOP", 0x04, 0x04 },
707
{ "EXIT_MSG_LOOP", 0x08, 0x08 },
708
{ "MSGOUT_PHASEMIS", 0x10, 0x10 },
709
{ "SEND_REJ", 0x20, 0x20 },
710
{ "SEND_SENSE", 0x40, 0x40 },
711
{ "SEND_MSG", 0x80, 0x80 }
712
};
713
714
int
715
ahc_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap)
716
{
717
return (ahc_print_register(ARG_1_parse_table, 8, "ARG_1",
718
0x51, regvalue, cur_col, wrap));
719
}
720
721
int
722
ahc_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap)
723
{
724
return (ahc_print_register(NULL, 0, "ARG_2",
725
0x52, regvalue, cur_col, wrap));
726
}
727
728
int
729
ahc_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
730
{
731
return (ahc_print_register(NULL, 0, "LAST_MSG",
732
0x53, regvalue, cur_col, wrap));
733
}
734
735
static ahc_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
736
{ "ENAUTOATNP", 0x02, 0x02 },
737
{ "ENAUTOATNI", 0x04, 0x04 },
738
{ "ENAUTOATNO", 0x08, 0x08 },
739
{ "ENRSELI", 0x10, 0x10 },
740
{ "ENSELI", 0x20, 0x20 },
741
{ "ENSELO", 0x40, 0x40 }
742
};
743
744
int
745
ahc_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
746
{
747
return (ahc_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
748
0x54, regvalue, cur_col, wrap));
749
}
750
751
static ahc_reg_parse_entry_t HA_274_BIOSGLOBAL_parse_table[] = {
752
{ "HA_274_EXTENDED_TRANS",0x01, 0x01 }
753
};
754
755
int
756
ahc_ha_274_biosglobal_print(u_int regvalue, u_int *cur_col, u_int wrap)
757
{
758
return (ahc_print_register(HA_274_BIOSGLOBAL_parse_table, 1, "HA_274_BIOSGLOBAL",
759
0x56, regvalue, cur_col, wrap));
760
}
761
762
static ahc_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
763
{ "SCB_DMA", 0x01, 0x01 },
764
{ "TARGET_MSG_PENDING", 0x02, 0x02 }
765
};
766
767
int
768
ahc_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
769
{
770
return (ahc_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2",
771
0x57, regvalue, cur_col, wrap));
772
}
773
774
static ahc_reg_parse_entry_t SCSICONF_parse_table[] = {
775
{ "ENSPCHK", 0x20, 0x20 },
776
{ "RESET_SCSI", 0x40, 0x40 },
777
{ "TERM_ENB", 0x80, 0x80 },
778
{ "HSCSIID", 0x07, 0x07 },
779
{ "HWSCSIID", 0x0f, 0x0f }
780
};
781
782
int
783
ahc_scsiconf_print(u_int regvalue, u_int *cur_col, u_int wrap)
784
{
785
return (ahc_print_register(SCSICONF_parse_table, 5, "SCSICONF",
786
0x5a, regvalue, cur_col, wrap));
787
}
788
789
static ahc_reg_parse_entry_t INTDEF_parse_table[] = {
790
{ "EDGE_TRIG", 0x80, 0x80 },
791
{ "VECTOR", 0x0f, 0x0f }
792
};
793
794
int
795
ahc_intdef_print(u_int regvalue, u_int *cur_col, u_int wrap)
796
{
797
return (ahc_print_register(INTDEF_parse_table, 2, "INTDEF",
798
0x5c, regvalue, cur_col, wrap));
799
}
800
801
int
802
ahc_hostconf_print(u_int regvalue, u_int *cur_col, u_int wrap)
803
{
804
return (ahc_print_register(NULL, 0, "HOSTCONF",
805
0x5d, regvalue, cur_col, wrap));
806
}
807
808
static ahc_reg_parse_entry_t HA_274_BIOSCTRL_parse_table[] = {
809
{ "CHANNEL_B_PRIMARY", 0x08, 0x08 },
810
{ "BIOSMODE", 0x30, 0x30 },
811
{ "BIOSDISABLED", 0x30, 0x30 }
812
};
813
814
int
815
ahc_ha_274_biosctrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
816
{
817
return (ahc_print_register(HA_274_BIOSCTRL_parse_table, 3, "HA_274_BIOSCTRL",
818
0x5f, regvalue, cur_col, wrap));
819
}
820
821
static ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
822
{ "LOADRAM", 0x01, 0x01 },
823
{ "SEQRESET", 0x02, 0x02 },
824
{ "STEP", 0x04, 0x04 },
825
{ "BRKADRINTEN", 0x08, 0x08 },
826
{ "FASTMODE", 0x10, 0x10 },
827
{ "FAILDIS", 0x20, 0x20 },
828
{ "PAUSEDIS", 0x40, 0x40 },
829
{ "PERRORDIS", 0x80, 0x80 }
830
};
831
832
int
833
ahc_seqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
834
{
835
return (ahc_print_register(SEQCTL_parse_table, 8, "SEQCTL",
836
0x60, regvalue, cur_col, wrap));
837
}
838
839
int
840
ahc_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
841
{
842
return (ahc_print_register(NULL, 0, "SEQRAM",
843
0x61, regvalue, cur_col, wrap));
844
}
845
846
int
847
ahc_seqaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
848
{
849
return (ahc_print_register(NULL, 0, "SEQADDR0",
850
0x62, regvalue, cur_col, wrap));
851
}
852
853
static ahc_reg_parse_entry_t SEQADDR1_parse_table[] = {
854
{ "SEQADDR1_MASK", 0x01, 0x01 }
855
};
856
857
int
858
ahc_seqaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
859
{
860
return (ahc_print_register(SEQADDR1_parse_table, 1, "SEQADDR1",
861
0x63, regvalue, cur_col, wrap));
862
}
863
864
int
865
ahc_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
866
{
867
return (ahc_print_register(NULL, 0, "ACCUM",
868
0x64, regvalue, cur_col, wrap));
869
}
870
871
int
872
ahc_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
873
{
874
return (ahc_print_register(NULL, 0, "SINDEX",
875
0x65, regvalue, cur_col, wrap));
876
}
877
878
int
879
ahc_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
880
{
881
return (ahc_print_register(NULL, 0, "DINDEX",
882
0x66, regvalue, cur_col, wrap));
883
}
884
885
int
886
ahc_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
887
{
888
return (ahc_print_register(NULL, 0, "ALLONES",
889
0x69, regvalue, cur_col, wrap));
890
}
891
892
int
893
ahc_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
894
{
895
return (ahc_print_register(NULL, 0, "NONE",
896
0x6a, regvalue, cur_col, wrap));
897
}
898
899
int
900
ahc_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
901
{
902
return (ahc_print_register(NULL, 0, "ALLZEROS",
903
0x6a, regvalue, cur_col, wrap));
904
}
905
906
static ahc_reg_parse_entry_t FLAGS_parse_table[] = {
907
{ "CARRY", 0x01, 0x01 },
908
{ "ZERO", 0x02, 0x02 }
909
};
910
911
int
912
ahc_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
913
{
914
return (ahc_print_register(FLAGS_parse_table, 2, "FLAGS",
915
0x6b, regvalue, cur_col, wrap));
916
}
917
918
int
919
ahc_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
920
{
921
return (ahc_print_register(NULL, 0, "SINDIR",
922
0x6c, regvalue, cur_col, wrap));
923
}
924
925
int
926
ahc_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
927
{
928
return (ahc_print_register(NULL, 0, "DINDIR",
929
0x6d, regvalue, cur_col, wrap));
930
}
931
932
int
933
ahc_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
934
{
935
return (ahc_print_register(NULL, 0, "FUNCTION1",
936
0x6e, regvalue, cur_col, wrap));
937
}
938
939
int
940
ahc_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
941
{
942
return (ahc_print_register(NULL, 0, "STACK",
943
0x6f, regvalue, cur_col, wrap));
944
}
945
946
int
947
ahc_targ_offset_print(u_int regvalue, u_int *cur_col, u_int wrap)
948
{
949
return (ahc_print_register(NULL, 0, "TARG_OFFSET",
950
0x70, regvalue, cur_col, wrap));
951
}
952
953
int
954
ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
955
{
956
return (ahc_print_register(NULL, 0, "SRAM_BASE",
957
0x70, regvalue, cur_col, wrap));
958
}
959
960
static ahc_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
961
{ "CIOPARCKEN", 0x01, 0x01 },
962
{ "USCBSIZE32", 0x02, 0x02 },
963
{ "RAMPS", 0x04, 0x04 },
964
{ "INTSCBRAMSEL", 0x08, 0x08 },
965
{ "EXTREQLCK", 0x10, 0x10 },
966
{ "MPARCKEN", 0x20, 0x20 },
967
{ "DPARCKEN", 0x40, 0x40 },
968
{ "CACHETHEN", 0x80, 0x80 }
969
};
970
971
int
972
ahc_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
973
{
974
return (ahc_print_register(DSCOMMAND0_parse_table, 8, "DSCOMMAND0",
975
0x84, regvalue, cur_col, wrap));
976
}
977
978
static ahc_reg_parse_entry_t BCTL_parse_table[] = {
979
{ "ENABLE", 0x01, 0x01 },
980
{ "ACE", 0x08, 0x08 }
981
};
982
983
int
984
ahc_bctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
985
{
986
return (ahc_print_register(BCTL_parse_table, 2, "BCTL",
987
0x84, regvalue, cur_col, wrap));
988
}
989
990
static ahc_reg_parse_entry_t BUSTIME_parse_table[] = {
991
{ "BON", 0x0f, 0x0f },
992
{ "BOFF", 0xf0, 0xf0 }
993
};
994
995
int
996
ahc_bustime_print(u_int regvalue, u_int *cur_col, u_int wrap)
997
{
998
return (ahc_print_register(BUSTIME_parse_table, 2, "BUSTIME",
999
0x85, regvalue, cur_col, wrap));
1000
}
1001
1002
static ahc_reg_parse_entry_t DSCOMMAND1_parse_table[] = {
1003
{ "HADDLDSEL0", 0x01, 0x01 },
1004
{ "HADDLDSEL1", 0x02, 0x02 },
1005
{ "DSLATT", 0xfc, 0xfc }
1006
};
1007
1008
int
1009
ahc_dscommand1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1010
{
1011
return (ahc_print_register(DSCOMMAND1_parse_table, 3, "DSCOMMAND1",
1012
0x85, regvalue, cur_col, wrap));
1013
}
1014
1015
static ahc_reg_parse_entry_t BUSSPD_parse_table[] = {
1016
{ "STBON", 0x07, 0x07 },
1017
{ "STBOFF", 0x38, 0x38 },
1018
{ "DFTHRSH_75", 0x80, 0x80 },
1019
{ "DFTHRSH", 0xc0, 0xc0 },
1020
{ "DFTHRSH_100", 0xc0, 0xc0 }
1021
};
1022
1023
int
1024
ahc_busspd_print(u_int regvalue, u_int *cur_col, u_int wrap)
1025
{
1026
return (ahc_print_register(BUSSPD_parse_table, 5, "BUSSPD",
1027
0x86, regvalue, cur_col, wrap));
1028
}
1029
1030
static ahc_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
1031
{ "SEQ_MAILBOX", 0x0f, 0x0f },
1032
{ "HOST_TQINPOS", 0x80, 0x80 },
1033
{ "HOST_MAILBOX", 0xf0, 0xf0 }
1034
};
1035
1036
int
1037
ahc_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
1038
{
1039
return (ahc_print_register(HS_MAILBOX_parse_table, 3, "HS_MAILBOX",
1040
0x86, regvalue, cur_col, wrap));
1041
}
1042
1043
static ahc_reg_parse_entry_t DSPCISTATUS_parse_table[] = {
1044
{ "DFTHRSH_100", 0xc0, 0xc0 }
1045
};
1046
1047
int
1048
ahc_dspcistatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
1049
{
1050
return (ahc_print_register(DSPCISTATUS_parse_table, 1, "DSPCISTATUS",
1051
0x86, regvalue, cur_col, wrap));
1052
}
1053
1054
static ahc_reg_parse_entry_t HCNTRL_parse_table[] = {
1055
{ "CHIPRST", 0x01, 0x01 },
1056
{ "CHIPRSTACK", 0x01, 0x01 },
1057
{ "INTEN", 0x02, 0x02 },
1058
{ "PAUSE", 0x04, 0x04 },
1059
{ "IRQMS", 0x08, 0x08 },
1060
{ "SWINT", 0x10, 0x10 },
1061
{ "POWRDN", 0x40, 0x40 }
1062
};
1063
1064
int
1065
ahc_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1066
{
1067
return (ahc_print_register(HCNTRL_parse_table, 7, "HCNTRL",
1068
0x87, regvalue, cur_col, wrap));
1069
}
1070
1071
int
1072
ahc_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1073
{
1074
return (ahc_print_register(NULL, 0, "HADDR",
1075
0x88, regvalue, cur_col, wrap));
1076
}
1077
1078
int
1079
ahc_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1080
{
1081
return (ahc_print_register(NULL, 0, "HCNT",
1082
0x8c, regvalue, cur_col, wrap));
1083
}
1084
1085
int
1086
ahc_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1087
{
1088
return (ahc_print_register(NULL, 0, "SCBPTR",
1089
0x90, regvalue, cur_col, wrap));
1090
}
1091
1092
static ahc_reg_parse_entry_t INTSTAT_parse_table[] = {
1093
{ "SEQINT", 0x01, 0x01 },
1094
{ "CMDCMPLT", 0x02, 0x02 },
1095
{ "SCSIINT", 0x04, 0x04 },
1096
{ "BRKADRINT", 0x08, 0x08 },
1097
{ "BAD_PHASE", 0x01, 0x01 },
1098
{ "INT_PEND", 0x0f, 0x0f },
1099
{ "SEND_REJECT", 0x11, 0x11 },
1100
{ "PROTO_VIOLATION", 0x21, 0x21 },
1101
{ "NO_MATCH", 0x31, 0x31 },
1102
{ "IGN_WIDE_RES", 0x41, 0x41 },
1103
{ "PDATA_REINIT", 0x51, 0x51 },
1104
{ "HOST_MSG_LOOP", 0x61, 0x61 },
1105
{ "BAD_STATUS", 0x71, 0x71 },
1106
{ "PERR_DETECTED", 0x81, 0x81 },
1107
{ "DATA_OVERRUN", 0x91, 0x91 },
1108
{ "MKMSG_FAILED", 0xa1, 0xa1 },
1109
{ "MISSED_BUSFREE", 0xb1, 0xb1 },
1110
{ "SCB_MISMATCH", 0xc1, 0xc1 },
1111
{ "NO_FREE_SCB", 0xd1, 0xd1 },
1112
{ "OUT_OF_RANGE", 0xe1, 0xe1 },
1113
{ "SEQINT_MASK", 0xf1, 0xf1 }
1114
};
1115
1116
int
1117
ahc_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1118
{
1119
return (ahc_print_register(INTSTAT_parse_table, 21, "INTSTAT",
1120
0x91, regvalue, cur_col, wrap));
1121
}
1122
1123
static ahc_reg_parse_entry_t ERROR_parse_table[] = {
1124
{ "ILLHADDR", 0x01, 0x01 },
1125
{ "ILLSADDR", 0x02, 0x02 },
1126
{ "ILLOPCODE", 0x04, 0x04 },
1127
{ "SQPARERR", 0x08, 0x08 },
1128
{ "DPARERR", 0x10, 0x10 },
1129
{ "MPARERR", 0x20, 0x20 },
1130
{ "PCIERRSTAT", 0x40, 0x40 },
1131
{ "CIOPARERR", 0x80, 0x80 }
1132
};
1133
1134
int
1135
ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
1136
{
1137
return (ahc_print_register(ERROR_parse_table, 8, "ERROR",
1138
0x92, regvalue, cur_col, wrap));
1139
}
1140
1141
static ahc_reg_parse_entry_t CLRINT_parse_table[] = {
1142
{ "CLRSEQINT", 0x01, 0x01 },
1143
{ "CLRCMDINT", 0x02, 0x02 },
1144
{ "CLRSCSIINT", 0x04, 0x04 },
1145
{ "CLRBRKADRINT", 0x08, 0x08 },
1146
{ "CLRPARERR", 0x10, 0x10 }
1147
};
1148
1149
int
1150
ahc_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
1151
{
1152
return (ahc_print_register(CLRINT_parse_table, 5, "CLRINT",
1153
0x92, regvalue, cur_col, wrap));
1154
}
1155
1156
static ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
1157
{ "FIFORESET", 0x01, 0x01 },
1158
{ "FIFOFLUSH", 0x02, 0x02 },
1159
{ "DIRECTION", 0x04, 0x04 },
1160
{ "HDMAEN", 0x08, 0x08 },
1161
{ "HDMAENACK", 0x08, 0x08 },
1162
{ "SDMAEN", 0x10, 0x10 },
1163
{ "SDMAENACK", 0x10, 0x10 },
1164
{ "SCSIEN", 0x20, 0x20 },
1165
{ "WIDEODD", 0x40, 0x40 },
1166
{ "PRELOADEN", 0x80, 0x80 }
1167
};
1168
1169
int
1170
ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1171
{
1172
return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL",
1173
0x93, regvalue, cur_col, wrap));
1174
}
1175
1176
static ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
1177
{ "FIFOEMP", 0x01, 0x01 },
1178
{ "FIFOFULL", 0x02, 0x02 },
1179
{ "DFTHRESH", 0x04, 0x04 },
1180
{ "HDONE", 0x08, 0x08 },
1181
{ "MREQPEND", 0x10, 0x10 },
1182
{ "FIFOQWDEMP", 0x20, 0x20 },
1183
{ "DFCACHETH", 0x40, 0x40 },
1184
{ "PRELOAD_AVAIL", 0x80, 0x80 }
1185
};
1186
1187
int
1188
ahc_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
1189
{
1190
return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS",
1191
0x94, regvalue, cur_col, wrap));
1192
}
1193
1194
int
1195
ahc_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1196
{
1197
return (ahc_print_register(NULL, 0, "DFWADDR",
1198
0x95, regvalue, cur_col, wrap));
1199
}
1200
1201
int
1202
ahc_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1203
{
1204
return (ahc_print_register(NULL, 0, "DFRADDR",
1205
0x97, regvalue, cur_col, wrap));
1206
}
1207
1208
int
1209
ahc_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
1210
{
1211
return (ahc_print_register(NULL, 0, "DFDAT",
1212
0x99, regvalue, cur_col, wrap));
1213
}
1214
1215
static ahc_reg_parse_entry_t SCBCNT_parse_table[] = {
1216
{ "SCBAUTO", 0x80, 0x80 },
1217
{ "SCBCNT_MASK", 0x1f, 0x1f }
1218
};
1219
1220
int
1221
ahc_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1222
{
1223
return (ahc_print_register(SCBCNT_parse_table, 2, "SCBCNT",
1224
0x9a, regvalue, cur_col, wrap));
1225
}
1226
1227
int
1228
ahc_qinfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
1229
{
1230
return (ahc_print_register(NULL, 0, "QINFIFO",
1231
0x9b, regvalue, cur_col, wrap));
1232
}
1233
1234
int
1235
ahc_qincnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1236
{
1237
return (ahc_print_register(NULL, 0, "QINCNT",
1238
0x9c, regvalue, cur_col, wrap));
1239
}
1240
1241
static ahc_reg_parse_entry_t CRCCONTROL1_parse_table[] = {
1242
{ "TARGCRCCNTEN", 0x04, 0x04 },
1243
{ "TARGCRCENDEN", 0x08, 0x08 },
1244
{ "CRCREQCHKEN", 0x10, 0x10 },
1245
{ "CRCENDCHKEN", 0x20, 0x20 },
1246
{ "CRCVALCHKEN", 0x40, 0x40 },
1247
{ "CRCONSEEN", 0x80, 0x80 }
1248
};
1249
1250
int
1251
ahc_crccontrol1_print(u_int regvalue, u_int *cur_col, u_int wrap)
1252
{
1253
return (ahc_print_register(CRCCONTROL1_parse_table, 6, "CRCCONTROL1",
1254
0x9d, regvalue, cur_col, wrap));
1255
}
1256
1257
int
1258
ahc_qoutfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
1259
{
1260
return (ahc_print_register(NULL, 0, "QOUTFIFO",
1261
0x9d, regvalue, cur_col, wrap));
1262
}
1263
1264
int
1265
ahc_qoutcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1266
{
1267
return (ahc_print_register(NULL, 0, "QOUTCNT",
1268
0x9e, regvalue, cur_col, wrap));
1269
}
1270
1271
static ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
1272
{ "DATA_OUT_PHASE", 0x01, 0x01 },
1273
{ "DATA_IN_PHASE", 0x02, 0x02 },
1274
{ "MSG_OUT_PHASE", 0x04, 0x04 },
1275
{ "MSG_IN_PHASE", 0x08, 0x08 },
1276
{ "COMMAND_PHASE", 0x10, 0x10 },
1277
{ "STATUS_PHASE", 0x20, 0x20 },
1278
{ "DATA_PHASE_MASK", 0x03, 0x03 }
1279
};
1280
1281
int
1282
ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
1283
{
1284
return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
1285
0x9e, regvalue, cur_col, wrap));
1286
}
1287
1288
static ahc_reg_parse_entry_t SFUNCT_parse_table[] = {
1289
{ "ALT_MODE", 0x80, 0x80 }
1290
};
1291
1292
int
1293
ahc_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
1294
{
1295
return (ahc_print_register(SFUNCT_parse_table, 1, "SFUNCT",
1296
0x9f, regvalue, cur_col, wrap));
1297
}
1298
1299
int
1300
ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
1301
{
1302
return (ahc_print_register(NULL, 0, "SCB_BASE",
1303
0xa0, regvalue, cur_col, wrap));
1304
}
1305
1306
int
1307
ahc_scb_cdb_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1308
{
1309
return (ahc_print_register(NULL, 0, "SCB_CDB_PTR",
1310
0xa0, regvalue, cur_col, wrap));
1311
}
1312
1313
int
1314
ahc_scb_residual_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1315
{
1316
return (ahc_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR",
1317
0xa4, regvalue, cur_col, wrap));
1318
}
1319
1320
int
1321
ahc_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap)
1322
{
1323
return (ahc_print_register(NULL, 0, "SCB_SCSI_STATUS",
1324
0xa8, regvalue, cur_col, wrap));
1325
}
1326
1327
int
1328
ahc_scb_target_phases_print(u_int regvalue, u_int *cur_col, u_int wrap)
1329
{
1330
return (ahc_print_register(NULL, 0, "SCB_TARGET_PHASES",
1331
0xa9, regvalue, cur_col, wrap));
1332
}
1333
1334
int
1335
ahc_scb_target_data_dir_print(u_int regvalue, u_int *cur_col, u_int wrap)
1336
{
1337
return (ahc_print_register(NULL, 0, "SCB_TARGET_DATA_DIR",
1338
0xaa, regvalue, cur_col, wrap));
1339
}
1340
1341
int
1342
ahc_scb_target_itag_print(u_int regvalue, u_int *cur_col, u_int wrap)
1343
{
1344
return (ahc_print_register(NULL, 0, "SCB_TARGET_ITAG",
1345
0xab, regvalue, cur_col, wrap));
1346
}
1347
1348
int
1349
ahc_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1350
{
1351
return (ahc_print_register(NULL, 0, "SCB_DATAPTR",
1352
0xac, regvalue, cur_col, wrap));
1353
}
1354
1355
static ahc_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
1356
{ "SG_LAST_SEG", 0x80, 0x80 },
1357
{ "SG_HIGH_ADDR_BITS", 0x7f, 0x7f }
1358
};
1359
1360
int
1361
ahc_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1362
{
1363
return (ahc_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
1364
0xb0, regvalue, cur_col, wrap));
1365
}
1366
1367
static ahc_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
1368
{ "SG_LIST_NULL", 0x01, 0x01 },
1369
{ "SG_FULL_RESID", 0x02, 0x02 },
1370
{ "SG_RESID_VALID", 0x04, 0x04 }
1371
};
1372
1373
int
1374
ahc_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1375
{
1376
return (ahc_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR",
1377
0xb4, regvalue, cur_col, wrap));
1378
}
1379
1380
static ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
1381
{ "DISCONNECTED", 0x04, 0x04 },
1382
{ "ULTRAENB", 0x08, 0x08 },
1383
{ "MK_MESSAGE", 0x10, 0x10 },
1384
{ "TAG_ENB", 0x20, 0x20 },
1385
{ "DISCENB", 0x40, 0x40 },
1386
{ "TARGET_SCB", 0x80, 0x80 },
1387
{ "STATUS_RCVD", 0x80, 0x80 },
1388
{ "SCB_TAG_TYPE", 0x03, 0x03 }
1389
};
1390
1391
int
1392
ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
1393
{
1394
return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL",
1395
0xb8, regvalue, cur_col, wrap));
1396
}
1397
1398
static ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
1399
{ "TWIN_CHNLB", 0x80, 0x80 },
1400
{ "OID", 0x0f, 0x0f },
1401
{ "TWIN_TID", 0x70, 0x70 },
1402
{ "TID", 0xf0, 0xf0 }
1403
};
1404
1405
int
1406
ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
1407
{
1408
return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID",
1409
0xb9, regvalue, cur_col, wrap));
1410
}
1411
1412
static ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
1413
{ "SCB_XFERLEN_ODD", 0x80, 0x80 },
1414
{ "LID", 0x3f, 0x3f }
1415
};
1416
1417
int
1418
ahc_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
1419
{
1420
return (ahc_print_register(SCB_LUN_parse_table, 2, "SCB_LUN",
1421
0xba, regvalue, cur_col, wrap));
1422
}
1423
1424
int
1425
ahc_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
1426
{
1427
return (ahc_print_register(NULL, 0, "SCB_TAG",
1428
0xbb, regvalue, cur_col, wrap));
1429
}
1430
1431
int
1432
ahc_scb_cdb_len_print(u_int regvalue, u_int *cur_col, u_int wrap)
1433
{
1434
return (ahc_print_register(NULL, 0, "SCB_CDB_LEN",
1435
0xbc, regvalue, cur_col, wrap));
1436
}
1437
1438
int
1439
ahc_scb_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
1440
{
1441
return (ahc_print_register(NULL, 0, "SCB_SCSIRATE",
1442
0xbd, regvalue, cur_col, wrap));
1443
}
1444
1445
int
1446
ahc_scb_scsioffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
1447
{
1448
return (ahc_print_register(NULL, 0, "SCB_SCSIOFFSET",
1449
0xbe, regvalue, cur_col, wrap));
1450
}
1451
1452
int
1453
ahc_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap)
1454
{
1455
return (ahc_print_register(NULL, 0, "SCB_NEXT",
1456
0xbf, regvalue, cur_col, wrap));
1457
}
1458
1459
int
1460
ahc_scb_64_spare_print(u_int regvalue, u_int *cur_col, u_int wrap)
1461
{
1462
return (ahc_print_register(NULL, 0, "SCB_64_SPARE",
1463
0xc0, regvalue, cur_col, wrap));
1464
}
1465
1466
static ahc_reg_parse_entry_t SEECTL_2840_parse_table[] = {
1467
{ "DO_2840", 0x01, 0x01 },
1468
{ "CK_2840", 0x02, 0x02 },
1469
{ "CS_2840", 0x04, 0x04 }
1470
};
1471
1472
int
1473
ahc_seectl_2840_print(u_int regvalue, u_int *cur_col, u_int wrap)
1474
{
1475
return (ahc_print_register(SEECTL_2840_parse_table, 3, "SEECTL_2840",
1476
0xc0, regvalue, cur_col, wrap));
1477
}
1478
1479
static ahc_reg_parse_entry_t STATUS_2840_parse_table[] = {
1480
{ "DI_2840", 0x01, 0x01 },
1481
{ "EEPROM_TF", 0x80, 0x80 },
1482
{ "ADSEL", 0x1e, 0x1e },
1483
{ "BIOS_SEL", 0x60, 0x60 }
1484
};
1485
1486
int
1487
ahc_status_2840_print(u_int regvalue, u_int *cur_col, u_int wrap)
1488
{
1489
return (ahc_print_register(STATUS_2840_parse_table, 4, "STATUS_2840",
1490
0xc1, regvalue, cur_col, wrap));
1491
}
1492
1493
int
1494
ahc_scb_64_btt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1495
{
1496
return (ahc_print_register(NULL, 0, "SCB_64_BTT",
1497
0xd0, regvalue, cur_col, wrap));
1498
}
1499
1500
int
1501
ahc_cchaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1502
{
1503
return (ahc_print_register(NULL, 0, "CCHADDR",
1504
0xe0, regvalue, cur_col, wrap));
1505
}
1506
1507
int
1508
ahc_cchcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1509
{
1510
return (ahc_print_register(NULL, 0, "CCHCNT",
1511
0xe8, regvalue, cur_col, wrap));
1512
}
1513
1514
int
1515
ahc_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
1516
{
1517
return (ahc_print_register(NULL, 0, "CCSGRAM",
1518
0xe9, regvalue, cur_col, wrap));
1519
}
1520
1521
int
1522
ahc_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1523
{
1524
return (ahc_print_register(NULL, 0, "CCSGADDR",
1525
0xea, regvalue, cur_col, wrap));
1526
}
1527
1528
static ahc_reg_parse_entry_t CCSGCTL_parse_table[] = {
1529
{ "CCSGRESET", 0x01, 0x01 },
1530
{ "SG_FETCH_NEEDED", 0x02, 0x02 },
1531
{ "CCSGEN", 0x08, 0x08 },
1532
{ "CCSGDONE", 0x80, 0x80 }
1533
};
1534
1535
int
1536
ahc_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1537
{
1538
return (ahc_print_register(CCSGCTL_parse_table, 4, "CCSGCTL",
1539
0xeb, regvalue, cur_col, wrap));
1540
}
1541
1542
int
1543
ahc_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
1544
{
1545
return (ahc_print_register(NULL, 0, "CCSCBRAM",
1546
0xec, regvalue, cur_col, wrap));
1547
}
1548
1549
int
1550
ahc_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1551
{
1552
return (ahc_print_register(NULL, 0, "CCSCBADDR",
1553
0xed, regvalue, cur_col, wrap));
1554
}
1555
1556
static ahc_reg_parse_entry_t CCSCBCTL_parse_table[] = {
1557
{ "CCSCBRESET", 0x01, 0x01 },
1558
{ "CCSCBDIR", 0x04, 0x04 },
1559
{ "CCSCBEN", 0x08, 0x08 },
1560
{ "CCARREN", 0x10, 0x10 },
1561
{ "ARRDONE", 0x40, 0x40 },
1562
{ "CCSCBDONE", 0x80, 0x80 }
1563
};
1564
1565
int
1566
ahc_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
1567
{
1568
return (ahc_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
1569
0xee, regvalue, cur_col, wrap));
1570
}
1571
1572
int
1573
ahc_ccscbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
1574
{
1575
return (ahc_print_register(NULL, 0, "CCSCBCNT",
1576
0xef, regvalue, cur_col, wrap));
1577
}
1578
1579
int
1580
ahc_scbbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1581
{
1582
return (ahc_print_register(NULL, 0, "SCBBADDR",
1583
0xf0, regvalue, cur_col, wrap));
1584
}
1585
1586
int
1587
ahc_ccscbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
1588
{
1589
return (ahc_print_register(NULL, 0, "CCSCBPTR",
1590
0xf1, regvalue, cur_col, wrap));
1591
}
1592
1593
int
1594
ahc_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
1595
{
1596
return (ahc_print_register(NULL, 0, "HNSCB_QOFF",
1597
0xf4, regvalue, cur_col, wrap));
1598
}
1599
1600
int
1601
ahc_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
1602
{
1603
return (ahc_print_register(NULL, 0, "SNSCB_QOFF",
1604
0xf6, regvalue, cur_col, wrap));
1605
}
1606
1607
int
1608
ahc_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
1609
{
1610
return (ahc_print_register(NULL, 0, "SDSCB_QOFF",
1611
0xf8, regvalue, cur_col, wrap));
1612
}
1613
1614
static ahc_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
1615
{ "SDSCB_ROLLOVER", 0x10, 0x10 },
1616
{ "SNSCB_ROLLOVER", 0x20, 0x20 },
1617
{ "SCB_AVAIL", 0x40, 0x40 },
1618
{ "SCB_QSIZE_256", 0x06, 0x06 },
1619
{ "SCB_QSIZE", 0x07, 0x07 }
1620
};
1621
1622
int
1623
ahc_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
1624
{
1625
return (ahc_print_register(QOFF_CTLSTA_parse_table, 5, "QOFF_CTLSTA",
1626
0xfa, regvalue, cur_col, wrap));
1627
}
1628
1629
static ahc_reg_parse_entry_t DFF_THRSH_parse_table[] = {
1630
{ "RD_DFTHRSH_MIN", 0x00, 0x00 },
1631
{ "WR_DFTHRSH_MIN", 0x00, 0x00 },
1632
{ "RD_DFTHRSH_25", 0x01, 0x01 },
1633
{ "RD_DFTHRSH_50", 0x02, 0x02 },
1634
{ "RD_DFTHRSH_63", 0x03, 0x03 },
1635
{ "RD_DFTHRSH_75", 0x04, 0x04 },
1636
{ "RD_DFTHRSH_85", 0x05, 0x05 },
1637
{ "RD_DFTHRSH_90", 0x06, 0x06 },
1638
{ "RD_DFTHRSH", 0x07, 0x07 },
1639
{ "RD_DFTHRSH_MAX", 0x07, 0x07 },
1640
{ "WR_DFTHRSH_25", 0x10, 0x10 },
1641
{ "WR_DFTHRSH_50", 0x20, 0x20 },
1642
{ "WR_DFTHRSH_63", 0x30, 0x30 },
1643
{ "WR_DFTHRSH_75", 0x40, 0x40 },
1644
{ "WR_DFTHRSH_85", 0x50, 0x50 },
1645
{ "WR_DFTHRSH_90", 0x60, 0x60 },
1646
{ "WR_DFTHRSH", 0x70, 0x70 },
1647
{ "WR_DFTHRSH_MAX", 0x70, 0x70 }
1648
};
1649
1650
int
1651
ahc_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
1652
{
1653
return (ahc_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
1654
0xfb, regvalue, cur_col, wrap));
1655
}
1656
1657
static ahc_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
1658
{ "LAST_SEG_DONE", 0x01, 0x01 },
1659
{ "LAST_SEG", 0x02, 0x02 },
1660
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
1661
};
1662
1663
int
1664
ahc_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
1665
{
1666
return (ahc_print_register(SG_CACHE_SHADOW_parse_table, 3, "SG_CACHE_SHADOW",
1667
0xfc, regvalue, cur_col, wrap));
1668
}
1669
1670
static ahc_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
1671
{ "LAST_SEG_DONE", 0x01, 0x01 },
1672
{ "LAST_SEG", 0x02, 0x02 },
1673
{ "SG_ADDR_MASK", 0xf8, 0xf8 }
1674
};
1675
1676
int
1677
ahc_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
1678
{
1679
return (ahc_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
1680
0xfc, regvalue, cur_col, wrap));
1681
}
1682
1683