/*-1* SPDX-License-Identifier: ISC2*3* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting4* Copyright (c) 2002-2008 Atheros Communications, Inc.5*6* Permission to use, copy, modify, and/or distribute this software for any7* purpose with or without fee is hereby granted, provided that the above8* copyright notice and this permission notice appear in all copies.9*10* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES11* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR13* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES14* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN15* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF16* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.17*/18#ifndef _ATH_AH_EEPROM_H_19#define _ATH_AH_EEPROM_H_2021#define AR_EEPROM_VER1 0x1000 /* Version 1.0; 5210 only */22/*23* Version 3 EEPROMs are all 16K.24* 3.1 adds turbo limit, antenna gain, 16 CTL's, 11g info,25* and 2.4Ghz ob/db for B & G26* 3.2 has more accurate pcdac intercepts and analog chip27* calibration.28* 3.3 adds ctl in-band limit, 32 ctl's, and frequency29* expansion30* 3.4 adds xr power, gainI, and 2.4 turbo params31*/32#define AR_EEPROM_VER3 0x3000 /* Version 3.0; start of 16k EEPROM */33#define AR_EEPROM_VER3_1 0x3001 /* Version 3.1 */34#define AR_EEPROM_VER3_2 0x3002 /* Version 3.2 */35#define AR_EEPROM_VER3_3 0x3003 /* Version 3.3 */36#define AR_EEPROM_VER3_4 0x3004 /* Version 3.4 */37#define AR_EEPROM_VER4 0x4000 /* Version 4.x */38#define AR_EEPROM_VER4_0 0x4000 /* Version 4.0 */39#define AR_EEPROM_VER4_1 0x4001 /* Version 4.0 */40#define AR_EEPROM_VER4_2 0x4002 /* Version 4.0 */41#define AR_EEPROM_VER4_3 0x4003 /* Version 4.0 */42#define AR_EEPROM_VER4_6 0x4006 /* Version 4.0 */43#define AR_EEPROM_VER4_7 0x3007 /* Version 4.7 */44#define AR_EEPROM_VER4_9 0x4009 /* EEPROM EAR futureproofing */45#define AR_EEPROM_VER5 0x5000 /* Version 5.x */46#define AR_EEPROM_VER5_0 0x5000 /* Adds new 2413 cal powers and added params */47#define AR_EEPROM_VER5_1 0x5001 /* Adds capability values */48#define AR_EEPROM_VER5_3 0x5003 /* Adds spur mitigation table */49#define AR_EEPROM_VER5_4 0x500450/*51* Version 14 EEPROMs came in with AR5416.52* 14.2 adds txFrameToPaOn, txFrameToDataStart, ht40PowerInc53* 14.3 adds bswAtten, bswMargin, swSettle, and base OpFlags for HT20/4054*/55#define AR_EEPROM_VER14 0xE000 /* Version 14.x */56#define AR_EEPROM_VER14_1 0xE001 /* Adds 11n support */57#define AR_EEPROM_VER14_2 0xE00258#define AR_EEPROM_VER14_3 0xE00359#define AR_EEPROM_VER14_7 0xE00760#define AR_EEPROM_VER14_9 0xE00961#define AR_EEPROM_VER14_16 0xE01062#define AR_EEPROM_VER14_17 0xE01163#define AR_EEPROM_VER14_19 0xE0136465enum {66AR_EEP_RFKILL, /* use ath_hal_eepromGetFlag */67AR_EEP_AMODE, /* use ath_hal_eepromGetFlag */68AR_EEP_BMODE, /* use ath_hal_eepromGetFlag */69AR_EEP_GMODE, /* use ath_hal_eepromGetFlag */70AR_EEP_TURBO5DISABLE, /* use ath_hal_eepromGetFlag */71AR_EEP_TURBO2DISABLE, /* use ath_hal_eepromGetFlag */72AR_EEP_ISTALON, /* use ath_hal_eepromGetFlag */73AR_EEP_32KHZCRYSTAL, /* use ath_hal_eepromGetFlag */74AR_EEP_MACADDR, /* uint8_t* */75AR_EEP_COMPRESS, /* use ath_hal_eepromGetFlag */76AR_EEP_FASTFRAME, /* use ath_hal_eepromGetFlag */77AR_EEP_AES, /* use ath_hal_eepromGetFlag */78AR_EEP_BURST, /* use ath_hal_eepromGetFlag */79AR_EEP_MAXQCU, /* uint16_t* */80AR_EEP_KCENTRIES, /* uint16_t* */81AR_EEP_NFTHRESH_5, /* int16_t* */82AR_EEP_NFTHRESH_2, /* int16_t* */83AR_EEP_REGDMN_0, /* uint16_t* */84AR_EEP_REGDMN_1, /* uint16_t* */85AR_EEP_OPCAP, /* uint16_t* */86AR_EEP_OPMODE, /* uint16_t* */87AR_EEP_RFSILENT, /* uint16_t* */88AR_EEP_OB_5, /* uint8_t* */89AR_EEP_DB_5, /* uint8_t* */90AR_EEP_OB_2, /* uint8_t* */91AR_EEP_DB_2, /* uint8_t* */92AR_EEP_TXMASK, /* uint8_t* */93AR_EEP_RXMASK, /* uint8_t* */94AR_EEP_RXGAIN_TYPE, /* uint8_t* */95AR_EEP_TXGAIN_TYPE, /* uint8_t* */96AR_EEP_DAC_HPWR_5G, /* uint8_t* */97AR_EEP_OL_PWRCTRL, /* use ath_hal_eepromGetFlag */98AR_EEP_FSTCLK_5G, /* use ath_hal_eepromGetFlag */99AR_EEP_ANTGAINMAX_5, /* int8_t* */100AR_EEP_ANTGAINMAX_2, /* int8_t* */101AR_EEP_WRITEPROTECT, /* use ath_hal_eepromGetFlag */102AR_EEP_PWR_TABLE_OFFSET,/* int8_t* */103AR_EEP_PWDCLKIND, /* uint8_t* */104AR_EEP_TEMPSENSE_SLOPE, /* int8_t* */105AR_EEP_TEMPSENSE_SLOPE_PAL_ON, /* int8_t* */106AR_EEP_FRAC_N_5G, /* uint8_t* */107108/* New fields for AR9300 and later */109AR_EEP_DRIVE_STRENGTH,110AR_EEP_PAPRD_ENABLED,111};112113typedef struct {114uint16_t rdEdge;115uint16_t twice_rdEdgePower;116HAL_BOOL flag;117} RD_EDGES_POWER;118119/* XXX should probably be version-dependent */120#define SD_NO_CTL 0xf0121#define NO_CTL 0xff122#define CTL_MODE_M 0x0f123#define CTL_11A 0124#define CTL_11B 1125#define CTL_11G 2126#define CTL_TURBO 3127#define CTL_108G 4128#define CTL_2GHT20 5129#define CTL_5GHT20 6130#define CTL_2GHT40 7131#define CTL_5GHT40 8132133/* XXX must match what FCC/MKK/ETSI are defined as in ah_regdomain.h */134#define HAL_REG_DMN_MASK 0xf0135#define HAL_REGDMN_FCC 0x10136#define HAL_REGDMN_MKK 0x40137#define HAL_REGDMN_ETSI 0x30138139#define is_reg_dmn_fcc(reg_dmn) \140(((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_FCC) ? 1 : 0)141#define is_reg_dmn_etsi(reg_dmn) \142(((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_ETSI) ? 1 : 0)143#define is_reg_dmn_mkk(reg_dmn) \144(((reg_dmn & HAL_REG_DMN_MASK) == HAL_REGDMN_MKK) ? 1 : 0)145146#define AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040147#define AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080148#define AR_EEPROM_EEREGCAP_EN_KK_U2 0x0100149#define AR_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200150#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400151#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800152153/* regulatory capabilities prior to eeprom version 4.0 */154#define AR_EEPROM_EEREGCAP_EN_KK_U1_ODD_PRE4_0 0x4000155#define AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0 0x8000156157#define AR_NO_SPUR 0x8000158159/* XXX exposed to chip code */160#define MAX_RATE_POWER 63161162HAL_STATUS ath_hal_v1EepromAttach(struct ath_hal *ah);163HAL_STATUS ath_hal_legacyEepromAttach(struct ath_hal *ah);164HAL_STATUS ath_hal_v14EepromAttach(struct ath_hal *ah);165HAL_STATUS ath_hal_v4kEepromAttach(struct ath_hal *ah);166HAL_STATUS ath_hal_9287EepromAttach(struct ath_hal *ah);167#endif /* _ATH_AH_EEPROM_H_ */168169170