Path: blob/main/sys/dev/ath/ath_hal/ar5212/ar2316.c
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/*-1* SPDX-License-Identifier: ISC2*3* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting4* Copyright (c) 2002-2008 Atheros Communications, Inc.5*6* Permission to use, copy, modify, and/or distribute this software for any7* purpose with or without fee is hereby granted, provided that the above8* copyright notice and this permission notice appear in all copies.9*10* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES11* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR13* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES14* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN15* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF16* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.17*/18#include "opt_ah.h"1920#include "ah.h"21#include "ah_internal.h"2223#include "ar5212/ar5212.h"24#include "ar5212/ar5212reg.h"25#include "ar5212/ar5212phy.h"2627#include "ah_eeprom_v3.h"2829#define AH_5212_231630#include "ar5212/ar5212.ini"3132#define N(a) (sizeof(a)/sizeof(a[0]))3334typedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2316;35typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2316;36#define PWR_TABLE_SIZE_2316 PWR_TABLE_SIZE_24133738struct ar2316State {39RF_HAL_FUNCS base; /* public state, must be first */40uint16_t pcdacTable[PWR_TABLE_SIZE_2316];4142uint32_t Bank1Data[N(ar5212Bank1_2316)];43uint32_t Bank2Data[N(ar5212Bank2_2316)];44uint32_t Bank3Data[N(ar5212Bank3_2316)];45uint32_t Bank6Data[N(ar5212Bank6_2316)];46uint32_t Bank7Data[N(ar5212Bank7_2316)];4748/*49* Private state for reduced stack usage.50*/51/* filled out Vpd table for all pdGains (chanL) */52uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]53[MAX_PWR_RANGE_IN_HALF_DB];54/* filled out Vpd table for all pdGains (chanR) */55uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]56[MAX_PWR_RANGE_IN_HALF_DB];57/* filled out Vpd table for all pdGains (interpolated) */58uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]59[MAX_PWR_RANGE_IN_HALF_DB];60};61#define AR2316(ah) ((struct ar2316State *) AH5212(ah)->ah_rfHal)6263extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,64uint32_t numBits, uint32_t firstBit, uint32_t column);6566static void67ar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,68int regWrites)69{70struct ath_hal_5212 *ahp = AH5212(ah);7172HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites);73HAL_INI_WRITE_ARRAY(ah, ar5212Common_2316, 1, regWrites);74HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2316, freqIndex, regWrites);7576/* For AP51 */77if (!ahp->ah_cwCalRequire) {78OS_REG_WRITE(ah, 0xa358, (OS_REG_READ(ah, 0xa358) & ~0x2));79} else {80ahp->ah_cwCalRequire = AH_FALSE;81}82}8384/*85* Take the MHz channel value and set the Channel value86*87* ASSUMES: Writes enabled to analog bus88*/89static HAL_BOOL90ar2316SetChannel(struct ath_hal *ah, struct ieee80211_channel *chan)91{92uint16_t freq = ath_hal_gethwchannel(ah, chan);93uint32_t channelSel = 0;94uint32_t bModeSynth = 0;95uint32_t aModeRefSel = 0;96uint32_t reg32 = 0;9798OS_MARK(ah, AH_MARK_SETCHANNEL, freq);99100if (freq < 4800) {101uint32_t txctl;102103if (((freq - 2192) % 5) == 0) {104channelSel = ((freq - 672) * 2 - 3040)/10;105bModeSynth = 0;106} else if (((freq - 2224) % 5) == 0) {107channelSel = ((freq - 704) * 2 - 3040) / 10;108bModeSynth = 1;109} else {110HALDEBUG(ah, HAL_DEBUG_ANY,111"%s: invalid channel %u MHz\n",112__func__, freq);113return AH_FALSE;114}115116channelSel = (channelSel << 2) & 0xff;117channelSel = ath_hal_reverseBits(channelSel, 8);118119txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);120if (freq == 2484) {121/* Enable channel spreading for channel 14 */122OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,123txctl | AR_PHY_CCK_TX_CTRL_JAPAN);124} else {125OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,126txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);127}128} else if ((freq % 20) == 0 && freq >= 5120) {129channelSel = ath_hal_reverseBits(130((freq - 4800) / 20 << 2), 8);131aModeRefSel = ath_hal_reverseBits(3, 2);132} else if ((freq % 10) == 0) {133channelSel = ath_hal_reverseBits(134((freq - 4800) / 10 << 1), 8);135aModeRefSel = ath_hal_reverseBits(2, 2);136} else if ((freq % 5) == 0) {137channelSel = ath_hal_reverseBits(138(freq - 4800) / 5, 8);139aModeRefSel = ath_hal_reverseBits(1, 2);140} else {141HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",142__func__, freq);143return AH_FALSE;144}145146reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |147(1 << 12) | 0x1;148OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);149150reg32 >>= 8;151OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);152153AH_PRIVATE(ah)->ah_curchan = chan;154return AH_TRUE;155}156157/*158* Reads EEPROM header info from device structure and programs159* all rf registers160*161* REQUIRES: Access to the analog rf device162*/163static HAL_BOOL164ar2316SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,165uint16_t modesIndex, uint16_t *rfXpdGain)166{167#define RF_BANK_SETUP(_priv, _ix, _col) do { \168int i; \169for (i = 0; i < N(ar5212Bank##_ix##_2316); i++) \170(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2316[i][_col];\171} while (0)172struct ath_hal_5212 *ahp = AH5212(ah);173const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;174uint16_t ob2GHz = 0, db2GHz = 0;175struct ar2316State *priv = AR2316(ah);176int regWrites = 0;177178HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",179__func__, chan->ic_freq, chan->ic_flags, modesIndex);180181HALASSERT(priv != AH_NULL);182183/* Setup rf parameters */184if (IEEE80211_IS_CHAN_B(chan)) {185ob2GHz = ee->ee_obFor24;186db2GHz = ee->ee_dbFor24;187} else {188ob2GHz = ee->ee_obFor24g;189db2GHz = ee->ee_dbFor24g;190}191192/* Bank 1 Write */193RF_BANK_SETUP(priv, 1, 1);194195/* Bank 2 Write */196RF_BANK_SETUP(priv, 2, modesIndex);197198/* Bank 3 Write */199RF_BANK_SETUP(priv, 3, modesIndex);200201/* Bank 6 Write */202RF_BANK_SETUP(priv, 6, modesIndex);203204ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 178, 0);205ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 175, 0);206207/* Bank 7 Setup */208RF_BANK_SETUP(priv, 7, modesIndex);209210/* Write Analog registers */211HAL_INI_WRITE_BANK(ah, ar5212Bank1_2316, priv->Bank1Data, regWrites);212HAL_INI_WRITE_BANK(ah, ar5212Bank2_2316, priv->Bank2Data, regWrites);213HAL_INI_WRITE_BANK(ah, ar5212Bank3_2316, priv->Bank3Data, regWrites);214HAL_INI_WRITE_BANK(ah, ar5212Bank6_2316, priv->Bank6Data, regWrites);215HAL_INI_WRITE_BANK(ah, ar5212Bank7_2316, priv->Bank7Data, regWrites);216217/* Now that we have reprogrammed rfgain value, clear the flag. */218ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;219220return AH_TRUE;221#undef RF_BANK_SETUP222}223224/*225* Return a reference to the requested RF Bank.226*/227static uint32_t *228ar2316GetRfBank(struct ath_hal *ah, int bank)229{230struct ar2316State *priv = AR2316(ah);231232HALASSERT(priv != AH_NULL);233switch (bank) {234case 1: return priv->Bank1Data;235case 2: return priv->Bank2Data;236case 3: return priv->Bank3Data;237case 6: return priv->Bank6Data;238case 7: return priv->Bank7Data;239}240HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",241__func__, bank);242return AH_NULL;243}244245/*246* Return indices surrounding the value in sorted integer lists.247*248* NB: the input list is assumed to be sorted in ascending order249*/250static void251GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,252uint32_t *vlo, uint32_t *vhi)253{254int16_t target = v;255const int16_t *ep = lp+listSize;256const int16_t *tp;257258/*259* Check first and last elements for out-of-bounds conditions.260*/261if (target < lp[0]) {262*vlo = *vhi = 0;263return;264}265if (target >= ep[-1]) {266*vlo = *vhi = listSize - 1;267return;268}269270/* look for value being near or between 2 values in list */271for (tp = lp; tp < ep; tp++) {272/*273* If value is close to the current value of the list274* then target is not between values, it is one of the values275*/276if (*tp == target) {277*vlo = *vhi = tp - (const int16_t *) lp;278return;279}280/*281* Look for value being between current value and next value282* if so return these 2 values283*/284if (target < tp[1]) {285*vlo = tp - (const int16_t *) lp;286*vhi = *vlo + 1;287return;288}289}290}291292/*293* Fill the Vpdlist for indices Pmax-Pmin294*/295static HAL_BOOL296ar2316FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,297const int16_t *pwrList, const int16_t *VpdList,298uint16_t numIntercepts, uint16_t retVpdList[][64])299{300uint16_t ii, jj, kk;301int16_t currPwr = (int16_t)(2*Pmin);302/* since Pmin is pwr*2 and pwrList is 4*pwr */303uint32_t idxL, idxR;304305ii = 0;306jj = 0;307308if (numIntercepts < 2)309return AH_FALSE;310311while (ii <= (uint16_t)(Pmax - Pmin)) {312GetLowerUpperIndex(currPwr, pwrList, numIntercepts,313&(idxL), &(idxR));314if (idxR < 1)315idxR = 1; /* extrapolate below */316if (idxL == (uint32_t)(numIntercepts - 1))317idxL = numIntercepts - 2; /* extrapolate above */318if (pwrList[idxL] == pwrList[idxR])319kk = VpdList[idxL];320else321kk = (uint16_t)322(((currPwr - pwrList[idxL])*VpdList[idxR]+323(pwrList[idxR] - currPwr)*VpdList[idxL])/324(pwrList[idxR] - pwrList[idxL]));325retVpdList[pdGainIdx][ii] = kk;326ii++;327currPwr += 2; /* half dB steps */328}329330return AH_TRUE;331}332333/*334* Returns interpolated or the scaled up interpolated value335*/336static int16_t337interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,338int16_t targetLeft, int16_t targetRight)339{340int16_t rv;341342if (srcRight != srcLeft) {343rv = ((target - srcLeft)*targetRight +344(srcRight - target)*targetLeft) / (srcRight - srcLeft);345} else {346rv = targetLeft;347}348return rv;349}350351/*352* Uses the data points read from EEPROM to reconstruct the pdadc power table353* Called by ar2316SetPowerTable()354*/355static int356ar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,357const RAW_DATA_STRUCT_2316 *pRawDataset,358uint16_t pdGainOverlap_t2,359int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],360uint16_t pPdGainValues[], uint16_t pPDADCValues[])361{362struct ar2316State *priv = AR2316(ah);363#define VpdTable_L priv->vpdTable_L364#define VpdTable_R priv->vpdTable_R365#define VpdTable_I priv->vpdTable_I366uint32_t ii, jj, kk;367int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */368uint32_t idxL, idxR;369uint32_t numPdGainsUsed = 0;370/*371* If desired to support -ve power levels in future, just372* change pwr_I_0 to signed 5-bits.373*/374int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];375/* to accommodate -ve power levels later on. */376int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];377/* to accommodate -ve power levels later on */378uint16_t numVpd = 0;379uint16_t Vpd_step;380int16_t tmpVal ;381uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;382383/* Get upper lower index */384GetLowerUpperIndex(channel, pRawDataset->pChannels,385pRawDataset->numChannels, &(idxL), &(idxR));386387for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {388jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;389/* work backwards 'cause highest pdGain for lowest power */390numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;391if (numVpd > 0) {392pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;393Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];394if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {395Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];396}397Pmin_t2[numPdGainsUsed] = (int16_t)398(Pmin_t2[numPdGainsUsed] / 2);399Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];400if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])401Pmax_t2[numPdGainsUsed] =402pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];403Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);404ar2316FillVpdTable(405numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],406&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),407&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L408);409ar2316FillVpdTable(410numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],411&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),412&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R413);414for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {415VpdTable_I[numPdGainsUsed][kk] =416interpolate_signed(417channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],418(int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);419}420/* fill VpdTable_I for this pdGain */421numPdGainsUsed++;422}423/* if this pdGain is used */424}425426*pMinCalPower = Pmin_t2[0];427kk = 0; /* index for the final table */428for (ii = 0; ii < numPdGainsUsed; ii++) {429if (ii == (numPdGainsUsed - 1))430pPdGainBoundaries[ii] = Pmax_t2[ii] +431PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;432else433pPdGainBoundaries[ii] = (uint16_t)434((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );435if (pPdGainBoundaries[ii] > 63) {436HALDEBUG(ah, HAL_DEBUG_ANY,437"%s: clamp pPdGainBoundaries[%d] %d\n",438__func__, ii, pPdGainBoundaries[ii]);/*XXX*/439pPdGainBoundaries[ii] = 63;440}441442/* Find starting index for this pdGain */443if (ii == 0)444ss = 0; /* for the first pdGain, start from index 0 */445else446ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -447pdGainOverlap_t2;448Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);449Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);450/*451*-ve ss indicates need to extrapolate data below for this pdGain452*/453while (ss < 0) {454tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);455pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);456ss++;457}458459sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];460tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];461maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;462463while (ss < (int16_t)maxIndex)464pPDADCValues[kk++] = VpdTable_I[ii][ss++];465466Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -467VpdTable_I[ii][sizeCurrVpdTable-2]);468Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);469/*470* for last gain, pdGainBoundary == Pmax_t2, so will471* have to extrapolate472*/473if (tgtIndex > maxIndex) { /* need to extrapolate above */474while(ss < (int16_t)tgtIndex) {475tmpVal = (uint16_t)476(VpdTable_I[ii][sizeCurrVpdTable-1] +477(ss-maxIndex)*Vpd_step);478pPDADCValues[kk++] = (tmpVal > 127) ?479127 : tmpVal;480ss++;481}482} /* extrapolated above */483} /* for all pdGainUsed */484485while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {486pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];487ii++;488}489while (kk < 128) {490pPDADCValues[kk] = pPDADCValues[kk-1];491kk++;492}493494return numPdGainsUsed;495#undef VpdTable_L496#undef VpdTable_R497#undef VpdTable_I498}499500static HAL_BOOL501ar2316SetPowerTable(struct ath_hal *ah,502int16_t *minPower, int16_t *maxPower,503const struct ieee80211_channel *chan,504uint16_t *rfXpdGain)505{506struct ath_hal_5212 *ahp = AH5212(ah);507const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;508const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;509uint16_t pdGainOverlap_t2;510int16_t minCalPower2316_t2;511uint16_t *pdadcValues = ahp->ah_pcdacTable;512uint16_t gainBoundaries[4];513uint32_t reg32, regoffset;514int i, numPdGainsUsed;515#ifndef AH_USE_INIPDGAIN516uint32_t tpcrg1;517#endif518519HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",520__func__, chan->ic_freq, chan->ic_flags);521522if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))523pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];524else if (IEEE80211_IS_CHAN_B(chan))525pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];526else {527HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);528return AH_FALSE;529}530531pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),532AR_PHY_TPCRG5_PD_GAIN_OVERLAP);533534numPdGainsUsed = ar2316getGainBoundariesAndPdadcsForPowers(ah,535chan->channel, pRawDataset, pdGainOverlap_t2,536&minCalPower2316_t2,gainBoundaries, rfXpdGain, pdadcValues);537HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);538539#ifdef AH_USE_INIPDGAIN540/*541* Use pd_gains curve from eeprom; Atheros always uses542* the default curve from the ini file but some vendors543* (e.g. Zcomax) want to override this curve and not544* honoring their settings results in tx power 5dBm low.545*/546OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,547(pRawDataset->pDataPerChannel[0].numPdGains - 1));548#else549tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);550tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)551| SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);552switch (numPdGainsUsed) {553case 3:554tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;555tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);556/* fall thru... */557case 2:558tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;559tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);560/* fall thru... */561case 1:562tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;563tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);564break;565}566#ifdef AH_DEBUG567if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))568HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "569"pd_gains (default 0x%x, calculated 0x%x)\n",570__func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);571#endif572OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);573#endif574575/*576* Note the pdadc table may not start at 0 dBm power, could be577* negative or greater than 0. Need to offset the power578* values by the amount of minPower for griffin579*/580if (minCalPower2316_t2 != 0)581ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2316_t2);582else583ahp->ah_txPowerIndexOffset = 0;584585/* Finally, write the power values into the baseband power table */586regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */587for (i = 0; i < 32; i++) {588reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |589((pdadcValues[4*i + 1] & 0xFF) << 8) |590((pdadcValues[4*i + 2] & 0xFF) << 16) |591((pdadcValues[4*i + 3] & 0xFF) << 24) ;592OS_REG_WRITE(ah, regoffset, reg32);593regoffset += 4;594}595596OS_REG_WRITE(ah, AR_PHY_TPCRG5,597SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |598SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |599SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |600SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |601SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));602603return AH_TRUE;604}605606static int16_t607ar2316GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data)608{609uint32_t ii,jj;610uint16_t Pmin=0,numVpd;611612for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {613jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;614/* work backwards 'cause highest pdGain for lowest power */615numVpd = data->pDataPerPDGain[jj].numVpd;616if (numVpd > 0) {617Pmin = data->pDataPerPDGain[jj].pwr_t4[0];618return(Pmin);619}620}621return(Pmin);622}623624static int16_t625ar2316GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data)626{627uint32_t ii;628uint16_t Pmax=0,numVpd;629630for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {631/* work forwards cuase lowest pdGain for highest power */632numVpd = data->pDataPerPDGain[ii].numVpd;633if (numVpd > 0) {634Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];635return(Pmax);636}637}638return(Pmax);639}640641static HAL_BOOL642ar2316GetChannelMaxMinPower(struct ath_hal *ah,643const struct ieee80211_channel *chan,644int16_t *maxPow, int16_t *minPow)645{646uint16_t freq = chan->ic_freq; /* NB: never mapped */647const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;648const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL;649const RAW_DATA_PER_CHANNEL_2316 *data=AH_NULL;650uint16_t numChannels;651int totalD,totalF, totalMin,last, i;652653*maxPow = 0;654655if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))656pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];657else if (IEEE80211_IS_CHAN_B(chan))658pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];659else660return(AH_FALSE);661662numChannels = pRawDataset->numChannels;663data = pRawDataset->pDataPerChannel;664665/* Make sure the channel is in the range of the TP values666* (freq piers)667*/668if (numChannels < 1)669return(AH_FALSE);670671if ((freq < data[0].channelValue) ||672(freq > data[numChannels-1].channelValue)) {673if (freq < data[0].channelValue) {674*maxPow = ar2316GetMaxPower(ah, &data[0]);675*minPow = ar2316GetMinPower(ah, &data[0]);676return(AH_TRUE);677} else {678*maxPow = ar2316GetMaxPower(ah, &data[numChannels - 1]);679*minPow = ar2316GetMinPower(ah, &data[numChannels - 1]);680return(AH_TRUE);681}682}683684/* Linearly interpolate the power value now */685for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);686last = i++);687totalD = data[i].channelValue - data[last].channelValue;688if (totalD > 0) {689totalF = ar2316GetMaxPower(ah, &data[i]) - ar2316GetMaxPower(ah, &data[last]);690*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +691ar2316GetMaxPower(ah, &data[last])*totalD)/totalD);692totalMin = ar2316GetMinPower(ah, &data[i]) - ar2316GetMinPower(ah, &data[last]);693*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +694ar2316GetMinPower(ah, &data[last])*totalD)/totalD);695return(AH_TRUE);696} else {697if (freq == data[i].channelValue) {698*maxPow = ar2316GetMaxPower(ah, &data[i]);699*minPow = ar2316GetMinPower(ah, &data[i]);700return(AH_TRUE);701} else702return(AH_FALSE);703}704}705706/*707* Free memory for analog bank scratch buffers708*/709static void710ar2316RfDetach(struct ath_hal *ah)711{712struct ath_hal_5212 *ahp = AH5212(ah);713714HALASSERT(ahp->ah_rfHal != AH_NULL);715ath_hal_free(ahp->ah_rfHal);716ahp->ah_rfHal = AH_NULL;717}718719/*720* Allocate memory for private state.721* Scratch Buffer will be reinitialized every reset so no need to zero now722*/723static HAL_BOOL724ar2316RfAttach(struct ath_hal *ah, HAL_STATUS *status)725{726struct ath_hal_5212 *ahp = AH5212(ah);727struct ar2316State *priv;728729HALASSERT(ah->ah_magic == AR5212_MAGIC);730731HALASSERT(ahp->ah_rfHal == AH_NULL);732priv = ath_hal_malloc(sizeof(struct ar2316State));733if (priv == AH_NULL) {734HALDEBUG(ah, HAL_DEBUG_ANY,735"%s: cannot allocate private state\n", __func__);736*status = HAL_ENOMEM; /* XXX */737return AH_FALSE;738}739priv->base.rfDetach = ar2316RfDetach;740priv->base.writeRegs = ar2316WriteRegs;741priv->base.getRfBank = ar2316GetRfBank;742priv->base.setChannel = ar2316SetChannel;743priv->base.setRfRegs = ar2316SetRfRegs;744priv->base.setPowerTable = ar2316SetPowerTable;745priv->base.getChannelMaxMinPower = ar2316GetChannelMaxMinPower;746priv->base.getNfAdjust = ar5212GetNfAdjust;747748ahp->ah_pcdacTable = priv->pcdacTable;749ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);750ahp->ah_rfHal = &priv->base;751752ahp->ah_cwCalRequire = AH_TRUE; /* force initial cal */753754return AH_TRUE;755}756757static HAL_BOOL758ar2316Probe(struct ath_hal *ah)759{760return IS_2316(ah);761}762AH_RF(RF2316, ar2316Probe, ar2316RfAttach);763764765