Path: blob/main/sys/dev/ath/ath_hal/ar5212/ar2413.c
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/*-1* SPDX-License-Identifier: ISC2*3* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting4* Copyright (c) 2002-2008 Atheros Communications, Inc.5*6* Permission to use, copy, modify, and/or distribute this software for any7* purpose with or without fee is hereby granted, provided that the above8* copyright notice and this permission notice appear in all copies.9*10* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES11* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR13* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES14* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN15* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF16* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.17*/18#include "opt_ah.h"1920#include "ah.h"21#include "ah_internal.h"2223#include "ar5212/ar5212.h"24#include "ar5212/ar5212reg.h"25#include "ar5212/ar5212phy.h"2627#include "ah_eeprom_v3.h"2829#define AH_5212_241330#include "ar5212/ar5212.ini"3132#define N(a) (sizeof(a)/sizeof(a[0]))3334struct ar2413State {35RF_HAL_FUNCS base; /* public state, must be first */36uint16_t pcdacTable[PWR_TABLE_SIZE_2413];3738uint32_t Bank1Data[N(ar5212Bank1_2413)];39uint32_t Bank2Data[N(ar5212Bank2_2413)];40uint32_t Bank3Data[N(ar5212Bank3_2413)];41uint32_t Bank6Data[N(ar5212Bank6_2413)];42uint32_t Bank7Data[N(ar5212Bank7_2413)];4344/*45* Private state for reduced stack usage.46*/47/* filled out Vpd table for all pdGains (chanL) */48uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]49[MAX_PWR_RANGE_IN_HALF_DB];50/* filled out Vpd table for all pdGains (chanR) */51uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]52[MAX_PWR_RANGE_IN_HALF_DB];53/* filled out Vpd table for all pdGains (interpolated) */54uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]55[MAX_PWR_RANGE_IN_HALF_DB];56};57#define AR2413(ah) ((struct ar2413State *) AH5212(ah)->ah_rfHal)5859extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,60uint32_t numBits, uint32_t firstBit, uint32_t column);6162static void63ar2413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,64int writes)65{66HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2413, modesIndex, writes);67HAL_INI_WRITE_ARRAY(ah, ar5212Common_2413, 1, writes);68HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2413, freqIndex, writes);69}7071/*72* Take the MHz channel value and set the Channel value73*74* ASSUMES: Writes enabled to analog bus75*/76static HAL_BOOL77ar2413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)78{79uint16_t freq = ath_hal_gethwchannel(ah, chan);80uint32_t channelSel = 0;81uint32_t bModeSynth = 0;82uint32_t aModeRefSel = 0;83uint32_t reg32 = 0;8485OS_MARK(ah, AH_MARK_SETCHANNEL, freq);8687if (freq < 4800) {88uint32_t txctl;8990if (((freq - 2192) % 5) == 0) {91channelSel = ((freq - 672) * 2 - 3040)/10;92bModeSynth = 0;93} else if (((freq - 2224) % 5) == 0) {94channelSel = ((freq - 704) * 2 - 3040) / 10;95bModeSynth = 1;96} else {97HALDEBUG(ah, HAL_DEBUG_ANY,98"%s: invalid channel %u MHz\n",99__func__, freq);100return AH_FALSE;101}102103channelSel = (channelSel << 2) & 0xff;104channelSel = ath_hal_reverseBits(channelSel, 8);105106txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);107if (freq == 2484) {108/* Enable channel spreading for channel 14 */109OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,110txctl | AR_PHY_CCK_TX_CTRL_JAPAN);111} else {112OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,113txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);114}115} else if (((freq % 5) == 2) && (freq <= 5435)) {116freq = freq - 2; /* Align to even 5MHz raster */117channelSel = ath_hal_reverseBits(118(uint32_t)(((freq - 4800)*10)/25 + 1), 8);119aModeRefSel = ath_hal_reverseBits(0, 2);120} else if ((freq % 20) == 0 && freq >= 5120) {121channelSel = ath_hal_reverseBits(122((freq - 4800) / 20 << 2), 8);123aModeRefSel = ath_hal_reverseBits(3, 2);124} else if ((freq % 10) == 0) {125channelSel = ath_hal_reverseBits(126((freq - 4800) / 10 << 1), 8);127aModeRefSel = ath_hal_reverseBits(2, 2);128} else if ((freq % 5) == 0) {129channelSel = ath_hal_reverseBits(130(freq - 4800) / 5, 8);131aModeRefSel = ath_hal_reverseBits(1, 2);132} else {133HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",134__func__, freq);135return AH_FALSE;136}137138reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |139(1 << 12) | 0x1;140OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);141142reg32 >>= 8;143OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);144145AH_PRIVATE(ah)->ah_curchan = chan;146147return AH_TRUE;148}149150/*151* Reads EEPROM header info from device structure and programs152* all rf registers153*154* REQUIRES: Access to the analog rf device155*/156static HAL_BOOL157ar2413SetRfRegs(struct ath_hal *ah,158const struct ieee80211_channel *chan,159uint16_t modesIndex, uint16_t *rfXpdGain)160{161#define RF_BANK_SETUP(_priv, _ix, _col) do { \162int i; \163for (i = 0; i < N(ar5212Bank##_ix##_2413); i++) \164(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2413[i][_col];\165} while (0)166struct ath_hal_5212 *ahp = AH5212(ah);167const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;168uint16_t ob2GHz = 0, db2GHz = 0;169struct ar2413State *priv = AR2413(ah);170int regWrites = 0;171172HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",173__func__, chan->ic_freq, chan->ic_flags, modesIndex);174175HALASSERT(priv);176177/* Setup rf parameters */178if (IEEE80211_IS_CHAN_B(chan)) {179ob2GHz = ee->ee_obFor24;180db2GHz = ee->ee_dbFor24;181} else {182ob2GHz = ee->ee_obFor24g;183db2GHz = ee->ee_dbFor24g;184}185186/* Bank 1 Write */187RF_BANK_SETUP(priv, 1, 1);188189/* Bank 2 Write */190RF_BANK_SETUP(priv, 2, modesIndex);191192/* Bank 3 Write */193RF_BANK_SETUP(priv, 3, modesIndex);194195/* Bank 6 Write */196RF_BANK_SETUP(priv, 6, modesIndex);197198ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 168, 0);199ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 165, 0);200201/* Bank 7 Setup */202RF_BANK_SETUP(priv, 7, modesIndex);203204/* Write Analog registers */205HAL_INI_WRITE_BANK(ah, ar5212Bank1_2413, priv->Bank1Data, regWrites);206HAL_INI_WRITE_BANK(ah, ar5212Bank2_2413, priv->Bank2Data, regWrites);207HAL_INI_WRITE_BANK(ah, ar5212Bank3_2413, priv->Bank3Data, regWrites);208HAL_INI_WRITE_BANK(ah, ar5212Bank6_2413, priv->Bank6Data, regWrites);209HAL_INI_WRITE_BANK(ah, ar5212Bank7_2413, priv->Bank7Data, regWrites);210211/* Now that we have reprogrammed rfgain value, clear the flag. */212ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;213214return AH_TRUE;215#undef RF_BANK_SETUP216}217218/*219* Return a reference to the requested RF Bank.220*/221static uint32_t *222ar2413GetRfBank(struct ath_hal *ah, int bank)223{224struct ar2413State *priv = AR2413(ah);225226HALASSERT(priv != AH_NULL);227switch (bank) {228case 1: return priv->Bank1Data;229case 2: return priv->Bank2Data;230case 3: return priv->Bank3Data;231case 6: return priv->Bank6Data;232case 7: return priv->Bank7Data;233}234HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",235__func__, bank);236return AH_NULL;237}238239/*240* Return indices surrounding the value in sorted integer lists.241*242* NB: the input list is assumed to be sorted in ascending order243*/244static void245GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,246uint32_t *vlo, uint32_t *vhi)247{248int16_t target = v;249const uint16_t *ep = lp+listSize;250const uint16_t *tp;251252/*253* Check first and last elements for out-of-bounds conditions.254*/255if (target < lp[0]) {256*vlo = *vhi = 0;257return;258}259if (target >= ep[-1]) {260*vlo = *vhi = listSize - 1;261return;262}263264/* look for value being near or between 2 values in list */265for (tp = lp; tp < ep; tp++) {266/*267* If value is close to the current value of the list268* then target is not between values, it is one of the values269*/270if (*tp == target) {271*vlo = *vhi = tp - (const uint16_t *) lp;272return;273}274/*275* Look for value being between current value and next value276* if so return these 2 values277*/278if (target < tp[1]) {279*vlo = tp - (const uint16_t *) lp;280*vhi = *vlo + 1;281return;282}283}284}285286/*287* Fill the Vpdlist for indices Pmax-Pmin288*/289static HAL_BOOL290ar2413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,291const int16_t *pwrList, const uint16_t *VpdList,292uint16_t numIntercepts, uint16_t retVpdList[][64])293{294uint16_t ii, jj, kk;295int16_t currPwr = (int16_t)(2*Pmin);296/* since Pmin is pwr*2 and pwrList is 4*pwr */297uint32_t idxL, idxR;298299ii = 0;300jj = 0;301302if (numIntercepts < 2)303return AH_FALSE;304305while (ii <= (uint16_t)(Pmax - Pmin)) {306GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,307numIntercepts, &(idxL), &(idxR));308if (idxR < 1)309idxR = 1; /* extrapolate below */310if (idxL == (uint32_t)(numIntercepts - 1))311idxL = numIntercepts - 2; /* extrapolate above */312if (pwrList[idxL] == pwrList[idxR])313kk = VpdList[idxL];314else315kk = (uint16_t)316(((currPwr - pwrList[idxL])*VpdList[idxR]+317(pwrList[idxR] - currPwr)*VpdList[idxL])/318(pwrList[idxR] - pwrList[idxL]));319retVpdList[pdGainIdx][ii] = kk;320ii++;321currPwr += 2; /* half dB steps */322}323324return AH_TRUE;325}326327/*328* Returns interpolated or the scaled up interpolated value329*/330static int16_t331interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,332int16_t targetLeft, int16_t targetRight)333{334int16_t rv;335336if (srcRight != srcLeft) {337rv = ((target - srcLeft)*targetRight +338(srcRight - target)*targetLeft) / (srcRight - srcLeft);339} else {340rv = targetLeft;341}342return rv;343}344345/*346* Uses the data points read from EEPROM to reconstruct the pdadc power table347* Called by ar2413SetPowerTable()348*/349static int350ar2413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,351const RAW_DATA_STRUCT_2413 *pRawDataset,352uint16_t pdGainOverlap_t2,353int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],354uint16_t pPdGainValues[], uint16_t pPDADCValues[])355{356struct ar2413State *priv = AR2413(ah);357#define VpdTable_L priv->vpdTable_L358#define VpdTable_R priv->vpdTable_R359#define VpdTable_I priv->vpdTable_I360uint32_t ii, jj, kk;361int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */362uint32_t idxL, idxR;363uint32_t numPdGainsUsed = 0;364/*365* If desired to support -ve power levels in future, just366* change pwr_I_0 to signed 5-bits.367*/368int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];369/* to accommodate -ve power levels later on. */370int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];371/* to accommodate -ve power levels later on */372uint16_t numVpd = 0;373uint16_t Vpd_step;374int16_t tmpVal ;375uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;376377/* Get upper lower index */378GetLowerUpperIndex(channel, pRawDataset->pChannels,379pRawDataset->numChannels, &(idxL), &(idxR));380381for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {382jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;383/* work backwards 'cause highest pdGain for lowest power */384numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;385if (numVpd > 0) {386pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;387Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];388if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {389Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];390}391Pmin_t2[numPdGainsUsed] = (int16_t)392(Pmin_t2[numPdGainsUsed] / 2);393Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];394if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])395Pmax_t2[numPdGainsUsed] =396pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];397Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);398ar2413FillVpdTable(399numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],400&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),401&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L402);403ar2413FillVpdTable(404numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],405&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),406&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R407);408for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {409VpdTable_I[numPdGainsUsed][kk] =410interpolate_signed(411channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],412(int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);413}414/* fill VpdTable_I for this pdGain */415numPdGainsUsed++;416}417/* if this pdGain is used */418}419420*pMinCalPower = Pmin_t2[0];421kk = 0; /* index for the final table */422for (ii = 0; ii < numPdGainsUsed; ii++) {423if (ii == (numPdGainsUsed - 1))424pPdGainBoundaries[ii] = Pmax_t2[ii] +425PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;426else427pPdGainBoundaries[ii] = (uint16_t)428((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );429if (pPdGainBoundaries[ii] > 63) {430HALDEBUG(ah, HAL_DEBUG_ANY,431"%s: clamp pPdGainBoundaries[%d] %d\n",432__func__, ii, pPdGainBoundaries[ii]);/*XXX*/433pPdGainBoundaries[ii] = 63;434}435436/* Find starting index for this pdGain */437if (ii == 0)438ss = 0; /* for the first pdGain, start from index 0 */439else440ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -441pdGainOverlap_t2;442Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);443Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);444/*445*-ve ss indicates need to extrapolate data below for this pdGain446*/447while (ss < 0) {448tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);449pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);450ss++;451}452453sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];454tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];455maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;456457while (ss < (int16_t)maxIndex)458pPDADCValues[kk++] = VpdTable_I[ii][ss++];459460Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -461VpdTable_I[ii][sizeCurrVpdTable-2]);462Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);463/*464* for last gain, pdGainBoundary == Pmax_t2, so will465* have to extrapolate466*/467if (tgtIndex > maxIndex) { /* need to extrapolate above */468while(ss < (int16_t)tgtIndex) {469tmpVal = (uint16_t)470(VpdTable_I[ii][sizeCurrVpdTable-1] +471(ss-maxIndex)*Vpd_step);472pPDADCValues[kk++] = (tmpVal > 127) ?473127 : tmpVal;474ss++;475}476} /* extrapolated above */477} /* for all pdGainUsed */478479while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {480pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];481ii++;482}483while (kk < 128) {484pPDADCValues[kk] = pPDADCValues[kk-1];485kk++;486}487488return numPdGainsUsed;489#undef VpdTable_L490#undef VpdTable_R491#undef VpdTable_I492}493494static HAL_BOOL495ar2413SetPowerTable(struct ath_hal *ah,496int16_t *minPower, int16_t *maxPower,497const struct ieee80211_channel *chan,498uint16_t *rfXpdGain)499{500uint16_t freq = ath_hal_gethwchannel(ah, chan);501struct ath_hal_5212 *ahp = AH5212(ah);502const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;503const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;504uint16_t pdGainOverlap_t2;505int16_t minCalPower2413_t2;506uint16_t *pdadcValues = ahp->ah_pcdacTable;507uint16_t gainBoundaries[4];508uint32_t reg32, regoffset;509int i, numPdGainsUsed;510#ifndef AH_USE_INIPDGAIN511uint32_t tpcrg1;512#endif513514HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",515__func__, freq, chan->ic_flags);516517if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))518pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];519else if (IEEE80211_IS_CHAN_B(chan))520pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];521else {522HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__);523return AH_FALSE;524}525526pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),527AR_PHY_TPCRG5_PD_GAIN_OVERLAP);528529numPdGainsUsed = ar2413getGainBoundariesAndPdadcsForPowers(ah,530freq, pRawDataset, pdGainOverlap_t2,531&minCalPower2413_t2,gainBoundaries, rfXpdGain, pdadcValues);532HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);533534#ifdef AH_USE_INIPDGAIN535/*536* Use pd_gains curve from eeprom; Atheros always uses537* the default curve from the ini file but some vendors538* (e.g. Zcomax) want to override this curve and not539* honoring their settings results in tx power 5dBm low.540*/541OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,542(pRawDataset->pDataPerChannel[0].numPdGains - 1));543#else544tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);545tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)546| SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);547switch (numPdGainsUsed) {548case 3:549tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;550tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);551/* fall thru... */552case 2:553tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;554tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);555/* fall thru... */556case 1:557tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;558tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);559break;560}561#ifdef AH_DEBUG562if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))563HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "564"pd_gains (default 0x%x, calculated 0x%x)\n",565__func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);566#endif567OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);568#endif569570/*571* Note the pdadc table may not start at 0 dBm power, could be572* negative or greater than 0. Need to offset the power573* values by the amount of minPower for griffin574*/575if (minCalPower2413_t2 != 0)576ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2);577else578ahp->ah_txPowerIndexOffset = 0;579580/* Finally, write the power values into the baseband power table */581regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */582for (i = 0; i < 32; i++) {583reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |584((pdadcValues[4*i + 1] & 0xFF) << 8) |585((pdadcValues[4*i + 2] & 0xFF) << 16) |586((pdadcValues[4*i + 3] & 0xFF) << 24) ;587OS_REG_WRITE(ah, regoffset, reg32);588regoffset += 4;589}590591OS_REG_WRITE(ah, AR_PHY_TPCRG5,592SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |593SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |594SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |595SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |596SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));597598return AH_TRUE;599}600601static int16_t602ar2413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)603{604uint32_t ii,jj;605uint16_t Pmin=0,numVpd;606607for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {608jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;609/* work backwards 'cause highest pdGain for lowest power */610numVpd = data->pDataPerPDGain[jj].numVpd;611if (numVpd > 0) {612Pmin = data->pDataPerPDGain[jj].pwr_t4[0];613return(Pmin);614}615}616return(Pmin);617}618619static int16_t620ar2413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)621{622uint32_t ii;623uint16_t Pmax=0,numVpd;624625for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {626/* work forwards cuase lowest pdGain for highest power */627numVpd = data->pDataPerPDGain[ii].numVpd;628if (numVpd > 0) {629Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];630return(Pmax);631}632}633return(Pmax);634}635636static HAL_BOOL637ar2413GetChannelMaxMinPower(struct ath_hal *ah,638const struct ieee80211_channel *chan,639int16_t *maxPow, int16_t *minPow)640{641uint16_t freq = chan->ic_freq; /* NB: never mapped */642const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;643const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;644const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL;645uint16_t numChannels;646int totalD,totalF, totalMin,last, i;647648*maxPow = 0;649650if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))651pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];652else if (IEEE80211_IS_CHAN_B(chan))653pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];654else655return(AH_FALSE);656657numChannels = pRawDataset->numChannels;658data = pRawDataset->pDataPerChannel;659660/* Make sure the channel is in the range of the TP values661* (freq piers)662*/663if (numChannels < 1)664return(AH_FALSE);665666if ((freq < data[0].channelValue) ||667(freq > data[numChannels-1].channelValue)) {668if (freq < data[0].channelValue) {669*maxPow = ar2413GetMaxPower(ah, &data[0]);670*minPow = ar2413GetMinPower(ah, &data[0]);671return(AH_TRUE);672} else {673*maxPow = ar2413GetMaxPower(ah, &data[numChannels - 1]);674*minPow = ar2413GetMinPower(ah, &data[numChannels - 1]);675return(AH_TRUE);676}677}678679/* Linearly interpolate the power value now */680for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);681last = i++);682totalD = data[i].channelValue - data[last].channelValue;683if (totalD > 0) {684totalF = ar2413GetMaxPower(ah, &data[i]) - ar2413GetMaxPower(ah, &data[last]);685*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +686ar2413GetMaxPower(ah, &data[last])*totalD)/totalD);687totalMin = ar2413GetMinPower(ah, &data[i]) - ar2413GetMinPower(ah, &data[last]);688*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +689ar2413GetMinPower(ah, &data[last])*totalD)/totalD);690return(AH_TRUE);691} else {692if (freq == data[i].channelValue) {693*maxPow = ar2413GetMaxPower(ah, &data[i]);694*minPow = ar2413GetMinPower(ah, &data[i]);695return(AH_TRUE);696} else697return(AH_FALSE);698}699}700701/*702* Free memory for analog bank scratch buffers703*/704static void705ar2413RfDetach(struct ath_hal *ah)706{707struct ath_hal_5212 *ahp = AH5212(ah);708709HALASSERT(ahp->ah_rfHal != AH_NULL);710ath_hal_free(ahp->ah_rfHal);711ahp->ah_rfHal = AH_NULL;712}713714/*715* Allocate memory for analog bank scratch buffers716* Scratch Buffer will be reinitialized every reset so no need to zero now717*/718static HAL_BOOL719ar2413RfAttach(struct ath_hal *ah, HAL_STATUS *status)720{721struct ath_hal_5212 *ahp = AH5212(ah);722struct ar2413State *priv;723724HALASSERT(ah->ah_magic == AR5212_MAGIC);725726HALASSERT(ahp->ah_rfHal == AH_NULL);727priv = ath_hal_malloc(sizeof(struct ar2413State));728if (priv == AH_NULL) {729HALDEBUG(ah, HAL_DEBUG_ANY,730"%s: cannot allocate private state\n", __func__);731*status = HAL_ENOMEM; /* XXX */732return AH_FALSE;733}734priv->base.rfDetach = ar2413RfDetach;735priv->base.writeRegs = ar2413WriteRegs;736priv->base.getRfBank = ar2413GetRfBank;737priv->base.setChannel = ar2413SetChannel;738priv->base.setRfRegs = ar2413SetRfRegs;739priv->base.setPowerTable = ar2413SetPowerTable;740priv->base.getChannelMaxMinPower = ar2413GetChannelMaxMinPower;741priv->base.getNfAdjust = ar5212GetNfAdjust;742743ahp->ah_pcdacTable = priv->pcdacTable;744ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);745ahp->ah_rfHal = &priv->base;746747return AH_TRUE;748}749750static HAL_BOOL751ar2413Probe(struct ath_hal *ah)752{753return IS_2413(ah);754}755AH_RF(RF2413, ar2413Probe, ar2413RfAttach);756757758