Path: blob/main/sys/dev/ath/ath_hal/ar5212/ar5311reg.h
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/*-1* SPDX-License-Identifier: ISC2*3* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting4* Copyright (c) 2002-2008 Atheros Communications, Inc.5*6* Permission to use, copy, modify, and/or distribute this software for any7* purpose with or without fee is hereby granted, provided that the above8* copyright notice and this permission notice appear in all copies.9*10* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES11* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR13* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES14* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN15* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF16* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.17*/18#ifndef _DEV_ATH_AR5311REG_H_19#define _DEV_ATH_AR5311REG_H_2021/*22* Definitions for the Atheros 5311 chipset.23*/24#define AR5311_QDCLKGATE 0x005c /* MAC QCU/DCU clock gating control */25#define AR5311_QDCLKGATE_QCU_M 0x0000FFFF /* QCU clock disable */26#define AR5311_QDCLKGATE_DCU_M 0x07FF0000 /* DCU clock disable */2728#define AR5311_RXCFG_DEF_RX_ANTENNA 0x00000008 /* Default Receive Antenna */2930/*31* NOTE: MAC_5211/MAC_5311 difference32* On Oahu the TX latency field has increased from 6 bits to 9 bits.33* The RX latency field is unchanged but is shifted over 3 bits.34*/35#define AR5311_USEC_TX_LAT_M 0x000FC000 /* tx latency (usec) */36#define AR5311_USEC_TX_LAT_S 1437#define AR5311_USEC_RX_LAT_M 0x03F00000 /* rx latency (usec) */38#define AR5311_USEC_RX_LAT_S 203940/*41* NOTE: MAC_5211/MAC_5311 difference42* On Maui2/Spirit the frame sequence number is controlled per DCU.43* On Oahu the frame sequence number is global across all DCUs and44* is controlled45*/46#define AR5311_D_MISC_SEQ_NUM_CONTROL 0x01000000 /* seq num local or global */47#define AR5311_DIAG_USE_ECO 0x00000400 /* "super secret" enable ECO */4849#endif /* _DEV_ATH_AR5311REG_H_ */505152