Path: blob/main/sys/dev/ath/ath_hal/ar5212/ar5413.c
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/*-1* SPDX-License-Identifier: ISC2*3* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting4* Copyright (c) 2002-2008 Atheros Communications, Inc.5*6* Permission to use, copy, modify, and/or distribute this software for any7* purpose with or without fee is hereby granted, provided that the above8* copyright notice and this permission notice appear in all copies.9*10* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES11* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR13* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES14* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN15* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF16* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.17*/18#include "opt_ah.h"1920#include "ah.h"21#include "ah_internal.h"2223#include "ah_eeprom_v3.h"2425#include "ar5212/ar5212.h"26#include "ar5212/ar5212reg.h"27#include "ar5212/ar5212phy.h"2829#define AH_5212_541330#include "ar5212/ar5212.ini"3132#define N(a) (sizeof(a)/sizeof(a[0]))3334struct ar5413State {35RF_HAL_FUNCS base; /* public state, must be first */36uint16_t pcdacTable[PWR_TABLE_SIZE_2413];3738uint32_t Bank1Data[N(ar5212Bank1_5413)];39uint32_t Bank2Data[N(ar5212Bank2_5413)];40uint32_t Bank3Data[N(ar5212Bank3_5413)];41uint32_t Bank6Data[N(ar5212Bank6_5413)];42uint32_t Bank7Data[N(ar5212Bank7_5413)];4344/*45* Private state for reduced stack usage.46*/47/* filled out Vpd table for all pdGains (chanL) */48uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL]49[MAX_PWR_RANGE_IN_HALF_DB];50/* filled out Vpd table for all pdGains (chanR) */51uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL]52[MAX_PWR_RANGE_IN_HALF_DB];53/* filled out Vpd table for all pdGains (interpolated) */54uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL]55[MAX_PWR_RANGE_IN_HALF_DB];56};57#define AR5413(ah) ((struct ar5413State *) AH5212(ah)->ah_rfHal)5859extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,60uint32_t numBits, uint32_t firstBit, uint32_t column);6162static void63ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,64int writes)65{66HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes);67HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes);68HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes);69}7071/*72* Take the MHz channel value and set the Channel value73*74* ASSUMES: Writes enabled to analog bus75*/76static HAL_BOOL77ar5413SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)78{79uint16_t freq = ath_hal_gethwchannel(ah, chan);80uint32_t channelSel = 0;81uint32_t bModeSynth = 0;82uint32_t aModeRefSel = 0;83uint32_t reg32 = 0;8485OS_MARK(ah, AH_MARK_SETCHANNEL, freq);8687if (freq < 4800) {88uint32_t txctl;8990if (((freq - 2192) % 5) == 0) {91channelSel = ((freq - 672) * 2 - 3040)/10;92bModeSynth = 0;93} else if (((freq - 2224) % 5) == 0) {94channelSel = ((freq - 704) * 2 - 3040) / 10;95bModeSynth = 1;96} else {97HALDEBUG(ah, HAL_DEBUG_ANY,98"%s: invalid channel %u MHz\n",99__func__, freq);100return AH_FALSE;101}102103channelSel = (channelSel << 2) & 0xff;104channelSel = ath_hal_reverseBits(channelSel, 8);105106txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);107if (freq == 2484) {108/* Enable channel spreading for channel 14 */109OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,110txctl | AR_PHY_CCK_TX_CTRL_JAPAN);111} else {112OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,113txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);114}115} else if (((freq % 5) == 2) && (freq <= 5435)) {116freq = freq - 2; /* Align to even 5MHz raster */117channelSel = ath_hal_reverseBits(118(uint32_t)(((freq - 4800)*10)/25 + 1), 8);119aModeRefSel = ath_hal_reverseBits(0, 2);120} else if ((freq % 20) == 0 && freq >= 5120) {121channelSel = ath_hal_reverseBits(122((freq - 4800) / 20 << 2), 8);123aModeRefSel = ath_hal_reverseBits(1, 2);124} else if ((freq % 10) == 0) {125channelSel = ath_hal_reverseBits(126((freq - 4800) / 10 << 1), 8);127aModeRefSel = ath_hal_reverseBits(1, 2);128} else if ((freq % 5) == 0) {129channelSel = ath_hal_reverseBits(130(freq - 4800) / 5, 8);131aModeRefSel = ath_hal_reverseBits(1, 2);132} else {133HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",134__func__, freq);135return AH_FALSE;136}137138reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |139(1 << 12) | 0x1;140OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);141142reg32 >>= 8;143OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);144145AH_PRIVATE(ah)->ah_curchan = chan;146return AH_TRUE;147}148149/*150* Reads EEPROM header info from device structure and programs151* all rf registers152*153* REQUIRES: Access to the analog rf device154*/155static HAL_BOOL156ar5413SetRfRegs(struct ath_hal *ah,157const struct ieee80211_channel *chan,158uint16_t modesIndex, uint16_t *rfXpdGain)159{160#define RF_BANK_SETUP(_priv, _ix, _col) do { \161int i; \162for (i = 0; i < N(ar5212Bank##_ix##_5413); i++) \163(_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\164} while (0)165struct ath_hal_5212 *ahp = AH5212(ah);166uint16_t freq = ath_hal_gethwchannel(ah, chan);167const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;168uint16_t ob5GHz = 0, db5GHz = 0;169uint16_t ob2GHz = 0, db2GHz = 0;170struct ar5413State *priv = AR5413(ah);171int regWrites = 0;172173HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",174__func__, chan->ic_freq, chan->ic_flags, modesIndex);175176HALASSERT(priv != AH_NULL);177178/* Setup rf parameters */179switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {180case IEEE80211_CHAN_A:181if (freq > 4000 && freq < 5260) {182ob5GHz = ee->ee_ob1;183db5GHz = ee->ee_db1;184} else if (freq >= 5260 && freq < 5500) {185ob5GHz = ee->ee_ob2;186db5GHz = ee->ee_db2;187} else if (freq >= 5500 && freq < 5725) {188ob5GHz = ee->ee_ob3;189db5GHz = ee->ee_db3;190} else if (freq >= 5725) {191ob5GHz = ee->ee_ob4;192db5GHz = ee->ee_db4;193} else {194/* XXX else */195}196break;197case IEEE80211_CHAN_B:198ob2GHz = ee->ee_obFor24;199db2GHz = ee->ee_dbFor24;200break;201case IEEE80211_CHAN_G:202case IEEE80211_CHAN_PUREG: /* NB: really 108G */203ob2GHz = ee->ee_obFor24g;204db2GHz = ee->ee_dbFor24g;205break;206default:207HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",208__func__, chan->ic_flags);209return AH_FALSE;210}211212/* Bank 1 Write */213RF_BANK_SETUP(priv, 1, 1);214215/* Bank 2 Write */216RF_BANK_SETUP(priv, 2, modesIndex);217218/* Bank 3 Write */219RF_BANK_SETUP(priv, 3, modesIndex);220221/* Bank 6 Write */222RF_BANK_SETUP(priv, 6, modesIndex);223224/* Only the 5 or 2 GHz OB/DB need to be set for a mode */225if (IEEE80211_IS_CHAN_2GHZ(chan)) {226ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0);227ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0);228229/* TODO - only for Eagle 1.0 2GHz - remove for production */230/* XXX: but without this bit G doesn't work. */231ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2);232233/* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */234if (AH_PRIVATE(ah)->ah_ispcie) {235ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3),2363, 131, 3);237}238} else {239ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);240ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);241}242243/* Bank 7 Setup */244RF_BANK_SETUP(priv, 7, modesIndex);245246/* Write Analog registers */247HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites);248HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites);249HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites);250HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites);251HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites);252253/* Now that we have reprogrammed rfgain value, clear the flag. */254ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;255256return AH_TRUE;257#undef RF_BANK_SETUP258}259260/*261* Return a reference to the requested RF Bank.262*/263static uint32_t *264ar5413GetRfBank(struct ath_hal *ah, int bank)265{266struct ar5413State *priv = AR5413(ah);267268HALASSERT(priv != AH_NULL);269switch (bank) {270case 1: return priv->Bank1Data;271case 2: return priv->Bank2Data;272case 3: return priv->Bank3Data;273case 6: return priv->Bank6Data;274case 7: return priv->Bank7Data;275}276HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",277__func__, bank);278return AH_NULL;279}280281/*282* Return indices surrounding the value in sorted integer lists.283*284* NB: the input list is assumed to be sorted in ascending order285*/286static void287GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,288uint32_t *vlo, uint32_t *vhi)289{290int16_t target = v;291const uint16_t *ep = lp+listSize;292const uint16_t *tp;293294/*295* Check first and last elements for out-of-bounds conditions.296*/297if (target < lp[0]) {298*vlo = *vhi = 0;299return;300}301if (target >= ep[-1]) {302*vlo = *vhi = listSize - 1;303return;304}305306/* look for value being near or between 2 values in list */307for (tp = lp; tp < ep; tp++) {308/*309* If value is close to the current value of the list310* then target is not between values, it is one of the values311*/312if (*tp == target) {313*vlo = *vhi = tp - (const uint16_t *) lp;314return;315}316/*317* Look for value being between current value and next value318* if so return these 2 values319*/320if (target < tp[1]) {321*vlo = tp - (const uint16_t *) lp;322*vhi = *vlo + 1;323return;324}325}326}327328/*329* Fill the Vpdlist for indices Pmax-Pmin330*/331static HAL_BOOL332ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,333const int16_t *pwrList, const uint16_t *VpdList,334uint16_t numIntercepts,335uint16_t retVpdList[][64])336{337uint16_t ii, jj, kk;338int16_t currPwr = (int16_t)(2*Pmin);339/* since Pmin is pwr*2 and pwrList is 4*pwr */340uint32_t idxL, idxR;341342ii = 0;343jj = 0;344345if (numIntercepts < 2)346return AH_FALSE;347348while (ii <= (uint16_t)(Pmax - Pmin)) {349GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,350numIntercepts, &(idxL), &(idxR));351if (idxR < 1)352idxR = 1; /* extrapolate below */353if (idxL == (uint32_t)(numIntercepts - 1))354idxL = numIntercepts - 2; /* extrapolate above */355if (pwrList[idxL] == pwrList[idxR])356kk = VpdList[idxL];357else358kk = (uint16_t)359(((currPwr - pwrList[idxL])*VpdList[idxR]+360(pwrList[idxR] - currPwr)*VpdList[idxL])/361(pwrList[idxR] - pwrList[idxL]));362retVpdList[pdGainIdx][ii] = kk;363ii++;364currPwr += 2; /* half dB steps */365}366367return AH_TRUE;368}369370/*371* Returns interpolated or the scaled up interpolated value372*/373static int16_t374interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,375int16_t targetLeft, int16_t targetRight)376{377int16_t rv;378379if (srcRight != srcLeft) {380rv = ((target - srcLeft)*targetRight +381(srcRight - target)*targetLeft) / (srcRight - srcLeft);382} else {383rv = targetLeft;384}385return rv;386}387388/*389* Uses the data points read from EEPROM to reconstruct the pdadc power table390* Called by ar5413SetPowerTable()391*/392static int393ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,394const RAW_DATA_STRUCT_2413 *pRawDataset,395uint16_t pdGainOverlap_t2,396int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],397uint16_t pPdGainValues[], uint16_t pPDADCValues[])398{399struct ar5413State *priv = AR5413(ah);400#define VpdTable_L priv->vpdTable_L401#define VpdTable_R priv->vpdTable_R402#define VpdTable_I priv->vpdTable_I403uint32_t ii, jj, kk;404int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */405uint32_t idxL, idxR;406uint32_t numPdGainsUsed = 0;407/*408* If desired to support -ve power levels in future, just409* change pwr_I_0 to signed 5-bits.410*/411int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];412/* to accommodate -ve power levels later on. */413int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];414/* to accommodate -ve power levels later on */415uint16_t numVpd = 0;416uint16_t Vpd_step;417int16_t tmpVal ;418uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;419420/* Get upper lower index */421GetLowerUpperIndex(channel, pRawDataset->pChannels,422pRawDataset->numChannels, &(idxL), &(idxR));423424for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {425jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;426/* work backwards 'cause highest pdGain for lowest power */427numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;428if (numVpd > 0) {429pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;430Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];431if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {432Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];433}434Pmin_t2[numPdGainsUsed] = (int16_t)435(Pmin_t2[numPdGainsUsed] / 2);436Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];437if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])438Pmax_t2[numPdGainsUsed] =439pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];440Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);441ar5413FillVpdTable(442numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],443&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),444&(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L445);446ar5413FillVpdTable(447numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],448&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),449&(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R450);451for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {452VpdTable_I[numPdGainsUsed][kk] =453interpolate_signed(454channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],455(int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);456}457/* fill VpdTable_I for this pdGain */458numPdGainsUsed++;459}460/* if this pdGain is used */461}462463*pMinCalPower = Pmin_t2[0];464kk = 0; /* index for the final table */465for (ii = 0; ii < numPdGainsUsed; ii++) {466if (ii == (numPdGainsUsed - 1))467pPdGainBoundaries[ii] = Pmax_t2[ii] +468PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;469else470pPdGainBoundaries[ii] = (uint16_t)471((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );472if (pPdGainBoundaries[ii] > 63) {473HALDEBUG(ah, HAL_DEBUG_ANY,474"%s: clamp pPdGainBoundaries[%d] %d\n",475__func__, ii, pPdGainBoundaries[ii]);/*XXX*/476pPdGainBoundaries[ii] = 63;477}478479/* Find starting index for this pdGain */480if (ii == 0)481ss = 0; /* for the first pdGain, start from index 0 */482else483ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -484pdGainOverlap_t2;485Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);486Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);487/*488*-ve ss indicates need to extrapolate data below for this pdGain489*/490while (ss < 0) {491tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);492pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);493ss++;494}495496sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];497tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];498maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;499500while (ss < (int16_t)maxIndex)501pPDADCValues[kk++] = VpdTable_I[ii][ss++];502503Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -504VpdTable_I[ii][sizeCurrVpdTable-2]);505Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);506/*507* for last gain, pdGainBoundary == Pmax_t2, so will508* have to extrapolate509*/510if (tgtIndex > maxIndex) { /* need to extrapolate above */511while(ss < (int16_t)tgtIndex) {512tmpVal = (uint16_t)513(VpdTable_I[ii][sizeCurrVpdTable-1] +514(ss-maxIndex)*Vpd_step);515pPDADCValues[kk++] = (tmpVal > 127) ?516127 : tmpVal;517ss++;518}519} /* extrapolated above */520} /* for all pdGainUsed */521522while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {523pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];524ii++;525}526while (kk < 128) {527pPDADCValues[kk] = pPDADCValues[kk-1];528kk++;529}530531return numPdGainsUsed;532#undef VpdTable_L533#undef VpdTable_R534#undef VpdTable_I535}536537static HAL_BOOL538ar5413SetPowerTable(struct ath_hal *ah,539int16_t *minPower, int16_t *maxPower,540const struct ieee80211_channel *chan,541uint16_t *rfXpdGain)542{543struct ath_hal_5212 *ahp = AH5212(ah);544uint16_t freq = ath_hal_gethwchannel(ah, chan);545const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;546const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;547uint16_t pdGainOverlap_t2;548int16_t minCalPower5413_t2;549uint16_t *pdadcValues = ahp->ah_pcdacTable;550uint16_t gainBoundaries[4];551uint32_t reg32, regoffset;552int i, numPdGainsUsed;553#ifndef AH_USE_INIPDGAIN554uint32_t tpcrg1;555#endif556557HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n",558__func__, chan->ic_freq, chan->ic_flags);559560if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))561pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];562else if (IEEE80211_IS_CHAN_B(chan))563pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];564else {565HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));566pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];567}568569pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),570AR_PHY_TPCRG5_PD_GAIN_OVERLAP);571572numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah,573freq, pRawDataset, pdGainOverlap_t2,574&minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues);575HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3);576577#ifdef AH_USE_INIPDGAIN578/*579* Use pd_gains curve from eeprom; Atheros always uses580* the default curve from the ini file but some vendors581* (e.g. Zcomax) want to override this curve and not582* honoring their settings results in tx power 5dBm low.583*/584OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,585(pRawDataset->pDataPerChannel[0].numPdGains - 1));586#else587tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1);588tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN)589| SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN);590switch (numPdGainsUsed) {591case 3:592tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3;593tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3);594/* fall thru... */595case 2:596tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2;597tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2);598/* fall thru... */599case 1:600tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1;601tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1);602break;603}604#ifdef AH_DEBUG605if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1))606HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default "607"pd_gains (default 0x%x, calculated 0x%x)\n",608__func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1);609#endif610OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1);611#endif612613/*614* Note the pdadc table may not start at 0 dBm power, could be615* negative or greater than 0. Need to offset the power616* values by the amount of minPower for griffin617*/618if (minCalPower5413_t2 != 0)619ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2);620else621ahp->ah_txPowerIndexOffset = 0;622623/* Finally, write the power values into the baseband power table */624regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */625for (i = 0; i < 32; i++) {626reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |627((pdadcValues[4*i + 1] & 0xFF) << 8) |628((pdadcValues[4*i + 2] & 0xFF) << 16) |629((pdadcValues[4*i + 3] & 0xFF) << 24) ;630OS_REG_WRITE(ah, regoffset, reg32);631regoffset += 4;632}633634OS_REG_WRITE(ah, AR_PHY_TPCRG5,635SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |636SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |637SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |638SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |639SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));640641return AH_TRUE;642}643644static int16_t645ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)646{647uint32_t ii,jj;648uint16_t Pmin=0,numVpd;649650for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {651jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;652/* work backwards 'cause highest pdGain for lowest power */653numVpd = data->pDataPerPDGain[jj].numVpd;654if (numVpd > 0) {655Pmin = data->pDataPerPDGain[jj].pwr_t4[0];656return(Pmin);657}658}659return(Pmin);660}661662static int16_t663ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)664{665uint32_t ii;666uint16_t Pmax=0,numVpd;667668for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {669/* work forwards cuase lowest pdGain for highest power */670numVpd = data->pDataPerPDGain[ii].numVpd;671if (numVpd > 0) {672Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];673return(Pmax);674}675}676return(Pmax);677}678679static HAL_BOOL680ar5413GetChannelMaxMinPower(struct ath_hal *ah,681const struct ieee80211_channel *chan,682int16_t *maxPow, int16_t *minPow)683{684uint16_t freq = chan->ic_freq; /* NB: never mapped */685const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;686const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;687const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL;688uint16_t numChannels;689int totalD,totalF, totalMin,last, i;690691*maxPow = 0;692693if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))694pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];695else if (IEEE80211_IS_CHAN_B(chan))696pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];697else {698HALASSERT(IEEE80211_IS_CHAN_5GHZ(chan));699pRawDataset = &ee->ee_rawDataset2413[headerInfo11A];700}701702numChannels = pRawDataset->numChannels;703data = pRawDataset->pDataPerChannel;704705/* Make sure the channel is in the range of the TP values706* (freq piers)707*/708if (numChannels < 1)709return(AH_FALSE);710711if ((freq < data[0].channelValue) ||712(freq > data[numChannels-1].channelValue)) {713if (freq < data[0].channelValue) {714*maxPow = ar5413GetMaxPower(ah, &data[0]);715*minPow = ar5413GetMinPower(ah, &data[0]);716return(AH_TRUE);717} else {718*maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]);719*minPow = ar5413GetMinPower(ah, &data[numChannels - 1]);720return(AH_TRUE);721}722}723724/* Linearly interpolate the power value now */725for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);726last = i++);727totalD = data[i].channelValue - data[last].channelValue;728if (totalD > 0) {729totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]);730*maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +731ar5413GetMaxPower(ah, &data[last])*totalD)/totalD);732totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]);733*minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +734ar5413GetMinPower(ah, &data[last])*totalD)/totalD);735return(AH_TRUE);736} else {737if (freq == data[i].channelValue) {738*maxPow = ar5413GetMaxPower(ah, &data[i]);739*minPow = ar5413GetMinPower(ah, &data[i]);740return(AH_TRUE);741} else742return(AH_FALSE);743}744}745746/*747* Free memory for analog bank scratch buffers748*/749static void750ar5413RfDetach(struct ath_hal *ah)751{752struct ath_hal_5212 *ahp = AH5212(ah);753754HALASSERT(ahp->ah_rfHal != AH_NULL);755ath_hal_free(ahp->ah_rfHal);756ahp->ah_rfHal = AH_NULL;757}758759/*760* Allocate memory for analog bank scratch buffers761* Scratch Buffer will be reinitialized every reset so no need to zero now762*/763static HAL_BOOL764ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status)765{766struct ath_hal_5212 *ahp = AH5212(ah);767struct ar5413State *priv;768769HALASSERT(ah->ah_magic == AR5212_MAGIC);770771HALASSERT(ahp->ah_rfHal == AH_NULL);772priv = ath_hal_malloc(sizeof(struct ar5413State));773if (priv == AH_NULL) {774HALDEBUG(ah, HAL_DEBUG_ANY,775"%s: cannot allocate private state\n", __func__);776*status = HAL_ENOMEM; /* XXX */777return AH_FALSE;778}779priv->base.rfDetach = ar5413RfDetach;780priv->base.writeRegs = ar5413WriteRegs;781priv->base.getRfBank = ar5413GetRfBank;782priv->base.setChannel = ar5413SetChannel;783priv->base.setRfRegs = ar5413SetRfRegs;784priv->base.setPowerTable = ar5413SetPowerTable;785priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower;786priv->base.getNfAdjust = ar5212GetNfAdjust;787788ahp->ah_pcdacTable = priv->pcdacTable;789ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);790ahp->ah_rfHal = &priv->base;791792return AH_TRUE;793}794795static HAL_BOOL796ar5413Probe(struct ath_hal *ah)797{798return IS_5413(ah);799}800AH_RF(RF5413, ar5413Probe, ar5413RfAttach);801802803