Path: blob/main/sys/dev/ath/ath_hal/ar5312/ar5312_attach.c
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/*-1* SPDX-License-Identifier: ISC2*3* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting4* Copyright (c) 2002-2008 Atheros Communications, Inc.5*6* Permission to use, copy, modify, and/or distribute this software for any7* purpose with or without fee is hereby granted, provided that the above8* copyright notice and this permission notice appear in all copies.9*10* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES11* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR13* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES14* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN15* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF16* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.17*/18#include "opt_ah.h"1920#include "ah.h"21#include "ah_internal.h"22#include "ah_devid.h"2324#include "ar5312/ar5312.h"25#include "ar5312/ar5312reg.h"26#include "ar5312/ar5312phy.h"2728/* Add static register initialization vectors */29#define AH_5212_COMMON30#include "ar5212/ar5212.ini"3132static HAL_BOOL ar5312GetMacAddr(struct ath_hal *ah);3334static void35ar5312AniSetup(struct ath_hal *ah)36{37static const struct ar5212AniParams aniparams = {38.maxNoiseImmunityLevel = 4, /* levels 0..4 */39.totalSizeDesired = { -41, -41, -48, -48, -48 },40.coarseHigh = { -18, -18, -16, -14, -12 },41.coarseLow = { -56, -56, -60, -60, -60 },42.firpwr = { -72, -72, -75, -78, -80 },43.maxSpurImmunityLevel = 2,44.cycPwrThr1 = { 2, 4, 6 },45.maxFirstepLevel = 2, /* levels 0..2 */46.firstep = { 0, 4, 8 },47.ofdmTrigHigh = 500,48.ofdmTrigLow = 200,49.cckTrigHigh = 200,50.cckTrigLow = 100,51.rssiThrHigh = 40,52.rssiThrLow = 7,53.period = 100,54};55ar5212AniAttach(ah, &aniparams, &aniparams, AH_TRUE);56}5758/*59* Attach for an AR5312 part.60*/61static struct ath_hal *62ar5312Attach(uint16_t devid, HAL_SOFTC sc,63HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,64HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)65{66struct ath_hal_5212 *ahp = AH_NULL;67struct ath_hal *ah;68struct ath_hal_rf *rf;69uint32_t val;70uint16_t eeval;71HAL_STATUS ecode;7273HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",74__func__, sc, st, (void*) sh);7576/* NB: memory is returned zero'd */77ahp = ath_hal_malloc(sizeof (struct ath_hal_5212));78if (ahp == AH_NULL) {79HALDEBUG(AH_NULL, HAL_DEBUG_ANY,80"%s: cannot allocate memory for state block\n", __func__);81*status = HAL_ENOMEM;82return AH_NULL;83}84ar5212InitState(ahp, devid, sc, st, sh, status);85ah = &ahp->ah_priv.h;8687/* override 5212 methods for our needs */88ah->ah_reset = ar5312Reset;89ah->ah_phyDisable = ar5312PhyDisable;90ah->ah_setLedState = ar5312SetLedState;91ah->ah_detectCardPresent = ar5312DetectCardPresent;92ah->ah_setPowerMode = ar5312SetPowerMode;93ah->ah_getPowerMode = ar5312GetPowerMode;94ah->ah_isInterruptPending = ar5312IsInterruptPending;9596ahp->ah_priv.ah_eepromRead = ar5312EepromRead;97#ifdef AH_SUPPORT_WRITE_EEPROM98ahp->ah_priv.ah_eepromWrite = ar5312EepromWrite;99#endif100#if ( AH_SUPPORT_2316 || AH_SUPPORT_2317)101if (IS_5315(ah)) {102ahp->ah_priv.ah_gpioCfgOutput = ar5315GpioCfgOutput;103ahp->ah_priv.ah_gpioCfgInput = ar5315GpioCfgInput;104ahp->ah_priv.ah_gpioGet = ar5315GpioGet;105ahp->ah_priv.ah_gpioSet = ar5315GpioSet;106ahp->ah_priv.ah_gpioSetIntr = ar5315GpioSetIntr;107} else108#endif109{110ahp->ah_priv.ah_gpioCfgOutput = ar5312GpioCfgOutput;111ahp->ah_priv.ah_gpioCfgInput = ar5312GpioCfgInput;112ahp->ah_priv.ah_gpioGet = ar5312GpioGet;113ahp->ah_priv.ah_gpioSet = ar5312GpioSet;114ahp->ah_priv.ah_gpioSetIntr = ar5312GpioSetIntr;115}116117ah->ah_gpioCfgInput = ahp->ah_priv.ah_gpioCfgInput;118ah->ah_gpioCfgOutput = ahp->ah_priv.ah_gpioCfgOutput;119ah->ah_gpioGet = ahp->ah_priv.ah_gpioGet;120ah->ah_gpioSet = ahp->ah_priv.ah_gpioSet;121ah->ah_gpioSetIntr = ahp->ah_priv.ah_gpioSetIntr;122123/* setup common ini data; rf backends handle remainder */124HAL_INI_INIT(&ahp->ah_ini_modes, ar5212Modes, 6);125HAL_INI_INIT(&ahp->ah_ini_common, ar5212Common, 2);126127if (!ar5312ChipReset(ah, AH_NULL)) { /* reset chip */128HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);129ecode = HAL_EIO;130goto bad;131}132133#if ( AH_SUPPORT_2316 || AH_SUPPORT_2317)134if ((devid == AR5212_AR2315_REV6) ||135(devid == AR5212_AR2315_REV7) ||136(devid == AR5212_AR2317_REV1) ||137(devid == AR5212_AR2317_REV2) ) {138val = ((OS_REG_READ(ah, (AR5315_RSTIMER_BASE -((uint32_t) sh)) + AR5315_WREV)) >> AR5315_WREV_S)139& AR5315_WREV_ID;140AH_PRIVATE(ah)->ah_macVersion = val >> AR5315_WREV_ID_S;141AH_PRIVATE(ah)->ah_macRev = val & AR5315_WREV_REVISION;142HALDEBUG(ah, HAL_DEBUG_ATTACH,143"%s: Mac Chip Rev 0x%02x.%x\n" , __func__,144AH_PRIVATE(ah)->ah_macVersion, AH_PRIVATE(ah)->ah_macRev);145} else146#endif147{148val = OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + 0x0020);149val = OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + 0x0080);150/* Read Revisions from Chips */151val = ((OS_REG_READ(ah, (AR5312_RSTIMER_BASE - ((uint32_t) sh)) + AR5312_WREV)) >> AR5312_WREV_S) & AR5312_WREV_ID;152AH_PRIVATE(ah)->ah_macVersion = val >> AR5312_WREV_ID_S;153AH_PRIVATE(ah)->ah_macRev = val & AR5312_WREV_REVISION;154}155/* XXX - THIS IS WRONG. NEEDS TO BE FIXED */156if (((AH_PRIVATE(ah)->ah_macVersion != AR_SREV_VERSION_VENICE &&157AH_PRIVATE(ah)->ah_macVersion != AR_SREV_VERSION_VENICE) ||158AH_PRIVATE(ah)->ah_macRev < AR_SREV_D2PLUS) &&159AH_PRIVATE(ah)->ah_macVersion != AR_SREV_VERSION_COBRA) {160#ifdef AH_DEBUG161ath_hal_printf(ah, "%s: Mac Chip Rev 0x%02x.%x is not supported by "162"this driver\n", __func__,163AH_PRIVATE(ah)->ah_macVersion,164AH_PRIVATE(ah)->ah_macRev);165#endif166ecode = HAL_ENOTSUPP;167goto bad;168}169170AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);171172if (!ar5212ChipTest(ah)) {173HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",174__func__);175ecode = HAL_ESELFTEST;176goto bad;177}178179/*180* Set correct Baseband to analog shift181* setting to access analog chips.182*/183OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);184185/* Read Radio Chip Rev Extract */186AH_PRIVATE(ah)->ah_analog5GhzRev = ar5212GetRadioRev(ah);187188rf = ath_hal_rfprobe(ah, &ecode);189if (rf == AH_NULL)190goto bad;191if (IS_RAD5112(ah) && !IS_RADX112_REV2(ah)) {192#ifdef AH_DEBUG193ath_hal_printf(ah, "%s: 5112 Rev 1 is not supported by this "194"driver (analog5GhzRev 0x%x)\n", __func__,195AH_PRIVATE(ah)->ah_analog5GhzRev);196#endif197ecode = HAL_ENOTSUPP;198goto bad;199}200201ecode = ath_hal_legacyEepromAttach(ah);202if (ecode != HAL_OK) {203goto bad;204}205206/*207* If Bmode and AR5212, verify 2.4 analog exists208*/209if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE) &&210(AH_PRIVATE(ah)->ah_analog5GhzRev & 0xF0) == AR_RAD5111_SREV_MAJOR) {211/*212* Set correct Baseband to analog shift213* setting to access analog chips.214*/215OS_REG_WRITE(ah, AR_PHY(0), 0x00004007);216OS_DELAY(2000);217AH_PRIVATE(ah)->ah_analog2GhzRev = ar5212GetRadioRev(ah);218219/* Set baseband for 5GHz chip */220OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);221OS_DELAY(2000);222if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != AR_RAD2111_SREV_MAJOR) {223#ifdef AH_DEBUG224ath_hal_printf(ah, "%s: 2G Radio Chip Rev 0x%02X is not "225"supported by this driver\n", __func__,226AH_PRIVATE(ah)->ah_analog2GhzRev);227#endif228ecode = HAL_ENOTSUPP;229goto bad;230}231}232233ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);234if (ecode != HAL_OK) {235HALDEBUG(ah, HAL_DEBUG_ANY,236"%s: cannot read regulatory domain from EEPROM\n",237__func__);238goto bad;239}240AH_PRIVATE(ah)->ah_currentRD = eeval;241/* XXX record serial number */242243/* XXX other capabilities */244/*245* Got everything we need now to setup the capabilities.246*/247if (!ar5212FillCapabilityInfo(ah)) {248HALDEBUG(ah, HAL_DEBUG_ANY,249"%s: failed ar5212FillCapabilityInfo\n", __func__);250ecode = HAL_EEREAD;251goto bad;252}253254if (!rf->attach(ah, &ecode)) {255HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",256__func__, ecode);257goto bad;258}259/* arrange a direct call instead of thunking */260AH_PRIVATE(ah)->ah_getNfAdjust = ahp->ah_rfHal->getNfAdjust;261262/* Initialize gain ladder thermal calibration structure */263ar5212InitializeGainValues(ah);264265/* BSP specific call for MAC address of this WMAC device */266if (!ar5312GetMacAddr(ah)) {267ecode = HAL_EEBADMAC;268goto bad;269}270271ar5312AniSetup(ah);272ar5212InitNfCalHistBuffer(ah);273274/* XXX EAR stuff goes here */275return ah;276277bad:278if (ahp)279ar5212Detach((struct ath_hal *) ahp);280if (status)281*status = ecode;282return AH_NULL;283}284285static HAL_BOOL286ar5312GetMacAddr(struct ath_hal *ah)287{288const struct ar531x_boarddata *board = AR5312_BOARDCONFIG(ah);289int wlanNum = AR5312_UNIT(ah);290const uint8_t *macAddr;291292switch (wlanNum) {293case 0:294macAddr = board->wlan0Mac;295break;296case 1:297macAddr = board->wlan1Mac;298break;299default:300#ifdef AH_DEBUG301ath_hal_printf(ah, "Invalid WLAN wmac index (%d)\n",302wlanNum);303#endif304return AH_FALSE;305}306OS_MEMCPY(AH5212(ah)->ah_macaddr, macAddr, 6);307return AH_TRUE;308}309310static const char*311ar5312Probe(uint16_t vendorid, uint16_t devid)312{313if (vendorid == ATHEROS_VENDOR_ID) {314switch (devid) {315case AR5212_AR5312_REV2:316case AR5212_AR5312_REV7:317return "Atheros 5312 WiSoC";318case AR5212_AR2313_REV8:319return "Atheros 2313 WiSoC";320case AR5212_AR2315_REV6:321case AR5212_AR2315_REV7:322return "Atheros 2315 WiSoC";323case AR5212_AR2317_REV1:324case AR5212_AR2317_REV2:325return "Atheros 2317 WiSoC";326case AR5212_AR2413:327return "Atheros 2413";328case AR5212_AR2417:329return "Atheros 2417";330}331}332return AH_NULL;333}334AH_CHIP(AR5312, ar5312Probe, ar5312Attach);335336337