Path: blob/main/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
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/*-1* SPDX-License-Identifier: ISC2*3* Copyright (c) 2008 Sam Leffler, Errno Consulting4* Copyright (c) 2008 Atheros Communications, Inc.5*6* Permission to use, copy, modify, and/or distribute this software for any7* purpose with or without fee is hereby granted, provided that the above8* copyright notice and this permission notice appear in all copies.9*10* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES11* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF12* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR13* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES14* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN15* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF16* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.17*/18#include "opt_ah.h"1920#include "ah.h"21#include "ah_internal.h"22#include "ah_devid.h"2324#include "ar5416/ar5416.h"25#include "ar5416/ar5416reg.h"26#include "ar5416/ar5416phy.h"2728#include "ar9001/ar9160.ini"2930static const HAL_PERCAL_DATA ar9160_iq_cal = { /* multi sample */31.calName = "IQ", .calType = IQ_MISMATCH_CAL,32.calNumSamples = MAX_CAL_SAMPLES,33.calCountMax = PER_MIN_LOG_COUNT,34.calCollect = ar5416IQCalCollect,35.calPostProc = ar5416IQCalibration36};37static const HAL_PERCAL_DATA ar9160_adc_gain_cal = { /* multi sample */38.calName = "ADC Gain", .calType = ADC_GAIN_CAL,39.calNumSamples = MAX_CAL_SAMPLES,40.calCountMax = PER_MIN_LOG_COUNT,41.calCollect = ar5416AdcGainCalCollect,42.calPostProc = ar5416AdcGainCalibration43};44static const HAL_PERCAL_DATA ar9160_adc_dc_cal = { /* multi sample */45.calName = "ADC DC", .calType = ADC_DC_CAL,46.calNumSamples = MAX_CAL_SAMPLES,47.calCountMax = PER_MIN_LOG_COUNT,48.calCollect = ar5416AdcDcCalCollect,49.calPostProc = ar5416AdcDcCalibration50};51static const HAL_PERCAL_DATA ar9160_adc_init_dc_cal = {52.calName = "ADC Init DC", .calType = ADC_DC_INIT_CAL,53.calNumSamples = MIN_CAL_SAMPLES,54.calCountMax = INIT_LOG_COUNT,55.calCollect = ar5416AdcDcCalCollect,56.calPostProc = ar5416AdcDcCalibration57};5859static HAL_BOOL ar9160FillCapabilityInfo(struct ath_hal *ah);6061static void62ar9160AniSetup(struct ath_hal *ah)63{64static const struct ar5212AniParams aniparams = {65.maxNoiseImmunityLevel = 4, /* levels 0..4 */66.totalSizeDesired = { -55, -55, -55, -55, -62 },67.coarseHigh = { -14, -14, -14, -14, -12 },68.coarseLow = { -64, -64, -64, -64, -70 },69.firpwr = { -78, -78, -78, -78, -80 },70.maxSpurImmunityLevel = 7,71.cycPwrThr1 = { 2, 4, 6, 8, 10, 12, 14, 16 },72.maxFirstepLevel = 2, /* levels 0..2 */73.firstep = { 0, 4, 8 },74.ofdmTrigHigh = 500,75.ofdmTrigLow = 200,76.cckTrigHigh = 200,77.cckTrigLow = 100,78.rssiThrHigh = 40,79.rssiThrLow = 7,80.period = 100,81};8283/* NB: disable ANI noise immunity for reliable RIFS rx */84AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL);85ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE);86}8788static void89ar9160InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)90{91uint32_t pll = SM(0x5, AR_RTC_SOWL_PLL_REFDIV);92if (chan != AH_NULL) {93if (IEEE80211_IS_CHAN_HALF(chan))94pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL);95else if (IEEE80211_IS_CHAN_QUARTER(chan))96pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL);9798if (IEEE80211_IS_CHAN_5GHZ(chan))99pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV);100else101pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);102} else103pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV);104105OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);106OS_DELAY(RTC_PLL_SETTLE_DELAY);107OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK);108}109110/*111* Attach for an AR9160 part.112*/113static struct ath_hal *114ar9160Attach(uint16_t devid, HAL_SOFTC sc,115HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,116HAL_OPS_CONFIG *ah_config,117HAL_STATUS *status)118{119struct ath_hal_5416 *ahp5416;120struct ath_hal_5212 *ahp;121struct ath_hal *ah;122uint32_t val;123HAL_STATUS ecode;124HAL_BOOL rfStatus;125126HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",127__func__, sc, (void*) st, (void*) sh);128129/* NB: memory is returned zero'd */130ahp5416 = ath_hal_malloc(sizeof (struct ath_hal_5416));131if (ahp5416 == AH_NULL) {132HALDEBUG(AH_NULL, HAL_DEBUG_ANY,133"%s: cannot allocate memory for state block\n", __func__);134*status = HAL_ENOMEM;135return AH_NULL;136}137ar5416InitState(ahp5416, devid, sc, st, sh, status);138ahp = &ahp5416->ah_5212;139ah = &ahp->ah_priv.h;140141/* XXX override with 9160 specific state */142/* override 5416 methods for our needs */143AH5416(ah)->ah_initPLL = ar9160InitPLL;144145AH5416(ah)->ah_cal.iqCalData.calData = &ar9160_iq_cal;146AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9160_adc_gain_cal;147AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9160_adc_dc_cal;148AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9160_adc_init_dc_cal;149AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL;150151if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {152/* reset chip */153HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n",154__func__);155ecode = HAL_EIO;156goto bad;157}158159if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {160HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",161__func__);162ecode = HAL_EIO;163goto bad;164}165/* Read Revisions from Chips before taking out of reset */166val = OS_REG_READ(ah, AR_SREV);167HALDEBUG(ah, HAL_DEBUG_ATTACH,168"%s: ID 0x%x VERSION 0x%x TYPE 0x%x REVISION 0x%x\n",169__func__, MS(val, AR_XSREV_ID), MS(val, AR_XSREV_VERSION),170MS(val, AR_XSREV_TYPE), MS(val, AR_XSREV_REVISION));171/* NB: include chip type to differentiate from pre-Sowl versions */172AH_PRIVATE(ah)->ah_macVersion =173(val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;174AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);175AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;176177/* setup common ini data; rf backends handle remainder */178HAL_INI_INIT(&ahp->ah_ini_modes, ar9160Modes, 6);179HAL_INI_INIT(&ahp->ah_ini_common, ar9160Common, 2);180181HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar9160BB_RfGain, 3);182HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar9160Bank0, 2);183HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar9160Bank1, 2);184HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar9160Bank2, 2);185HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar9160Bank3, 3);186HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar9160Bank6TPC, 3);187HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar9160Bank7, 2);188if (AR_SREV_SOWL_11(ah))189HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac_1_1, 2);190else191HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac, 2);192193ecode = ath_hal_v14EepromAttach(ah);194if (ecode != HAL_OK)195goto bad;196197HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar9160PciePhy, 2);198ar5416AttachPCIE(ah);199200if (!ar5416ChipReset(ah, AH_NULL, HAL_RESET_NORMAL)) { /* reset chip */201HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);202ecode = HAL_EIO;203goto bad;204}205206AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);207208if (!ar5212ChipTest(ah)) {209HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",210__func__);211ecode = HAL_ESELFTEST;212goto bad;213}214215/*216* Set correct Baseband to analog shift217* setting to access analog chips.218*/219OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);220221/* Read Radio Chip Rev Extract */222AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah);223switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {224case AR_RAD2133_SREV_MAJOR: /* Sowl: 2G/3x3 */225case AR_RAD5133_SREV_MAJOR: /* Sowl: 2+5G/3x3 */226break;227default:228if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {229AH_PRIVATE(ah)->ah_analog5GhzRev =230AR_RAD5133_SREV_MAJOR;231break;232}233#ifdef AH_DEBUG234HALDEBUG(ah, HAL_DEBUG_ANY,235"%s: 5G Radio Chip Rev 0x%02X is not supported by "236"this driver\n", __func__,237AH_PRIVATE(ah)->ah_analog5GhzRev);238ecode = HAL_ENOTSUPP;239goto bad;240#endif241}242rfStatus = ar2133RfAttach(ah, &ecode);243if (!rfStatus) {244HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",245__func__, ecode);246goto bad;247}248249/*250* Got everything we need now to setup the capabilities.251*/252if (!ar9160FillCapabilityInfo(ah)) {253ecode = HAL_EEREAD;254goto bad;255}256257ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);258if (ecode != HAL_OK) {259HALDEBUG(ah, HAL_DEBUG_ANY,260"%s: error getting mac address from EEPROM\n", __func__);261goto bad;262}263/* XXX How about the serial number ? */264/* Read Reg Domain */265AH_PRIVATE(ah)->ah_currentRD =266ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL);267AH_PRIVATE(ah)->ah_currentRDext =268ath_hal_eepromGet(ah, AR_EEP_REGDMN_1, AH_NULL);269270/*271* ah_miscMode is populated by ar5416FillCapabilityInfo()272* starting from griffin. Set here to make sure that273* AR_MISC_MODE_MIC_NEW_LOC_ENABLE is set before a GTK is274* placed into hardware.275*/276if (ahp->ah_miscMode != 0)277OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode);278279ar9160AniSetup(ah); /* Anti Noise Immunity */280281/* This just uses the AR5416 NF values */282AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ;283AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ;284AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ;285AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ;286AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ;287AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ;288289ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist);290291HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);292293return ah;294bad:295if (ahp)296ar5416Detach((struct ath_hal *) ahp);297if (status)298*status = ecode;299return AH_NULL;300}301302/*303* Fill all software cached or static hardware state information.304* Return failure if capabilities are to come from EEPROM and305* cannot be read.306*/307static HAL_BOOL308ar9160FillCapabilityInfo(struct ath_hal *ah)309{310HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;311312if (!ar5416FillCapabilityInfo(ah))313return AH_FALSE;314pCap->halCSTSupport = AH_TRUE;315pCap->halRifsRxSupport = AH_TRUE;316pCap->halRifsTxSupport = AH_TRUE;317pCap->halRtsAggrLimit = 64*1024; /* 802.11n max */318pCap->halExtChanDfsSupport = AH_TRUE;319pCap->halUseCombinedRadarRssi = AH_TRUE;320pCap->halAutoSleepSupport = AH_FALSE; /* XXX? */321pCap->halMbssidAggrSupport = AH_TRUE;322pCap->hal4AddrAggrSupport = AH_TRUE;323/* BB Read WAR */324pCap->halHasBBReadWar = AH_TRUE;325326/* AR9160 is a 2x2 stream device */327pCap->halTxStreams = 2;328pCap->halRxStreams = 2;329330return AH_TRUE;331}332333static const char*334ar9160Probe(uint16_t vendorid, uint16_t devid)335{336if (vendorid == ATHEROS_VENDOR_ID && devid == AR9160_DEVID_PCI)337return "Atheros 9160";338return AH_NULL;339}340AH_CHIP(AR9160, ar9160Probe, ar9160Attach);341342343