/*-1* Copyright (c) 2015-2016 Landon Fuller <[email protected]>2* Copyright (c) 2017 The FreeBSD Foundation3* All rights reserved.4*5* Portions of this software were developed by Landon Fuller6* under sponsorship from the FreeBSD Foundation.7*8* Redistribution and use in source and binary forms, with or without9* modification, are permitted provided that the following conditions10* are met:11* 1. Redistributions of source code must retain the above copyright12* notice, this list of conditions and the following disclaimer,13* without modification.14* 2. Redistributions in binary form must reproduce at minimum a disclaimer15* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any16* redistribution must be conditioned upon including a substantially17* similar Disclaimer requirement for further binary redistribution.18*19* NO WARRANTY20* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS21* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT22* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY23* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL24* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,25* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF26* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS27* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER28* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)29* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF30* THE POSSIBILITY OF SUCH DAMAGES.31*32*/3334#ifndef _SIBA_SIBAVAR_H_35#define _SIBA_SIBAVAR_H_3637#include <sys/param.h>38#include <sys/bitstring.h>39#include <sys/bus.h>40#include <sys/limits.h>41#include <sys/lock.h>42#include <sys/mutex.h>4344#include <machine/bus.h>45#include <sys/rman.h>4647#include "siba.h"4849/*50* Internal definitions shared by siba(4) driver implementations.51*/5253struct siba_addrspace;54struct siba_admatch;55struct siba_cfg_block;56struct siba_devinfo;57struct siba_core_id;58struct siba_softc;5960int siba_probe(device_t dev);61int siba_attach(device_t dev);62int siba_detach(device_t dev);63int siba_resume(device_t dev);64int siba_suspend(device_t dev);65u_int siba_get_intr_count(device_t dev, device_t child);66int siba_get_intr_ivec(device_t dev, device_t child,67u_int intr, u_int *ivec);6869uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor);7071int siba_add_children(device_t bus);7273struct siba_devinfo *siba_alloc_dinfo(device_t dev);74int siba_init_dinfo(device_t dev, device_t child,75struct siba_devinfo *dinfo,76const struct siba_core_id *core_id);77void siba_free_dinfo(device_t dev, device_t child,78struct siba_devinfo *dinfo);7980u_int siba_port_count(struct siba_core_id *core_id,81bhnd_port_type port_type);82bool siba_is_port_valid(struct siba_core_id *core_id,83bhnd_port_type port_type, u_int port);8485u_int siba_port_region_count(86struct siba_core_id *core_id,87bhnd_port_type port_type, u_int port);8889int siba_cfg_index(struct siba_core_id *core_id,90bhnd_port_type type, u_int port, u_int region,91u_int *cfgidx);9293int siba_addrspace_index(struct siba_core_id *core_id,94bhnd_port_type type, u_int port, u_int region,95u_int *addridx);9697u_int siba_addrspace_device_port(u_int addrspace);98u_int siba_addrspace_device_region(u_int addrspace);99100u_int siba_cfg_agent_port(u_int cfg);101u_int siba_cfg_agent_region(u_int cfg);102103struct siba_addrspace *siba_find_addrspace(struct siba_devinfo *dinfo,104bhnd_port_type type, u_int port, u_int region);105106struct siba_cfg_block *siba_find_cfg_block(struct siba_devinfo *dinfo,107bhnd_port_type type, u_int port, u_int region);108109u_int siba_admatch_offset(uint8_t addrspace);110int siba_parse_admatch(uint32_t am,111struct siba_admatch *admatch);112113void siba_write_target_state(device_t dev,114struct siba_devinfo *dinfo, bus_size_t reg,115uint32_t value, uint32_t mask);116int siba_wait_target_state(device_t dev,117struct siba_devinfo *dinfo, bus_size_t reg,118uint32_t value, uint32_t mask, u_int usec);119120121/* Sonics configuration register blocks */122#define SIBA_CFG_NUM_2_2 1 /**< sonics <= 2.2 maps SIBA_CFG0. */123#define SIBA_CFG_NUM_2_3 2 /**< sonics <= 2.3 maps SIBA_CFG0 and SIBA_CFG1 */124#define SIBA_MAX_CFG SIBA_CFG_NUM_2_3 /**< maximum number of supported config125register blocks */126127#define SIBA_CFG_RID_BASE 100 /**< base resource ID for SIBA_CFG* register allocations */128#define SIBA_CFG_RID(_dinfo, _cfg) \129(SIBA_CFG_RID_BASE + (_cfg) + \130(_dinfo->core_id.core_info.core_idx * SIBA_MAX_CFG))131132/* Sonics/OCP address space mappings */133#define SIBA_CORE_ADDRSPACE 0 /**< Address space mapping the primary134device registers */135136#define SIBA_MAX_ADDRSPACE 4 /**< Maximum number of Sonics/OCP137* address space mappings for a138* single core. */139140/* bhnd(4) (port,region) representation of siba address space mappings */141#define SIBA_MAX_PORT 2 /**< maximum number of advertised142* bhnd(4) ports */143144/** siba(4) address match descriptor */145struct siba_admatch {146uint32_t am_base; /**< base address. */147uint32_t am_size; /**< size. */148bool am_negative; /**< if true, negative matching is performed. */149bool am_enabled; /**< if true, matching on this entry is enabled. */150};151152/** siba(4) address space descriptor */153struct siba_addrspace {154uint32_t sa_base; /**< base address */155uint32_t sa_size; /**< size */156int sa_rid; /**< bus resource id */157uint32_t sa_bus_reserved;/**< number of bytes at high end of158* address space reserved for the bus */159};160161/** siba(4) config block descriptor */162struct siba_cfg_block {163uint32_t cb_base; /**< base address */164uint32_t cb_size; /**< size */165int cb_rid; /**< bus resource id */166};167168/** siba(4) backplane interrupt flag descriptor */169struct siba_intr {170bool mapped; /**< if an irq has been mapped */171int rid; /**< bus resource id, or -1 if unassigned */172rman_res_t irq; /**< the mapped bus irq, if any */173};174175/**176* siba(4) per-core identification info.177*/178struct siba_core_id {179struct bhnd_core_info core_info; /**< standard bhnd(4) core info */180uint16_t sonics_vendor; /**< OCP vendor identifier used to generate181* the JEDEC-106 bhnd(4) vendor identifier. */182uint8_t sonics_rev; /**< sonics backplane revision code */183bool intr_en; /**< if backplane interrupt distribution is enabled for this core */184u_int intr_flag; /**< backplane interrupt flag # */185struct siba_admatch admatch[SIBA_MAX_ADDRSPACE]; /**< active address match descriptors defined by this core. */186uint8_t num_admatch; /**< number of address match descriptors. */187uint8_t num_cfg_blocks; /**< number of Sonics configuration register188blocks mapped to the core's enumeration189space */190};191192/**193* siba(4) per-core PMU allocation state.194*/195typedef enum {196SIBA_PMU_NONE, /**< If the core has not yet allocated PMU state */197SIBA_PMU_BHND, /**< If standard bhnd(4) PMU support should be used */198SIBA_PMU_PWRCTL, /**< If legacy PWRCTL PMU support should be used */199SIBA_PMU_FIXED, /**< If legacy fixed (no-op) PMU support should be used */200} siba_pmu_state;201202/**203* siba(4) per-device info204*/205struct siba_devinfo {206struct resource_list resources; /**< per-core memory regions. */207struct siba_core_id core_id; /**< core identification info */208struct siba_addrspace addrspace[SIBA_MAX_ADDRSPACE]; /**< memory map descriptors */209struct siba_cfg_block cfg[SIBA_MAX_CFG]; /**< config block descriptors */210struct siba_intr intr; /**< interrupt flag mapping, if any */211212struct bhnd_resource *cfg_res[SIBA_MAX_CFG]; /**< bus-mapped config block registers */213int cfg_rid[SIBA_MAX_CFG]; /**< bus-mapped config block resource IDs */214siba_pmu_state pmu_state; /**< per-core PMU state */215union {216void *bhnd_info; /**< if SIBA_PMU_BHND, bhnd(4)-managed per-core PMU info. */217device_t pwrctl; /**< if SIBA_PMU_PWRCTL, legacy PWRCTL provider. */218} pmu;219};220221/** siba(4) per-instance state */222struct siba_softc {223struct bhnd_softc bhnd_sc; /**< bhnd state */224device_t dev; /**< siba device */225struct mtx mtx; /**< state mutex */226};227228#define SIBA_LOCK_INIT(sc) \229mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), NULL, MTX_DEF)230#define SIBA_LOCK(sc) mtx_lock(&(sc)->mtx)231#define SIBA_UNLOCK(sc) mtx_unlock(&(sc)->mtx)232#define SIBA_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what)233#define SIBA_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)234235#endif /* _SIBA_SIBAVAR_H_ */236237238