CoCalc -- rk3399_cru

GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/dev/clk/rockchip/rk3399_cru_dt.h
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#ifndef _RK3399_DT_H_
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#define	_RK3399_DT_H_
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#define	PLL_APLLL				1
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#define	PLL_APLLB				2
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#define	PLL_DPLL				3
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#define	PLL_CPLL				4
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#define	PLL_GPLL				5
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#define	PLL_NPLL				6
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#define	PLL_VPLL				7
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#define	ARMCLKL					8
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#define	ARMCLKB					9
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#define	SCLK_I2C1				65
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#define	SCLK_I2C2				66
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#define	SCLK_I2C3				67
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#define	SCLK_I2C5				68
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#define	SCLK_I2C6				69
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#define	SCLK_I2C7				70
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#define	SCLK_SPI0				71
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#define	SCLK_SPI1				72
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#define	SCLK_SPI2				73
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#define	SCLK_SPI4				74
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#define	SCLK_SPI5				75
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#define	SCLK_SDMMC				76
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#define	SCLK_SDIO				77
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#define	SCLK_EMMC				78
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#define	SCLK_TSADC				79
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#define	SCLK_SARADC				80
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#define	SCLK_UART0				81
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#define	SCLK_UART1				82
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#define	SCLK_UART2				83
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#define	SCLK_UART3				84
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#define	SCLK_SPDIF_8CH				85
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#define	SCLK_I2S0_8CH				86
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#define	SCLK_I2S1_8CH				87
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#define	SCLK_I2S2_8CH				88
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#define	SCLK_I2S_8CH_OUT			89
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#define	SCLK_TIMER00				90
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#define	SCLK_TIMER01				91
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#define	SCLK_TIMER02				92
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#define	SCLK_TIMER03				93
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#define	SCLK_TIMER04				94
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#define	SCLK_TIMER05				95
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#define	SCLK_TIMER06				96
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#define	SCLK_TIMER07				97
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#define	SCLK_TIMER08				98
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#define	SCLK_TIMER09				99
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#define	SCLK_TIMER10				100
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#define	SCLK_TIMER11				101
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#define	SCLK_MACREF				102
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#define	SCLK_MAC_RX				103
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#define	SCLK_MAC_TX				104
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#define	SCLK_MAC				105
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#define	SCLK_MACREF_OUT				106
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#define	SCLK_VOP0_PWM				107
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#define	SCLK_VOP1_PWM				108
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#define	SCLK_RGA_CORE				109
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#define	SCLK_ISP0				110
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#define	SCLK_ISP1				111
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#define	SCLK_HDMI_CEC				112
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#define	SCLK_HDMI_SFR				113
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#define	SCLK_DP_CORE				114
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#define	SCLK_PVTM_CORE_L			115
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#define	SCLK_PVTM_CORE_B			116
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#define	SCLK_PVTM_GPU				117
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#define	SCLK_PVTM_DDR				118
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#define	SCLK_MIPIDPHY_REF			119
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#define	SCLK_MIPIDPHY_CFG			120
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#define	SCLK_HSICPHY				121
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#define	SCLK_USBPHY480M				122
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#define	SCLK_USB2PHY0_REF			123
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#define	SCLK_USB2PHY1_REF			124
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#define	SCLK_UPHY0_TCPDPHY_REF			125
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#define	SCLK_UPHY0_TCPDCORE			126
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#define	SCLK_UPHY1_TCPDPHY_REF			127
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#define	SCLK_UPHY1_TCPDCORE			128
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#define	SCLK_USB3OTG0_REF			129
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#define	SCLK_USB3OTG1_REF			130
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#define	SCLK_USB3OTG0_SUSPEND			131
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#define	SCLK_USB3OTG1_SUSPEND			132
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#define	SCLK_CRYPTO0				133
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#define	SCLK_CRYPTO1				134
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#define	SCLK_CCI_TRACE				135
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#define	SCLK_CS					136
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#define	SCLK_CIF_OUT				137
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#define	SCLK_PCIEPHY_REF			138
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#define	SCLK_PCIE_CORE				139
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#define	SCLK_M0_PERILP				140
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#define	SCLK_M0_PERILP_DEC			141
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#define	SCLK_CM0S				142
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#define	SCLK_DBG_NOC				143
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#define	SCLK_DBG_PD_CORE_B			144
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#define	SCLK_DBG_PD_CORE_L			145
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#define	SCLK_DFIMON0_TIMER			146
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#define	SCLK_DFIMON1_TIMER			147
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#define	SCLK_INTMEM0				148
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#define	SCLK_INTMEM1				149
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#define	SCLK_INTMEM2				150
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#define	SCLK_INTMEM3				151
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#define	SCLK_INTMEM4				152
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#define	SCLK_INTMEM5				153
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#define	SCLK_SDMMC_DRV				154
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#define	SCLK_SDMMC_SAMPLE			155
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#define	SCLK_SDIO_DRV				156
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#define	SCLK_SDIO_SAMPLE			157
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#define	SCLK_VDU_CORE				158
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#define	SCLK_VDU_CA				159
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#define	SCLK_PCIE_PM				160
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#define	SCLK_SPDIF_REC_DPTX			161
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#define	SCLK_DPHY_PLL				162
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#define	SCLK_DPHY_TX0_CFG			163
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#define	SCLK_DPHY_TX1RX1_CFG			164
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#define	SCLK_DPHY_RX0_CFG			165
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#define	SCLK_RMII_SRC				166
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#define	SCLK_PCIEPHY_REF100M			167
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#define	SCLK_DDRC				168
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#define	SCLK_TESTCLKOUT1			169
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#define	SCLK_TESTCLKOUT2			170
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#define	DCLK_VOP0				180
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#define	DCLK_VOP1				181
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#define	DCLK_VOP0_DIV				182
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#define	DCLK_VOP1_DIV				183
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#define	DCLK_M0_PERILP				184
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#define	DCLK_VOP0_FRAC				185
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#define	DCLK_VOP1_FRAC				186
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#define	FCLK_CM0S				190
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#define	ACLK_PERIHP				192
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#define	ACLK_PERIHP_NOC				193
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#define	ACLK_PERILP0				194
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#define	ACLK_PERILP0_NOC			195
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#define	ACLK_PERF_PCIE				196
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#define	ACLK_PCIE				197
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#define	ACLK_INTMEM				198
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#define	ACLK_TZMA				199
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#define	ACLK_DCF				200
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#define	ACLK_CCI				201
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#define	ACLK_CCI_NOC0				202
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#define	ACLK_CCI_NOC1				203
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#define	ACLK_CCI_GRF				204
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#define	ACLK_CENTER				205
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#define	ACLK_CENTER_MAIN_NOC			206
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#define	ACLK_CENTER_PERI_NOC			207
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#define	ACLK_GPU				208
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#define	ACLK_PERF_GPU				209
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#define	ACLK_GPU_GRF				210
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#define	ACLK_DMAC0_PERILP			211
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#define	ACLK_DMAC1_PERILP			212
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#define	ACLK_GMAC				213
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#define	ACLK_GMAC_NOC				214
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#define	ACLK_PERF_GMAC				215
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#define	ACLK_VOP0_NOC				216
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#define	ACLK_VOP0				217
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#define	ACLK_VOP1_NOC				218
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#define	ACLK_VOP1				219
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#define	ACLK_RGA				220
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#define	ACLK_RGA_NOC				221
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#define	ACLK_HDCP				222
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#define	ACLK_HDCP_NOC				223
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#define	ACLK_HDCP22				224
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#define	ACLK_IEP				225
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#define	ACLK_IEP_NOC				226
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#define	ACLK_VIO				227
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#define	ACLK_VIO_NOC				228
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#define	ACLK_ISP0				229
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#define	ACLK_ISP1				230
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#define	ACLK_ISP0_NOC				231
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#define	ACLK_ISP1_NOC				232
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#define	ACLK_ISP0_WRAPPER			233
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#define	ACLK_ISP1_WRAPPER			234
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#define	ACLK_VCODEC				235
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#define	ACLK_VCODEC_NOC				236
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#define	ACLK_VDU				237
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#define	ACLK_VDU_NOC				238
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#define	ACLK_PERI				239
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#define	ACLK_EMMC				240
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#define	ACLK_EMMC_CORE				241
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#define	ACLK_EMMC_NOC				242
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#define	ACLK_EMMC_GRF				243
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#define	ACLK_USB3				244
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#define	ACLK_USB3_NOC				245
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#define	ACLK_USB3OTG0				246
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#define	ACLK_USB3OTG1				247
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#define	ACLK_USB3_RKSOC_AXI_PERF		248
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#define	ACLK_USB3_GRF				249
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#define	ACLK_GIC				250
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#define	ACLK_GIC_NOC				251
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#define	ACLK_GIC_ADB400_CORE_L_2_GIC		252
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#define	ACLK_GIC_ADB400_CORE_B_2_GIC		253
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#define	ACLK_GIC_ADB400_GIC_2_CORE_L		254
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#define	ACLK_GIC_ADB400_GIC_2_CORE_B		255
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#define	ACLK_CORE_ADB400_CORE_L_2_CCI500	256
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#define	ACLK_CORE_ADB400_CORE_B_2_CCI500	257
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#define	ACLK_ADB400M_PD_CORE_L			258
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#define	ACLK_ADB400M_PD_CORE_B			259
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#define	ACLK_PERF_CORE_L			260
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#define	ACLK_PERF_CORE_B			261
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#define	ACLK_GIC_PRE				262
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#define	ACLK_VOP0_PRE				263
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#define	ACLK_VOP1_PRE				264
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#define	PCLK_PERIHP				320
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#define	PCLK_PERIHP_NOC				321
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#define	PCLK_PERILP0				322
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#define	PCLK_PERILP1				323
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#define	PCLK_PERILP1_NOC			324
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#define	PCLK_PERILP_SGRF			325
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#define	PCLK_PERIHP_GRF				326
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#define	PCLK_PCIE				327
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#define	PCLK_SGRF				328
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#define	PCLK_INTR_ARB				329
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#define	PCLK_CENTER_MAIN_NOC			330
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#define	PCLK_CIC				331
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#define	PCLK_COREDBG_B				332
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#define	PCLK_COREDBG_L				333
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#define	PCLK_DBG_CXCS_PD_CORE_B			334
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#define	PCLK_DCF				335
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#define	PCLK_GPIO2				336
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#define	PCLK_GPIO3				337
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#define	PCLK_GPIO4				338
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#define	PCLK_GRF				339
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#define	PCLK_HSICPHY				340
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#define	PCLK_I2C1				341
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#define	PCLK_I2C2				342
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#define	PCLK_I2C3				343
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#define	PCLK_I2C5				344
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#define	PCLK_I2C6				345
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#define	PCLK_I2C7				346
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#define	PCLK_SPI0				347
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#define	PCLK_SPI1				348
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#define	PCLK_SPI2				349
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#define	PCLK_SPI4				350
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#define	PCLK_SPI5				351
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#define	PCLK_UART0				352
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#define	PCLK_UART1				353
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#define	PCLK_UART2				354
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#define	PCLK_UART3				355
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#define	PCLK_TSADC				356
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#define	PCLK_SARADC				357
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#define	PCLK_GMAC				358
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#define	PCLK_GMAC_NOC				359
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#define	PCLK_TIMER0				360
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#define	PCLK_TIMER1				361
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#define	PCLK_EDP				362
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#define	PCLK_EDP_NOC				363
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#define	PCLK_EDP_CTRL				364
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#define	PCLK_VIO				365
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#define	PCLK_VIO_NOC				366
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#define	PCLK_VIO_GRF				367
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#define	PCLK_MIPI_DSI0				368
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#define	PCLK_MIPI_DSI1				369
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#define	PCLK_HDCP				370
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#define	PCLK_HDCP_NOC				371
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#define	PCLK_HDMI_CTRL				372
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#define	PCLK_DP_CTRL				373
254
#define	PCLK_HDCP22				374
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#define	PCLK_GASKET				375
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#define	PCLK_DDR				376
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#define	PCLK_DDR_MON				377
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#define	PCLK_DDR_SGRF				378
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#define	PCLK_ISP1_WRAPPER			379
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#define	PCLK_WDT				380
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#define	PCLK_EFUSE1024NS			381
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#define	PCLK_EFUSE1024S				382
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#define	PCLK_PMU_INTR_ARB			383
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#define	PCLK_MAILBOX0				384
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#define	PCLK_USBPHY_MUX_G			385
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#define	PCLK_UPHY0_TCPHY_G			386
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#define	PCLK_UPHY0_TCPD_G			387
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#define	PCLK_UPHY1_TCPHY_G			388
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#define	PCLK_UPHY1_TCPD_G			389
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#define	PCLK_ALIVE				390
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#define	HCLK_PERIHP				448
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#define	HCLK_PERILP0				449
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#define	HCLK_PERILP1				450
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#define	HCLK_PERILP0_NOC			451
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#define	HCLK_PERILP1_NOC			452
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#define	HCLK_M0_PERILP				453
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#define	HCLK_M0_PERILP_NOC			454
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#define	HCLK_AHB1TOM				455
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#define	HCLK_HOST0				456
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#define	HCLK_HOST0_ARB				457
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#define	HCLK_HOST1				458
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#define	HCLK_HOST1_ARB				459
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#define	HCLK_HSIC				460
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#define	HCLK_SD					461
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#define	HCLK_SDMMC				462
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#define	HCLK_SDMMC_NOC				463
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#define	HCLK_M_CRYPTO0				464
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#define	HCLK_M_CRYPTO1				465
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#define	HCLK_S_CRYPTO0				466
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#define	HCLK_S_CRYPTO1				467
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#define	HCLK_I2S0_8CH				468
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#define	HCLK_I2S1_8CH				469
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#define	HCLK_I2S2_8CH				470
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#define	HCLK_SPDIF				471
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#define	HCLK_VOP0_NOC				472
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#define	HCLK_VOP0				473
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#define	HCLK_VOP1_NOC				474
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#define	HCLK_VOP1				475
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#define	HCLK_ROM				476
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#define	HCLK_IEP				477
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#define	HCLK_IEP_NOC				478
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#define	HCLK_ISP0				479
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#define	HCLK_ISP1				480
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#define	HCLK_ISP0_NOC				481
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#define	HCLK_ISP1_NOC				482
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#define	HCLK_ISP0_WRAPPER			483
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#define	HCLK_ISP1_WRAPPER			484
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#define	HCLK_RGA				485
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#define	HCLK_RGA_NOC				486
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#define	HCLK_HDCP				487
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#define	HCLK_HDCP_NOC				488
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#define	HCLK_HDCP22				489
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#define	HCLK_VCODEC				490
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#define	HCLK_VCODEC_NOC				491
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#define	HCLK_VDU				492
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#define	HCLK_VDU_NOC				493
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#define	HCLK_SDIO				494
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#define	HCLK_SDIO_NOC				495
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#define	HCLK_SDIOAUDIO_NOC			496
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#endif
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