Path: blob/main/sys/ofed/include/uapi/rdma/ib_user_verbs.h
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/*-1* SPDX-License-Identifier: BSD-2-Clause OR GPL-2.02*3* Copyright (c) 2005 Topspin Communications. All rights reserved.4* Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.5* Copyright (c) 2005 PathScale, Inc. All rights reserved.6* Copyright (c) 2006 Mellanox Technologies. All rights reserved.7*8* This software is available to you under a choice of one of two9* licenses. You may choose to be licensed under the terms of the GNU10* General Public License (GPL) Version 2, available from the file11* COPYING in the main directory of this source tree, or the12* OpenIB.org BSD license below:13*14* Redistribution and use in source and binary forms, with or15* without modification, are permitted provided that the following16* conditions are met:17*18* - Redistributions of source code must retain the above19* copyright notice, this list of conditions and the following20* disclaimer.21*22* - Redistributions in binary form must reproduce the above23* copyright notice, this list of conditions and the following24* disclaimer in the documentation and/or other materials25* provided with the distribution.26*27* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,28* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF29* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND30* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS31* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN32* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN33* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE34* SOFTWARE.35*/3637#ifndef IB_USER_VERBS_H38#define IB_USER_VERBS_H3940#ifdef _KERNEL41#include <linux/types.h>42#else43#include <infiniband/types.h>44#endif4546/*47* Increment this value if any changes that break userspace ABI48* compatibility are made.49*/50#define IB_USER_VERBS_ABI_VERSION 651#define IB_USER_VERBS_CMD_THRESHOLD 505253enum ib_uverbs_write_cmds {54IB_USER_VERBS_CMD_GET_CONTEXT,55IB_USER_VERBS_CMD_QUERY_DEVICE,56IB_USER_VERBS_CMD_QUERY_PORT,57IB_USER_VERBS_CMD_ALLOC_PD,58IB_USER_VERBS_CMD_DEALLOC_PD,59IB_USER_VERBS_CMD_CREATE_AH,60IB_USER_VERBS_CMD_MODIFY_AH,61IB_USER_VERBS_CMD_QUERY_AH,62IB_USER_VERBS_CMD_DESTROY_AH,63IB_USER_VERBS_CMD_REG_MR,64IB_USER_VERBS_CMD_REG_SMR,65IB_USER_VERBS_CMD_REREG_MR,66IB_USER_VERBS_CMD_QUERY_MR,67IB_USER_VERBS_CMD_DEREG_MR,68IB_USER_VERBS_CMD_ALLOC_MW,69IB_USER_VERBS_CMD_BIND_MW,70IB_USER_VERBS_CMD_DEALLOC_MW,71IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,72IB_USER_VERBS_CMD_CREATE_CQ,73IB_USER_VERBS_CMD_RESIZE_CQ,74IB_USER_VERBS_CMD_DESTROY_CQ,75IB_USER_VERBS_CMD_POLL_CQ,76IB_USER_VERBS_CMD_PEEK_CQ,77IB_USER_VERBS_CMD_REQ_NOTIFY_CQ,78IB_USER_VERBS_CMD_CREATE_QP,79IB_USER_VERBS_CMD_QUERY_QP,80IB_USER_VERBS_CMD_MODIFY_QP,81IB_USER_VERBS_CMD_DESTROY_QP,82IB_USER_VERBS_CMD_POST_SEND,83IB_USER_VERBS_CMD_POST_RECV,84IB_USER_VERBS_CMD_ATTACH_MCAST,85IB_USER_VERBS_CMD_DETACH_MCAST,86IB_USER_VERBS_CMD_CREATE_SRQ,87IB_USER_VERBS_CMD_MODIFY_SRQ,88IB_USER_VERBS_CMD_QUERY_SRQ,89IB_USER_VERBS_CMD_DESTROY_SRQ,90IB_USER_VERBS_CMD_POST_SRQ_RECV,91IB_USER_VERBS_CMD_OPEN_XRCD,92IB_USER_VERBS_CMD_CLOSE_XRCD,93IB_USER_VERBS_CMD_CREATE_XSRQ,94IB_USER_VERBS_CMD_OPEN_QP,95};9697enum {98IB_USER_VERBS_EX_CMD_QUERY_DEVICE = IB_USER_VERBS_CMD_QUERY_DEVICE,99IB_USER_VERBS_EX_CMD_CREATE_CQ = IB_USER_VERBS_CMD_CREATE_CQ,100IB_USER_VERBS_EX_CMD_CREATE_QP = IB_USER_VERBS_CMD_CREATE_QP,101IB_USER_VERBS_EX_CMD_MODIFY_QP = IB_USER_VERBS_CMD_MODIFY_QP,102IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,103IB_USER_VERBS_EX_CMD_DESTROY_FLOW,104IB_USER_VERBS_EX_CMD_CREATE_WQ,105IB_USER_VERBS_EX_CMD_MODIFY_WQ,106IB_USER_VERBS_EX_CMD_DESTROY_WQ,107IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL,108IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL,109IB_USER_VERBS_EX_CMD_MODIFY_CQ110};111112/*113* Make sure that all structs defined in this file remain laid out so114* that they pack the same way on 32-bit and 64-bit architectures (to115* avoid incompatibility between 32-bit userspace and 64-bit kernels).116* Specifically:117* - Do not use pointer types -- pass pointers in __u64 instead.118* - Make sure that any structure larger than 4 bytes is padded to a119* multiple of 8 bytes. Otherwise the structure size will be120* different between 32-bit and 64-bit architectures.121*/122123struct ib_uverbs_async_event_desc {124__aligned_u64 element;125__u32 event_type; /* enum ib_event_type */126__u32 reserved;127};128129struct ib_uverbs_comp_event_desc {130__aligned_u64 cq_handle;131};132133struct ib_uverbs_cq_moderation_caps {134__u16 max_cq_moderation_count;135__u16 max_cq_moderation_period;136__u32 reserved;137};138139/*140* All commands from userspace should start with a __u32 command field141* followed by __u16 in_words and out_words fields (which give the142* length of the command block and response buffer if any in 32-bit143* words). The kernel driver will read these fields first and read144* the rest of the command struct based on these value.145*/146147#define IB_USER_VERBS_CMD_COMMAND_MASK 0xff148#define IB_USER_VERBS_CMD_FLAG_EXTENDED 0x80000000u149150struct ib_uverbs_cmd_hdr {151__u32 command;152__u16 in_words;153__u16 out_words;154};155156struct ib_uverbs_ex_cmd_hdr {157__aligned_u64 response;158__u16 provider_in_words;159__u16 provider_out_words;160__u32 cmd_hdr_reserved;161};162163struct ib_uverbs_get_context {164__aligned_u64 response;165__aligned_u64 driver_data[0];166};167168struct ib_uverbs_get_context_resp {169__u32 async_fd;170__u32 num_comp_vectors;171__aligned_u64 driver_data[0];172};173174struct ib_uverbs_query_device {175__aligned_u64 response;176__aligned_u64 driver_data[0];177};178179struct ib_uverbs_query_device_resp {180__aligned_u64 fw_ver;181__be64 node_guid;182__be64 sys_image_guid;183__aligned_u64 max_mr_size;184__aligned_u64 page_size_cap;185__u32 vendor_id;186__u32 vendor_part_id;187__u32 hw_ver;188__u32 max_qp;189__u32 max_qp_wr;190__u32 device_cap_flags;191__u32 max_sge;192__u32 max_sge_rd;193__u32 max_cq;194__u32 max_cqe;195__u32 max_mr;196__u32 max_pd;197__u32 max_qp_rd_atom;198__u32 max_ee_rd_atom;199__u32 max_res_rd_atom;200__u32 max_qp_init_rd_atom;201__u32 max_ee_init_rd_atom;202__u32 atomic_cap;203__u32 max_ee;204__u32 max_rdd;205__u32 max_mw;206__u32 max_raw_ipv6_qp;207__u32 max_raw_ethy_qp;208__u32 max_mcast_grp;209__u32 max_mcast_qp_attach;210__u32 max_total_mcast_qp_attach;211__u32 max_ah;212__u32 max_fmr;213__u32 max_map_per_fmr;214__u32 max_srq;215__u32 max_srq_wr;216__u32 max_srq_sge;217__u16 max_pkeys;218__u8 local_ca_ack_delay;219__u8 phys_port_cnt;220__u8 reserved[4];221};222223struct ib_uverbs_ex_query_device {224__u32 comp_mask;225__u32 reserved;226};227228struct ib_uverbs_odp_caps {229__aligned_u64 general_caps;230struct {231__u32 rc_odp_caps;232__u32 uc_odp_caps;233__u32 ud_odp_caps;234} per_transport_caps;235__u32 reserved;236};237238struct ib_uverbs_rss_caps {239/* Corresponding bit will be set if qp type from240* 'enum ib_qp_type' is supported, e.g.241* supported_qpts |= 1 << IB_QPT_UD242*/243__u32 supported_qpts;244__u32 max_rwq_indirection_tables;245__u32 max_rwq_indirection_table_size;246__u32 reserved;247};248249struct ib_uverbs_tm_caps {250/* Max size of rendezvous request message */251__u32 max_rndv_hdr_size;252/* Max number of entries in tag matching list */253__u32 max_num_tags;254/* TM flags */255__u32 flags;256/* Max number of outstanding list operations */257__u32 max_ops;258/* Max number of SGE in tag matching entry */259__u32 max_sge;260__u32 reserved;261};262263struct ib_uverbs_ex_query_device_resp {264struct ib_uverbs_query_device_resp base;265__u32 comp_mask;266__u32 response_length;267struct ib_uverbs_odp_caps odp_caps;268__aligned_u64 timestamp_mask;269__aligned_u64 hca_core_clock; /* in KHZ */270__aligned_u64 device_cap_flags_ex;271struct ib_uverbs_rss_caps rss_caps;272__u32 max_wq_type_rq;273__u32 raw_packet_caps;274struct ib_uverbs_tm_caps tm_caps;275struct ib_uverbs_cq_moderation_caps cq_moderation_caps;276__aligned_u64 max_dm_size;277__u32 xrc_odp_caps;278__u32 reserved;279};280281struct ib_uverbs_query_port {282__aligned_u64 response;283__u8 port_num;284__u8 reserved[7];285__aligned_u64 driver_data[0];286};287288struct ib_uverbs_query_port_resp {289__u32 port_cap_flags; /* see ib_uverbs_query_port_cap_flags */290__u32 max_msg_sz;291__u32 bad_pkey_cntr;292__u32 qkey_viol_cntr;293__u32 gid_tbl_len;294__u16 pkey_tbl_len;295__u16 lid;296__u16 sm_lid;297__u8 state;298__u8 max_mtu;299__u8 active_mtu;300__u8 lmc;301__u8 max_vl_num;302__u8 sm_sl;303__u8 subnet_timeout;304__u8 init_type_reply;305__u8 active_width;306__u8 active_speed;307__u8 phys_state;308__u8 link_layer;309__u8 flags; /* see ib_uverbs_query_port_flags */310__u8 reserved;311};312313struct ib_uverbs_alloc_pd {314__aligned_u64 response;315__aligned_u64 driver_data[0];316};317318struct ib_uverbs_alloc_pd_resp {319__u32 pd_handle;320__u32 driver_data[0];321};322323struct ib_uverbs_dealloc_pd {324__u32 pd_handle;325};326327struct ib_uverbs_open_xrcd {328__aligned_u64 response;329__u32 fd;330__u32 oflags;331__aligned_u64 driver_data[0];332};333334struct ib_uverbs_open_xrcd_resp {335__u32 xrcd_handle;336__u32 driver_data[0];337};338339struct ib_uverbs_close_xrcd {340__u32 xrcd_handle;341};342343struct ib_uverbs_reg_mr {344__aligned_u64 response;345__aligned_u64 start;346__aligned_u64 length;347__aligned_u64 hca_va;348__u32 pd_handle;349__u32 access_flags;350__aligned_u64 driver_data[0];351};352353struct ib_uverbs_reg_mr_resp {354__u32 mr_handle;355__u32 lkey;356__u32 rkey;357__u32 driver_data[0];358};359360struct ib_uverbs_rereg_mr {361__aligned_u64 response;362__u32 mr_handle;363__u32 flags;364__aligned_u64 start;365__aligned_u64 length;366__aligned_u64 hca_va;367__u32 pd_handle;368__u32 access_flags;369__aligned_u64 driver_data[0];370};371372struct ib_uverbs_rereg_mr_resp {373__u32 lkey;374__u32 rkey;375__aligned_u64 driver_data[0];376};377378struct ib_uverbs_dereg_mr {379__u32 mr_handle;380};381382struct ib_uverbs_alloc_mw {383__aligned_u64 response;384__u32 pd_handle;385__u8 mw_type;386__u8 reserved[3];387__aligned_u64 driver_data[0];388};389390struct ib_uverbs_alloc_mw_resp {391__u32 mw_handle;392__u32 rkey;393__aligned_u64 driver_data[0];394};395396struct ib_uverbs_dealloc_mw {397__u32 mw_handle;398};399400struct ib_uverbs_create_comp_channel {401__aligned_u64 response;402};403404struct ib_uverbs_create_comp_channel_resp {405__u32 fd;406};407408struct ib_uverbs_create_cq {409__aligned_u64 response;410__aligned_u64 user_handle;411__u32 cqe;412__u32 comp_vector;413__s32 comp_channel;414__u32 reserved;415__aligned_u64 driver_data[0];416};417418enum ib_uverbs_ex_create_cq_flags {419IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,420IB_UVERBS_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,421};422423struct ib_uverbs_ex_create_cq {424__aligned_u64 user_handle;425__u32 cqe;426__u32 comp_vector;427__s32 comp_channel;428__u32 comp_mask;429__u32 flags; /* bitmask of ib_uverbs_ex_create_cq_flags */430__u32 reserved;431};432433struct ib_uverbs_create_cq_resp {434__u32 cq_handle;435__u32 cqe;436__aligned_u64 driver_data[0];437};438439struct ib_uverbs_ex_create_cq_resp {440struct ib_uverbs_create_cq_resp base;441__u32 comp_mask;442__u32 response_length;443};444445struct ib_uverbs_resize_cq {446__aligned_u64 response;447__u32 cq_handle;448__u32 cqe;449__aligned_u64 driver_data[0];450};451452struct ib_uverbs_resize_cq_resp {453__u32 cqe;454__u32 reserved;455__aligned_u64 driver_data[0];456};457458struct ib_uverbs_poll_cq {459__aligned_u64 response;460__u32 cq_handle;461__u32 ne;462};463464struct ib_uverbs_wc {465__aligned_u64 wr_id;466__u32 status;467__u32 opcode;468__u32 vendor_err;469__u32 byte_len;470union {471__be32 imm_data;472__u32 invalidate_rkey;473} ex;474__u32 qp_num;475__u32 src_qp;476__u32 wc_flags;477__u16 pkey_index;478__u16 slid;479__u8 sl;480__u8 dlid_path_bits;481__u8 port_num;482__u8 reserved;483};484485struct ib_uverbs_poll_cq_resp {486__u32 count;487__u32 reserved;488struct ib_uverbs_wc wc[0];489};490491struct ib_uverbs_req_notify_cq {492__u32 cq_handle;493__u32 solicited_only;494};495496struct ib_uverbs_destroy_cq {497__aligned_u64 response;498__u32 cq_handle;499__u32 reserved;500};501502struct ib_uverbs_destroy_cq_resp {503__u32 comp_events_reported;504__u32 async_events_reported;505};506507struct ib_uverbs_global_route {508__u8 dgid[16];509__u32 flow_label;510__u8 sgid_index;511__u8 hop_limit;512__u8 traffic_class;513__u8 reserved;514};515516struct ib_uverbs_ah_attr {517struct ib_uverbs_global_route grh;518__u16 dlid;519__u8 sl;520__u8 src_path_bits;521__u8 static_rate;522__u8 is_global;523__u8 port_num;524__u8 reserved;525};526527struct ib_uverbs_qp_attr {528__u32 qp_attr_mask;529__u32 qp_state;530__u32 cur_qp_state;531__u32 path_mtu;532__u32 path_mig_state;533__u32 qkey;534__u32 rq_psn;535__u32 sq_psn;536__u32 dest_qp_num;537__u32 qp_access_flags;538539struct ib_uverbs_ah_attr ah_attr;540struct ib_uverbs_ah_attr alt_ah_attr;541542/* ib_qp_cap */543__u32 max_send_wr;544__u32 max_recv_wr;545__u32 max_send_sge;546__u32 max_recv_sge;547__u32 max_inline_data;548549__u16 pkey_index;550__u16 alt_pkey_index;551__u8 en_sqd_async_notify;552__u8 sq_draining;553__u8 max_rd_atomic;554__u8 max_dest_rd_atomic;555__u8 min_rnr_timer;556__u8 port_num;557__u8 timeout;558__u8 retry_cnt;559__u8 rnr_retry;560__u8 alt_port_num;561__u8 alt_timeout;562__u8 reserved[5];563};564565struct ib_uverbs_create_qp {566__aligned_u64 response;567__aligned_u64 user_handle;568__u32 pd_handle;569__u32 send_cq_handle;570__u32 recv_cq_handle;571__u32 srq_handle;572__u32 max_send_wr;573__u32 max_recv_wr;574__u32 max_send_sge;575__u32 max_recv_sge;576__u32 max_inline_data;577__u8 sq_sig_all;578__u8 qp_type;579__u8 is_srq;580__u8 reserved;581__aligned_u64 driver_data[0];582};583584enum ib_uverbs_create_qp_mask {585IB_UVERBS_CREATE_QP_MASK_IND_TABLE = 1UL << 0,586};587588enum {589IB_UVERBS_CREATE_QP_SUP_COMP_MASK = IB_UVERBS_CREATE_QP_MASK_IND_TABLE,590};591592enum {593/*594* This value is equal to IB_QP_DEST_QPN.595*/596IB_USER_LEGACY_LAST_QP_ATTR_MASK = 1ULL << 20,597};598599enum {600/*601* This value is equal to IB_QP_RATE_LIMIT.602*/603IB_USER_LAST_QP_ATTR_MASK = 1ULL << 25,604};605606struct ib_uverbs_ex_create_qp {607__aligned_u64 user_handle;608__u32 pd_handle;609__u32 send_cq_handle;610__u32 recv_cq_handle;611__u32 srq_handle;612__u32 max_send_wr;613__u32 max_recv_wr;614__u32 max_send_sge;615__u32 max_recv_sge;616__u32 max_inline_data;617__u8 sq_sig_all;618__u8 qp_type;619__u8 is_srq;620__u8 reserved;621__u32 comp_mask;622__u32 create_flags;623__u32 rwq_ind_tbl_handle;624__u32 source_qpn;625};626627struct ib_uverbs_open_qp {628__aligned_u64 response;629__aligned_u64 user_handle;630__u32 pd_handle;631__u32 qpn;632__u8 qp_type;633__u8 reserved[7];634__aligned_u64 driver_data[0];635};636637/* also used for open response */638struct ib_uverbs_create_qp_resp {639__u32 qp_handle;640__u32 qpn;641__u32 max_send_wr;642__u32 max_recv_wr;643__u32 max_send_sge;644__u32 max_recv_sge;645__u32 max_inline_data;646__u32 reserved;647__u32 driver_data[0];648};649650struct ib_uverbs_ex_create_qp_resp {651struct ib_uverbs_create_qp_resp base;652__u32 comp_mask;653__u32 response_length;654};655656/*657* This struct needs to remain a multiple of 8 bytes to keep the658* alignment of the modify QP parameters.659*/660struct ib_uverbs_qp_dest {661__u8 dgid[16];662__u32 flow_label;663__u16 dlid;664__u16 reserved;665__u8 sgid_index;666__u8 hop_limit;667__u8 traffic_class;668__u8 sl;669__u8 src_path_bits;670__u8 static_rate;671__u8 is_global;672__u8 port_num;673};674675struct ib_uverbs_query_qp {676__aligned_u64 response;677__u32 qp_handle;678__u32 attr_mask;679__aligned_u64 driver_data[0];680};681682struct ib_uverbs_query_qp_resp {683struct ib_uverbs_qp_dest dest;684struct ib_uverbs_qp_dest alt_dest;685__u32 max_send_wr;686__u32 max_recv_wr;687__u32 max_send_sge;688__u32 max_recv_sge;689__u32 max_inline_data;690__u32 qkey;691__u32 rq_psn;692__u32 sq_psn;693__u32 dest_qp_num;694__u32 qp_access_flags;695__u16 pkey_index;696__u16 alt_pkey_index;697__u8 qp_state;698__u8 cur_qp_state;699__u8 path_mtu;700__u8 path_mig_state;701__u8 sq_draining;702__u8 max_rd_atomic;703__u8 max_dest_rd_atomic;704__u8 min_rnr_timer;705__u8 port_num;706__u8 timeout;707__u8 retry_cnt;708__u8 rnr_retry;709__u8 alt_port_num;710__u8 alt_timeout;711__u8 sq_sig_all;712__u8 reserved[5];713__aligned_u64 driver_data[0];714};715716struct ib_uverbs_modify_qp {717struct ib_uverbs_qp_dest dest;718struct ib_uverbs_qp_dest alt_dest;719__u32 qp_handle;720__u32 attr_mask;721__u32 qkey;722__u32 rq_psn;723__u32 sq_psn;724__u32 dest_qp_num;725__u32 qp_access_flags;726__u16 pkey_index;727__u16 alt_pkey_index;728__u8 qp_state;729__u8 cur_qp_state;730__u8 path_mtu;731__u8 path_mig_state;732__u8 en_sqd_async_notify;733__u8 max_rd_atomic;734__u8 max_dest_rd_atomic;735__u8 min_rnr_timer;736__u8 port_num;737__u8 timeout;738__u8 retry_cnt;739__u8 rnr_retry;740__u8 alt_port_num;741__u8 alt_timeout;742__u8 reserved[2];743__aligned_u64 driver_data[0];744};745746struct ib_uverbs_ex_modify_qp {747struct ib_uverbs_modify_qp base;748__u32 rate_limit;749__u32 reserved;750};751752struct ib_uverbs_ex_modify_qp_resp {753__u32 comp_mask;754__u32 response_length;755};756757struct ib_uverbs_destroy_qp {758__aligned_u64 response;759__u32 qp_handle;760__u32 reserved;761};762763struct ib_uverbs_destroy_qp_resp {764__u32 events_reported;765};766767/*768* The ib_uverbs_sge structure isn't used anywhere, since we assume769* the ib_sge structure is packed the same way on 32-bit and 64-bit770* architectures in both kernel and user space. It's just here to771* document the ABI.772*/773struct ib_uverbs_sge {774__aligned_u64 addr;775__u32 length;776__u32 lkey;777};778779enum ib_uverbs_wr_opcode {780IB_UVERBS_WR_RDMA_WRITE = 0,781IB_UVERBS_WR_RDMA_WRITE_WITH_IMM = 1,782IB_UVERBS_WR_SEND = 2,783IB_UVERBS_WR_SEND_WITH_IMM = 3,784IB_UVERBS_WR_RDMA_READ = 4,785IB_UVERBS_WR_ATOMIC_CMP_AND_SWP = 5,786IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD = 6,787IB_UVERBS_WR_LOCAL_INV = 7,788IB_UVERBS_WR_BIND_MW = 8,789IB_UVERBS_WR_SEND_WITH_INV = 9,790IB_UVERBS_WR_TSO = 10,791IB_UVERBS_WR_RDMA_READ_WITH_INV = 11,792IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP = 12,793IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD = 13,794/* Review enum ib_wr_opcode before modifying this */795};796797struct ib_uverbs_send_wr {798__aligned_u64 wr_id;799__u32 num_sge;800__u32 opcode; /* see enum ib_uverbs_wr_opcode */801__u32 send_flags;802union {803__be32 imm_data;804__u32 invalidate_rkey;805} ex;806union {807struct {808__aligned_u64 remote_addr;809__u32 rkey;810__u32 reserved;811} rdma;812struct {813__aligned_u64 remote_addr;814__aligned_u64 compare_add;815__aligned_u64 swap;816__u32 rkey;817__u32 reserved;818} atomic;819struct {820__u32 ah;821__u32 remote_qpn;822__u32 remote_qkey;823__u32 reserved;824} ud;825} wr;826};827828struct ib_uverbs_post_send {829__aligned_u64 response;830__u32 qp_handle;831__u32 wr_count;832__u32 sge_count;833__u32 wqe_size;834struct ib_uverbs_send_wr send_wr[0];835};836837struct ib_uverbs_post_send_resp {838__u32 bad_wr;839};840841struct ib_uverbs_recv_wr {842__aligned_u64 wr_id;843__u32 num_sge;844__u32 reserved;845};846847struct ib_uverbs_post_recv {848__aligned_u64 response;849__u32 qp_handle;850__u32 wr_count;851__u32 sge_count;852__u32 wqe_size;853struct ib_uverbs_recv_wr recv_wr[0];854};855856struct ib_uverbs_post_recv_resp {857__u32 bad_wr;858};859860struct ib_uverbs_post_srq_recv {861__aligned_u64 response;862__u32 srq_handle;863__u32 wr_count;864__u32 sge_count;865__u32 wqe_size;866struct ib_uverbs_recv_wr recv[0];867};868869struct ib_uverbs_post_srq_recv_resp {870__u32 bad_wr;871};872873struct ib_uverbs_create_ah {874__aligned_u64 response;875__aligned_u64 user_handle;876__u32 pd_handle;877__u32 reserved;878struct ib_uverbs_ah_attr attr;879__aligned_u64 driver_data[0];880};881882struct ib_uverbs_create_ah_resp {883__u32 ah_handle;884__u32 driver_data[0];885};886887struct ib_uverbs_destroy_ah {888__u32 ah_handle;889};890891struct ib_uverbs_attach_mcast {892__u8 gid[16];893__u32 qp_handle;894__u16 mlid;895__u16 reserved;896__aligned_u64 driver_data[0];897};898899struct ib_uverbs_detach_mcast {900__u8 gid[16];901__u32 qp_handle;902__u16 mlid;903__u16 reserved;904__aligned_u64 driver_data[0];905};906907struct ib_uverbs_flow_spec_hdr {908__u32 type;909__u16 size;910__u16 reserved;911/* followed by flow_spec */912__aligned_u64 flow_spec_data[0];913};914915struct ib_uverbs_flow_eth_filter {916__u8 dst_mac[6];917__u8 src_mac[6];918__be16 ether_type;919__be16 vlan_tag;920};921922struct ib_uverbs_flow_spec_eth {923union {924struct ib_uverbs_flow_spec_hdr hdr;925struct {926__u32 type;927__u16 size;928__u16 reserved;929};930};931struct ib_uverbs_flow_eth_filter val;932struct ib_uverbs_flow_eth_filter mask;933};934935struct ib_uverbs_flow_ipv4_filter {936__be32 src_ip;937__be32 dst_ip;938__u8 proto;939__u8 tos;940__u8 ttl;941__u8 flags;942};943944struct ib_uverbs_flow_spec_ipv4 {945union {946struct ib_uverbs_flow_spec_hdr hdr;947struct {948__u32 type;949__u16 size;950__u16 reserved;951};952};953struct ib_uverbs_flow_ipv4_filter val;954struct ib_uverbs_flow_ipv4_filter mask;955};956957struct ib_uverbs_flow_tcp_udp_filter {958__be16 dst_port;959__be16 src_port;960};961962struct ib_uverbs_flow_spec_tcp_udp {963union {964struct ib_uverbs_flow_spec_hdr hdr;965struct {966__u32 type;967__u16 size;968__u16 reserved;969};970};971struct ib_uverbs_flow_tcp_udp_filter val;972struct ib_uverbs_flow_tcp_udp_filter mask;973};974975struct ib_uverbs_flow_ipv6_filter {976__u8 src_ip[16];977__u8 dst_ip[16];978__be32 flow_label;979__u8 next_hdr;980__u8 traffic_class;981__u8 hop_limit;982__u8 reserved;983};984985struct ib_uverbs_flow_spec_ipv6 {986union {987struct ib_uverbs_flow_spec_hdr hdr;988struct {989__u32 type;990__u16 size;991__u16 reserved;992};993};994struct ib_uverbs_flow_ipv6_filter val;995struct ib_uverbs_flow_ipv6_filter mask;996};997998struct ib_uverbs_flow_spec_action_tag {999union {1000struct ib_uverbs_flow_spec_hdr hdr;1001struct {1002__u32 type;1003__u16 size;1004__u16 reserved;1005};1006};1007__u32 tag_id;1008__u32 reserved1;1009};10101011struct ib_uverbs_flow_spec_action_drop {1012union {1013struct ib_uverbs_flow_spec_hdr hdr;1014struct {1015__u32 type;1016__u16 size;1017__u16 reserved;1018};1019};1020};10211022struct ib_uverbs_flow_spec_action_handle {1023union {1024struct ib_uverbs_flow_spec_hdr hdr;1025struct {1026__u32 type;1027__u16 size;1028__u16 reserved;1029};1030};1031__u32 handle;1032__u32 reserved1;1033};10341035struct ib_uverbs_flow_spec_action_count {1036union {1037struct ib_uverbs_flow_spec_hdr hdr;1038struct {1039__u32 type;1040__u16 size;1041__u16 reserved;1042};1043};1044__u32 handle;1045__u32 reserved1;1046};10471048struct ib_uverbs_flow_tunnel_filter {1049__be32 tunnel_id;1050};10511052struct ib_uverbs_flow_spec_tunnel {1053union {1054struct ib_uverbs_flow_spec_hdr hdr;1055struct {1056__u32 type;1057__u16 size;1058__u16 reserved;1059};1060};1061struct ib_uverbs_flow_tunnel_filter val;1062struct ib_uverbs_flow_tunnel_filter mask;1063};10641065struct ib_uverbs_flow_spec_esp_filter {1066__u32 spi;1067__u32 seq;1068};10691070struct ib_uverbs_flow_spec_esp {1071union {1072struct ib_uverbs_flow_spec_hdr hdr;1073struct {1074__u32 type;1075__u16 size;1076__u16 reserved;1077};1078};1079struct ib_uverbs_flow_spec_esp_filter val;1080struct ib_uverbs_flow_spec_esp_filter mask;1081};10821083struct ib_uverbs_flow_gre_filter {1084/* c_ks_res0_ver field is bits 0-15 in offset 0 of a standard GRE header:1085* bit 0 - C - checksum bit.1086* bit 1 - reserved. set to 0.1087* bit 2 - key bit.1088* bit 3 - sequence number bit.1089* bits 4:12 - reserved. set to 0.1090* bits 13:15 - GRE version.1091*/1092__be16 c_ks_res0_ver;1093__be16 protocol;1094__be32 key;1095};10961097struct ib_uverbs_flow_spec_gre {1098union {1099struct ib_uverbs_flow_spec_hdr hdr;1100struct {1101__u32 type;1102__u16 size;1103__u16 reserved;1104};1105};1106struct ib_uverbs_flow_gre_filter val;1107struct ib_uverbs_flow_gre_filter mask;1108};11091110struct ib_uverbs_flow_mpls_filter {1111/* The field includes the entire MPLS label:1112* bits 0:19 - label field.1113* bits 20:22 - traffic class field.1114* bits 23 - bottom of stack bit.1115* bits 24:31 - ttl field.1116*/1117__be32 label;1118};11191120struct ib_uverbs_flow_spec_mpls {1121union {1122struct ib_uverbs_flow_spec_hdr hdr;1123struct {1124__u32 type;1125__u16 size;1126__u16 reserved;1127};1128};1129struct ib_uverbs_flow_mpls_filter val;1130struct ib_uverbs_flow_mpls_filter mask;1131};11321133struct ib_uverbs_flow_attr {1134__u32 type;1135__u16 size;1136__u16 priority;1137__u8 num_of_specs;1138__u8 reserved[2];1139__u8 port;1140__u32 flags;1141/* Following are the optional layers according to user request1142* struct ib_flow_spec_xxx1143* struct ib_flow_spec_yyy1144*/1145struct ib_uverbs_flow_spec_hdr flow_specs[0];1146};11471148struct ib_uverbs_create_flow {1149__u32 comp_mask;1150__u32 qp_handle;1151struct ib_uverbs_flow_attr flow_attr;1152};11531154struct ib_uverbs_create_flow_resp {1155__u32 comp_mask;1156__u32 flow_handle;1157};11581159struct ib_uverbs_destroy_flow {1160__u32 comp_mask;1161__u32 flow_handle;1162};11631164struct ib_uverbs_create_srq {1165__aligned_u64 response;1166__aligned_u64 user_handle;1167__u32 pd_handle;1168__u32 max_wr;1169__u32 max_sge;1170__u32 srq_limit;1171__aligned_u64 driver_data[0];1172};11731174struct ib_uverbs_create_xsrq {1175__aligned_u64 response;1176__aligned_u64 user_handle;1177__u32 srq_type;1178__u32 pd_handle;1179__u32 max_wr;1180__u32 max_sge;1181__u32 srq_limit;1182__u32 max_num_tags;1183__u32 xrcd_handle;1184__u32 cq_handle;1185__aligned_u64 driver_data[0];1186};11871188struct ib_uverbs_create_srq_resp {1189__u32 srq_handle;1190__u32 max_wr;1191__u32 max_sge;1192__u32 srqn;1193__u32 driver_data[0];1194};11951196struct ib_uverbs_modify_srq {1197__u32 srq_handle;1198__u32 attr_mask;1199__u32 max_wr;1200__u32 srq_limit;1201__aligned_u64 driver_data[0];1202};12031204struct ib_uverbs_query_srq {1205__aligned_u64 response;1206__u32 srq_handle;1207__u32 reserved;1208__aligned_u64 driver_data[0];1209};12101211struct ib_uverbs_query_srq_resp {1212__u32 max_wr;1213__u32 max_sge;1214__u32 srq_limit;1215__u32 reserved;1216};12171218struct ib_uverbs_destroy_srq {1219__aligned_u64 response;1220__u32 srq_handle;1221__u32 reserved;1222};12231224struct ib_uverbs_destroy_srq_resp {1225__u32 events_reported;1226};12271228struct ib_uverbs_ex_create_wq {1229__u32 comp_mask;1230__u32 wq_type;1231__aligned_u64 user_handle;1232__u32 pd_handle;1233__u32 cq_handle;1234__u32 max_wr;1235__u32 max_sge;1236__u32 create_flags; /* Use enum ib_wq_flags */1237__u32 reserved;1238};12391240struct ib_uverbs_ex_create_wq_resp {1241__u32 comp_mask;1242__u32 response_length;1243__u32 wq_handle;1244__u32 max_wr;1245__u32 max_sge;1246__u32 wqn;1247};12481249struct ib_uverbs_ex_destroy_wq {1250__u32 comp_mask;1251__u32 wq_handle;1252};12531254struct ib_uverbs_ex_destroy_wq_resp {1255__u32 comp_mask;1256__u32 response_length;1257__u32 events_reported;1258__u32 reserved;1259};12601261struct ib_uverbs_ex_modify_wq {1262__u32 attr_mask;1263__u32 wq_handle;1264__u32 wq_state;1265__u32 curr_wq_state;1266__u32 flags; /* Use enum ib_wq_flags */1267__u32 flags_mask; /* Use enum ib_wq_flags */1268};12691270/* Prevent memory allocation rather than max expected size */1271#define IB_USER_VERBS_MAX_LOG_IND_TBL_SIZE 0x0d1272struct ib_uverbs_ex_create_rwq_ind_table {1273__u32 comp_mask;1274__u32 log_ind_tbl_size;1275/* Following are the wq handles according to log_ind_tbl_size1276* wq_handle11277* wq_handle21278*/1279__u32 wq_handles[0];1280};12811282struct ib_uverbs_ex_create_rwq_ind_table_resp {1283__u32 comp_mask;1284__u32 response_length;1285__u32 ind_tbl_handle;1286__u32 ind_tbl_num;1287};12881289struct ib_uverbs_ex_destroy_rwq_ind_table {1290__u32 comp_mask;1291__u32 ind_tbl_handle;1292};12931294struct ib_uverbs_cq_moderation {1295__u16 cq_count;1296__u16 cq_period;1297};12981299struct ib_uverbs_ex_modify_cq {1300__u32 cq_handle;1301__u32 attr_mask;1302struct ib_uverbs_cq_moderation attr;1303__u32 reserved;1304};13051306#define IB_DEVICE_NAME_MAX 6413071308#endif /* IB_USER_VERBS_H */130913101311