/*-1* SPDX-License-Identifier: BSD-2-Clause2*3* Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski4* All rights reserved.5*6* Redistribution and use in source and binary forms, with or without7* modification, are permitted provided that the following conditions8* are met:9*10* 1. Redistributions of source code must retain the above copyright11* notice, this list of conditions and the following disclaimer.12* 2. Redistributions in binary form must reproduce the above copyright13* notice, this list of conditions and the following disclaimer in the14* documentation and/or other materials provided with the distribution.15*16* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR17* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES18* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.19* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,20* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT21* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,22* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY23* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT24* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF25* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.26*/2728#include <sys/param.h>29#include <sys/systm.h>30#include <sys/kernel.h>31#include <sys/bus.h>32#include <sys/pcpu.h>33#include <sys/proc.h>34#include <sys/sched.h>35#include <sys/smp.h>3637#include <machine/pcb.h>38#include <machine/psl.h>39#include <machine/smp.h>40#include <machine/spr.h>4142extern void dcache_enable(void);43extern void dcache_inval(void);44extern void icache_enable(void);45extern void icache_inval(void);4647volatile void *ap_pcpu;4849uintptr_t50cpudep_ap_bootstrap(void)51{52uint32_t msr, csr;53uintptr_t sp;5455/* Enable L1 caches */56csr = mfspr(SPR_L1CSR0);57if ((csr & L1CSR0_DCE) == 0) {58dcache_inval();59dcache_enable();60}6162csr = mfspr(SPR_L1CSR1);63if ((csr & L1CSR1_ICE) == 0) {64icache_inval();65icache_enable();66}6768/* Set MSR */69#ifdef __powerpc64__70msr = PSL_CM | PSL_ME;71#else72msr = PSL_ME;73#endif74mtmsr(msr);7576/* Assign pcpu fields, return ptr to this AP's idle thread kstack */77pcpup->pc_curthread = pcpup->pc_idlethread;78#ifdef __powerpc64__79__asm __volatile("mr 13,%0" :: "r"(pcpup->pc_curthread));80#else81__asm __volatile("mr 2,%0" :: "r"(pcpup->pc_curthread));82#endif83pcpup->pc_curpcb = pcpup->pc_curthread->td_pcb;84sp = pcpup->pc_curpcb->pcb_sp;85schedinit_ap();8687/* XXX shouldn't the pcb_sp be checked/forced for alignment here?? */8889return (sp);90}9192void93cpudep_ap_setup(void)94{95}969798