/* $NetBSD: fpu_subr.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */12/*3* SPDX-License-Identifier: BSD-3-Clause4*5* Copyright (c) 1992, 19936* The Regents of the University of California. All rights reserved.7*8* This software was developed by the Computer Systems Engineering group9* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and10* contributed to Berkeley.11*12* All advertising materials mentioning features or use of this software13* must display the following acknowledgement:14* This product includes software developed by the University of15* California, Lawrence Berkeley Laboratory.16*17* Redistribution and use in source and binary forms, with or without18* modification, are permitted provided that the following conditions19* are met:20* 1. Redistributions of source code must retain the above copyright21* notice, this list of conditions and the following disclaimer.22* 2. Redistributions in binary form must reproduce the above copyright23* notice, this list of conditions and the following disclaimer in the24* documentation and/or other materials provided with the distribution.25* 3. Neither the name of the University nor the names of its contributors26* may be used to endorse or promote products derived from this software27* without specific prior written permission.28*29* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND30* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE31* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE32* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE33* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL34* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS35* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)36* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT37* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY38* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF39* SUCH DAMAGE.40*/4142/*43* FPU subroutines.44*/4546#include <sys/types.h>47#include <sys/systm.h>4849#include <machine/fpu.h>5051#include <powerpc/fpu/fpu_arith.h>52#include <powerpc/fpu/fpu_emu.h>5354/*55* Shift the given number right rsh bits. Any bits that `fall off' will get56* shoved into the sticky field; we return the resulting sticky. Note that57* shifting NaNs is legal (this will never shift all bits out); a NaN's58* sticky field is ignored anyway.59*/60int61fpu_shr(struct fpn *fp, int rsh)62{63u_int m0, m1, m2, m3, s;64int lsh;6566#ifdef DIAGNOSTIC67if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp)))68panic("fpu_rightshift 1");69#endif7071m0 = fp->fp_mant[0];72m1 = fp->fp_mant[1];73m2 = fp->fp_mant[2];74m3 = fp->fp_mant[3];7576/* If shifting all the bits out, take a shortcut. */77if (rsh >= FP_NMANT) {78#ifdef DIAGNOSTIC79if ((m0 | m1 | m2 | m3) == 0)80panic("fpu_rightshift 2");81#endif82fp->fp_mant[0] = 0;83fp->fp_mant[1] = 0;84fp->fp_mant[2] = 0;85fp->fp_mant[3] = 0;86#ifdef notdef87if ((m0 | m1 | m2 | m3) == 0)88fp->fp_class = FPC_ZERO;89else90#endif91fp->fp_sticky = 1;92return (1);93}9495/* Squish out full words. */96s = fp->fp_sticky;97if (rsh >= 32 * 3) {98s |= m3 | m2 | m1;99m3 = m0, m2 = 0, m1 = 0, m0 = 0;100} else if (rsh >= 32 * 2) {101s |= m3 | m2;102m3 = m1, m2 = m0, m1 = 0, m0 = 0;103} else if (rsh >= 32) {104s |= m3;105m3 = m2, m2 = m1, m1 = m0, m0 = 0;106}107108/* Handle any remaining partial word. */109if ((rsh &= 31) != 0) {110lsh = 32 - rsh;111s |= m3 << lsh;112m3 = (m3 >> rsh) | (m2 << lsh);113m2 = (m2 >> rsh) | (m1 << lsh);114m1 = (m1 >> rsh) | (m0 << lsh);115m0 >>= rsh;116}117fp->fp_mant[0] = m0;118fp->fp_mant[1] = m1;119fp->fp_mant[2] = m2;120fp->fp_mant[3] = m3;121fp->fp_sticky = s;122return (s);123}124125/*126* Force a number to be normal, i.e., make its fraction have all zero127* bits before FP_1, then FP_1, then all 1 bits. This is used for denorms128* and (sometimes) for intermediate results.129*130* Internally, this may use a `supernormal' -- a number whose fp_mant131* is greater than or equal to 2.0 -- so as a side effect you can hand it132* a supernormal and it will fix it (provided fp->fp_mant[3] == 0).133*/134void135fpu_norm(struct fpn *fp)136{137u_int m0, m1, m2, m3, top, sup, nrm;138int lsh, rsh, exp;139140exp = fp->fp_exp;141m0 = fp->fp_mant[0];142m1 = fp->fp_mant[1];143m2 = fp->fp_mant[2];144m3 = fp->fp_mant[3];145146/* Handle severe subnormals with 32-bit moves. */147if (m0 == 0) {148if (m1)149m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32;150else if (m2)151m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32;152else if (m3)153m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32;154else {155fp->fp_class = FPC_ZERO;156return;157}158}159160/* Now fix any supernormal or remaining subnormal. */161nrm = FP_1;162sup = nrm << 1;163if (m0 >= sup) {164/*165* We have a supernormal number. We need to shift it right.166* We may assume m3==0.167*/168for (rsh = 1, top = m0 >> 1; top >= sup; rsh++) /* XXX slow */169top >>= 1;170exp += rsh;171lsh = 32 - rsh;172m3 = m2 << lsh;173m2 = (m2 >> rsh) | (m1 << lsh);174m1 = (m1 >> rsh) | (m0 << lsh);175m0 = top;176} else if (m0 < nrm) {177/*178* We have a regular denorm (a subnormal number), and need179* to shift it left.180*/181for (lsh = 1, top = m0 << 1; top < nrm; lsh++) /* XXX slow */182top <<= 1;183exp -= lsh;184rsh = 32 - lsh;185m0 = top | (m1 >> rsh);186m1 = (m1 << lsh) | (m2 >> rsh);187m2 = (m2 << lsh) | (m3 >> rsh);188m3 <<= lsh;189}190191fp->fp_exp = exp;192fp->fp_mant[0] = m0;193fp->fp_mant[1] = m1;194fp->fp_mant[2] = m2;195fp->fp_mant[3] = m3;196}197198/*199* Concoct a `fresh' Quiet NaN per Appendix N.200* As a side effect, we set NV (invalid) for the current exceptions.201*/202struct fpn *203fpu_newnan(struct fpemu *fe)204{205struct fpn *fp;206207fe->fe_cx |= FPSCR_VXSNAN;208fp = &fe->fe_f3;209fp->fp_class = FPC_QNAN;210fp->fp_sign = 0;211fp->fp_mant[0] = FP_1 - 1;212fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0;213DUMPFPN(FPE_REG, fp);214return (fp);215}216217218