/*-1* SPDX-License-Identifier: BSD-4-Clause2*3* Copyright (c) 2001 David E. O'Brien4* Copyright (c) 1990 The Regents of the University of California.5* All rights reserved.6*7* This code is derived from software contributed to Berkeley by8* William Jolitz.9*10* Redistribution and use in source and binary forms, with or without11* modification, are permitted provided that the following conditions12* are met:13* 1. Redistributions of source code must retain the above copyright14* notice, this list of conditions and the following disclaimer.15* 2. Redistributions in binary form must reproduce the above copyright16* notice, this list of conditions and the following disclaimer in the17* documentation and/or other materials provided with the distribution.18* 3. All advertising materials mentioning features or use of this software19* must display the following acknowledgement:20* This product includes software developed by the University of21* California, Berkeley and its contributors.22* 4. Neither the name of the University nor the names of its contributors23* may be used to endorse or promote products derived from this software24* without specific prior written permission.25*26* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND27* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE28* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE29* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE30* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL31* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS32* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)33* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT34* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY35* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF36* SUCH DAMAGE.37*/3839#ifndef _POWERPC_INCLUDE_PARAM_H_40#define _POWERPC_INCLUDE_PARAM_H_4142/*43* Machine dependent constants for PowerPC44*/4546#include <sys/_align.h>4748#ifndef MACHINE49#define MACHINE "powerpc"50#endif51#ifndef MACHINE_ARCH52#ifdef __powerpc64__53#if defined(__LITTLE_ENDIAN__)54#define MACHINE_ARCH "powerpc64le"55#else56#define MACHINE_ARCH "powerpc64"57#endif58#else59#define MACHINE_ARCH "powerpc"60#endif61#endif62#define MID_MACHINE MID_POWERPC63#ifdef __powerpc64__64#ifndef MACHINE_ARCH3265#define MACHINE_ARCH32 "powerpc"66#endif67#endif6869#ifdef SMP70#ifndef MAXCPU71#define MAXCPU 25672#endif73#else74#define MAXCPU 175#endif7677#ifndef MAXMEMDOM78#define MAXMEMDOM 879#endif8081#define ALIGNBYTES _ALIGNBYTES82#define ALIGN(p) _ALIGN(p)83/*84* ALIGNED_POINTER is a boolean macro that checks whether an address85* is valid to fetch data elements of type t from on this architecture.86* This does not reflect the optimal alignment, just the possibility87* (within reasonable limits).88*/89#define ALIGNED_POINTER(p, t) ((((uintptr_t)(p)) & (sizeof (t) - 1)) == 0)9091/*92* CACHE_LINE_SIZE is the compile-time maximum cache line size for an93* architecture. It should be used with appropriate caution.94*/95#define CACHE_LINE_SHIFT 796#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)9798#define PAGE_SHIFT 1299#define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */100#define PAGE_MASK (PAGE_SIZE - 1)101#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))102#define NPDEPG (PAGE_SIZE/(sizeof (pt_entry_t)))103104#define L1_PAGE_SIZE_SHIFT 39105#define L1_PAGE_SIZE (1UL<<L1_PAGE_SIZE_SHIFT)106#define L1_PAGE_MASK (L1_PAGE_SIZE-1)107108#define L2_PAGE_SIZE_SHIFT 30109#define L2_PAGE_SIZE (1UL<<L2_PAGE_SIZE_SHIFT)110#define L2_PAGE_MASK (L2_PAGE_SIZE-1)111112#define L3_PAGE_SIZE_SHIFT 21113#define L3_PAGE_SIZE (1UL<<L3_PAGE_SIZE_SHIFT)114#define L3_PAGE_MASK (L3_PAGE_SIZE-1)115116#define MAXPAGESIZES 3 /* maximum number of supported page sizes */117118#define RELOCATABLE_KERNEL 1 /* kernel may relocate during startup */119120#ifndef KSTACK_PAGES121#ifdef __powerpc64__122#define KSTACK_PAGES 12 /* includes pcb */123#else124#define KSTACK_PAGES 4 /* includes pcb */125#endif126#endif127#define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */128#define USPACE (kstack_pages * PAGE_SIZE) /* total size of pcb */129130#define COPYFAULT 0x1131#define FUSUFAULT 0x2132133/*134* Mach derived conversion macros135*/136#define trunc_2mpage(x) ((unsigned long)(x) & ~L3_PAGE_MASK)137#define round_2mpage(x) ((((unsigned long)(x)) + L3_PAGE_MASK) & ~L3_PAGE_MASK)138#define trunc_1gpage(x) ((unsigned long)(x) & ~L2_PAGE_MASK)139140#define powerpc_btop(x) ((x) >> PAGE_SHIFT)141#define powerpc_ptob(x) ((x) << PAGE_SHIFT)142143#define btoc(x) ((vm_offset_t)(((x)+PAGE_MASK)>>PAGE_SHIFT))144145#endif /* !_POWERPC_INCLUDE_PARAM_H_ */146147148