Path: blob/main/sys/powerpc/powermac/uninorthvar.h
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/*-1* SPDX-License-Identifier: BSD-2-Clause2*3* Copyright (C) 2002 Benno Rice.4* All rights reserved.5*6* Redistribution and use in source and binary forms, with or without7* modification, are permitted provided that the following conditions8* are met:9* 1. Redistributions of source code must retain the above copyright10* notice, this list of conditions and the following disclaimer.11* 2. Redistributions in binary form must reproduce the above copyright12* notice, this list of conditions and the following disclaimer in the13* documentation and/or other materials provided with the distribution.14*15* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR16* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES17* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.18* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,19* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,20* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;21* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,22* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR23* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF24* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.25*/2627#ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_28#define _POWERPC_POWERMAC_UNINORTHVAR_H_2930#include <dev/ofw/ofw_bus_subr.h>31#include <dev/ofw/ofw_pci.h>32#include <dev/ofw/ofwpci.h>3334struct uninorth_softc {35struct ofw_pci_softc pci_sc;36vm_offset_t sc_addr;37vm_offset_t sc_data;38int sc_ver;39int sc_skipslot;40struct mtx sc_cfg_mtx;41};4243struct unin_chip_softc {44uint64_t sc_physaddr;45uint64_t sc_size;46vm_offset_t sc_addr;47struct rman sc_mem_rman;48int sc_version;49};5051/*52* Format of a unin reg property entry.53*/54struct unin_chip_reg {55u_int32_t mr_base;56u_int32_t mr_size;57};5859/*60* Per unin device structure.61*/62struct unin_chip_devinfo {63int udi_interrupts[6];64int udi_ninterrupts;65int udi_base;66struct ofw_bus_devinfo udi_obdinfo;67struct resource_list udi_resources;68};6970/*71* Version register72*/73#define UNIN_VERS 0x07475/*76* Clock-control register77*/78#define UNIN_CLOCKCNTL 0x2079#define UNIN_CLOCKCNTL_GMAC 0x28081/*82* Power management register83*/84#define UNIN_PWR_MGMT 0x3085#define UNIN_PWR_NORMAL 0x0086#define UNIN_PWR_IDLE2 0x0187#define UNIN_PWR_SLEEP 0x0288#define UNIN_PWR_SAVE 0x0389#define UNIN_PWR_MASK 0x039091/*92* Hardware initialization state register93*/94#define UNIN_HWINIT_STATE 0x7095#define UNIN_SLEEPING 0x0196#define UNIN_RUNNING 0x029798/*99* Toggle registers100*/101#define UNIN_TOGGLE_REG 0xe0102#define UNIN_MPIC_RESET 0x2103#define UNIN_MPIC_OUTPUT_ENABLE 0x4104105extern int unin_chip_sleep(device_t dev, int idle);106extern int unin_chip_wake(device_t dev);107#endif /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */108109110