Path: blob/main/usr.sbin/cxgbetool/reg_defs_t4vf.c
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/*1* This file is _NOT_ automatically generated. It must agree with the2* Virtual Function register map definitions in t4vf_defs.h in the common3* code.4*/5struct reg_info t4vf_sge_regs[] = {6{ "SGE_KDOORBELL", 0x000, 0 },7{ "QID", 15, 17 },8{ "Priority", 14, 1 },9{ "PIDX", 0, 14 },10{ "SGE_GTS", 0x004, 0 },11{ "IngressQID", 16, 16 },12{ "TimerReg", 13, 3 },13{ "SEIntArm", 12, 1 },14{ "CIDXInc", 0, 12 },1516{ NULL, 0, 0 }17};1819struct reg_info t5vf_sge_regs[] = {20{ "SGE_VF_KDOORBELL", 0x000, 0 },21{ "QID", 15, 17 },22{ "Priority", 14, 1 },23{ "Type", 13, 1 },24{ "PIDX", 0, 13 },25{ "SGE_VF_GTS", 0x004, 0 },26{ "IngressQID", 16, 16 },27{ "TimerReg", 13, 3 },28{ "SEIntArm", 12, 1 },29{ "CIDXInc", 0, 12 },3031{ NULL, 0, 0 }32};3334struct reg_info t4vf_mps_regs[] = {35{ "MPS_VF_CTL", 0x100, 0 },36{ "TxEn", 1, 1 },37{ "RxEn", 0, 1 },3839{ "MPS_VF_STAT_TX_VF_BCAST_BYTES_L", 0x180, 0 },40{ "MPS_VF_STAT_TX_VF_BCAST_BYTES_H", 0x184, 0 },41{ "MPS_VF_STAT_TX_VF_BCAST_FRAMES_L", 0x188, 0 },42{ "MPS_VF_STAT_TX_VF_BCAST_FRAMES_H", 0x18c, 0 },4344{ "MPS_VF_STAT_TX_VF_MCAST_BYTES_L", 0x190, 0 },45{ "MPS_VF_STAT_TX_VF_MCAST_BYTES_H", 0x194, 0 },46{ "MPS_VF_STAT_TX_VF_MCAST_FRAMES_L", 0x198, 0 },47{ "MPS_VF_STAT_TX_VF_MCAST_FRAMES_H", 0x19c, 0 },4849{ "MPS_VF_STAT_TX_VF_UCAST_BYTES_L", 0x1a0, 0 },50{ "MPS_VF_STAT_TX_VF_UCAST_BYTES_H", 0x1a4, 0 },51{ "MPS_VF_STAT_TX_VF_UCAST_FRAMES_L", 0x1a8, 0 },52{ "MPS_VF_STAT_TX_VF_UCAST_FRAMES_H", 0x1ac, 0 },5354{ "MPS_VF_STAT_TX_VF_DROP_FRAMES_L", 0x1b0, 0 },55{ "MPS_VF_STAT_TX_VF_DROP_FRAMES_H", 0x1b4, 0 },5657{ "MPS_VF_STAT_TX_VF_OFFLOAD_BYTES_L", 0x1b8, 0 },58{ "MPS_VF_STAT_TX_VF_OFFLOAD_BYTES_H", 0x1bc, 0 },59{ "MPS_VF_STAT_TX_VF_OFFLOAD_FRAMES_L", 0x1c0, 0 },60{ "MPS_VF_STAT_TX_VF_OFFLOAD_FRAMES_H", 0x1c4, 0 },6162{ "MPS_VF_STAT_RX_VF_BCAST_BYTES_L", 0x1c8, 0 },63{ "MPS_VF_STAT_RX_VF_BCAST_BYTES_H", 0x1cc, 0 },64{ "MPS_VF_STAT_RX_VF_BCAST_FRAMES_L", 0x1d0, 0 },65{ "MPS_VF_STAT_RX_VF_BCAST_FRAMES_H", 0x1d4, 0 },6667{ "MPS_VF_STAT_RX_VF_MCAST_BYTES_L", 0x1d8, 0 },68{ "MPS_VF_STAT_RX_VF_MCAST_BYTES_H", 0x1dc, 0 },69{ "MPS_VF_STAT_RX_VF_MCAST_FRAMES_L", 0x1e0, 0 },70{ "MPS_VF_STAT_RX_VF_MCAST_FRAMES_H", 0x1e4, 0 },7172{ "MPS_VF_STAT_RX_VF_UCAST_BYTES_L", 0x1e8, 0 },73{ "MPS_VF_STAT_RX_VF_UCAST_BYTES_H", 0x1ec, 0 },74{ "MPS_VF_STAT_RX_VF_UCAST_FRAMES_L", 0x1f0, 0 },75{ "MPS_VF_STAT_RX_VF_UCAST_FRAMES_H", 0x1f4, 0 },7677{ "MPS_VF_STAT_RX_VF_ERR_FRAMES_L", 0x1f8, 0 },78{ "MPS_VF_STAT_RX_VF_ERR_FRAMES_H", 0x1fc, 0 },7980{ NULL, 0, 0 }81};8283struct reg_info t4vf_pl_regs[] = {84{ "PL_VF_WHOAMI", 0x200, 0 },85{ "PortxMap", 24, 3 },86{ "SourceBus", 16, 2 },87{ "SourcePF", 8, 3 },88{ "IsVF", 7, 1 },89{ "VFID", 0, 7 },9091{ NULL, 0, 0 }92};9394struct reg_info t5vf_pl_regs[] = {95{ "PL_WHOAMI", 0x200, 0 },96{ "PortxMap", 24, 3 },97{ "SourceBus", 16, 2 },98{ "SourcePF", 8, 3 },99{ "IsVF", 7, 1 },100{ "VFID", 0, 7 },101{ "PL_VF_REV", 0x204, 0 },102{ "ChipID", 4, 4 },103{ "Rev", 0, 4 },104{ "PL_VF_REVISION", 0x208, 0 },105106{ NULL, 0, 0 }107};108109struct reg_info t6vf_pl_regs[] = {110{ "PL_WHOAMI", 0x200, 0 },111{ "PortxMap", 24, 3 },112{ "SourceBus", 16, 2 },113{ "SourcePF", 9, 3 },114{ "IsVF", 8, 1 },115{ "VFID", 0, 8 },116{ "PL_VF_REV", 0x204, 0 },117{ "ChipID", 4, 4 },118{ "Rev", 0, 4 },119{ "PL_VF_REVISION", 0x208, 0 },120121{ NULL, 0, 0 }122};123124struct reg_info t7vf_pl_regs[] = {125{ "PL_WHOAMI", 0x200, 0 },126{ "PortxMap", 24, 3 },127{ "SourceBus", 16, 2 },128{ "SourcePF", 9, 3 },129{ "IsVF", 8, 1 },130{ "VFID", 0, 8 },131{ "PL_VF_REV", 0x204, 0 },132{ "ChipID", 4, 4 },133{ "Rev", 0, 4 },134{ "PL_VF_REVISION", 0x208, 0 },135136{ NULL, 0, 0 }137};138139struct reg_info t4vf_cim_regs[] = {140/*141* Note: the Mailbox Control register has read side-effects so142* the driver simply returns 0xffff for this register.143*/144{ "CIM_VF_EXT_MAILBOX_CTRL", 0x300, 0 },145{ "MBGeneric", 4, 4 },146{ "MBMsgValid", 3, 1 },147{ "MBIntReq", 2, 1 },148{ "MBOwner", 0, 2 },149{ "CIM_VF_EXT_MAILBOX_STATUS", 0x304, 0 },150{ "MBVFReady", 0, 1 },151152{ NULL, 0, 0 }153};154155struct reg_info t4vf_mbdata_regs[] = {156{ "CIM_VF_EXT_MAILBOX_DATA_00", 0x240, 0 },157{ "Return", 8, 8 },158{ "Length16", 0, 8 },159{ "CIM_VF_EXT_MAILBOX_DATA_04", 0x244, 0 },160{ "OpCode", 24, 8 },161{ "Request", 23, 1 },162{ "Read", 22, 1 },163{ "Write", 21, 1 },164{ "Execute", 20, 1 },165{ "CIM_VF_EXT_MAILBOX_DATA_08", 0x248, 0 },166{ "CIM_VF_EXT_MAILBOX_DATA_0c", 0x24c, 0 },167{ "CIM_VF_EXT_MAILBOX_DATA_10", 0x250, 0 },168{ "CIM_VF_EXT_MAILBOX_DATA_14", 0x254, 0 },169{ "CIM_VF_EXT_MAILBOX_DATA_18", 0x258, 0 },170{ "CIM_VF_EXT_MAILBOX_DATA_1c", 0x25c, 0 },171{ "CIM_VF_EXT_MAILBOX_DATA_20", 0x260, 0 },172{ "CIM_VF_EXT_MAILBOX_DATA_24", 0x264, 0 },173{ "CIM_VF_EXT_MAILBOX_DATA_28", 0x268, 0 },174{ "CIM_VF_EXT_MAILBOX_DATA_2c", 0x26c, 0 },175{ "CIM_VF_EXT_MAILBOX_DATA_30", 0x270, 0 },176{ "CIM_VF_EXT_MAILBOX_DATA_34", 0x274, 0 },177{ "CIM_VF_EXT_MAILBOX_DATA_38", 0x278, 0 },178{ "CIM_VF_EXT_MAILBOX_DATA_3c", 0x27c, 0 },179180{ NULL, 0, 0 }181};182183184