Path: blob/master/thirdparty/libwebp/src/dsp/enc_mips32.c
9913 views
// Copyright 2014 Google Inc. All Rights Reserved.1//2// Use of this source code is governed by a BSD-style license3// that can be found in the COPYING file in the root of the source4// tree. An additional intellectual property rights grant can be found5// in the file PATENTS. All contributing project authors may6// be found in the AUTHORS file in the root of the source tree.7// -----------------------------------------------------------------------------8//9// MIPS version of speed-critical encoding functions.10//11// Author(s): Djordje Pesut ([email protected])12// Jovan Zelincevic ([email protected])13// Slobodan Prijic ([email protected])1415#include "src/dsp/dsp.h"1617#if defined(WEBP_USE_MIPS32)1819#include "src/dsp/mips_macro.h"20#include "src/enc/vp8i_enc.h"21#include "src/enc/cost_enc.h"2223static const int kC1 = WEBP_TRANSFORM_AC3_C1;24static const int kC2 = WEBP_TRANSFORM_AC3_C2;2526// macro for one vertical pass in ITransformOne27// MUL macro inlined28// temp0..temp15 holds tmp[0]..tmp[15]29// A..D - offsets in bytes to load from in buffer30// TEMP0..TEMP3 - registers for corresponding tmp elements31// TEMP4..TEMP5 - temporary registers32#define VERTICAL_PASS(A, B, C, D, TEMP4, TEMP0, TEMP1, TEMP2, TEMP3) \33"lh %[temp16], " #A "(%[temp20]) \n\t" \34"lh %[temp18], " #B "(%[temp20]) \n\t" \35"lh %[temp17], " #C "(%[temp20]) \n\t" \36"lh %[temp19], " #D "(%[temp20]) \n\t" \37"addu %[" #TEMP4 "], %[temp16], %[temp18] \n\t" \38"subu %[temp16], %[temp16], %[temp18] \n\t" \39"mul %[" #TEMP0 "], %[temp17], %[kC2] \n\t" \40MUL_SHIFT_C1_IO(temp17, temp18) \41MUL_SHIFT_C1(temp18, temp19) \42"mul %[temp19], %[temp19], %[kC2] \n\t" \43"sra %[" #TEMP0 "], %[" #TEMP0 "], 16 \n\n" \44"sra %[temp19], %[temp19], 16 \n\n" \45"subu %[" #TEMP2 "], %[" #TEMP0 "], %[temp18] \n\t" \46"addu %[" #TEMP3 "], %[temp17], %[temp19] \n\t" \47"addu %[" #TEMP0 "], %[" #TEMP4 "], %[" #TEMP3 "] \n\t" \48"addu %[" #TEMP1 "], %[temp16], %[" #TEMP2 "] \n\t" \49"subu %[" #TEMP2 "], %[temp16], %[" #TEMP2 "] \n\t" \50"subu %[" #TEMP3 "], %[" #TEMP4 "], %[" #TEMP3 "] \n\t"5152// macro for one horizontal pass in ITransformOne53// MUL and STORE macros inlined54// a = clip_8b(a) is replaced with: a = max(a, 0); a = min(a, 255)55// temp0..temp15 holds tmp[0]..tmp[15]56// A - offset in bytes to load from ref and store to dst buffer57// TEMP0, TEMP4, TEMP8 and TEMP12 - registers for corresponding tmp elements58#define HORIZONTAL_PASS(A, TEMP0, TEMP4, TEMP8, TEMP12) \59"addiu %[" #TEMP0 "], %[" #TEMP0 "], 4 \n\t" \60"addu %[temp16], %[" #TEMP0 "], %[" #TEMP8 "] \n\t" \61"subu %[temp17], %[" #TEMP0 "], %[" #TEMP8 "] \n\t" \62"mul %[" #TEMP0 "], %[" #TEMP4 "], %[kC2] \n\t" \63MUL_SHIFT_C1_IO(TEMP4, TEMP8) \64MUL_SHIFT_C1(TEMP8, TEMP12) \65"mul %[" #TEMP12 "], %[" #TEMP12 "], %[kC2] \n\t" \66"sra %[" #TEMP0 "], %[" #TEMP0 "], 16 \n\t" \67"sra %[" #TEMP12 "], %[" #TEMP12 "], 16 \n\t" \68"subu %[temp18], %[" #TEMP0 "], %[" #TEMP8 "] \n\t" \69"addu %[temp19], %[" #TEMP4 "], %[" #TEMP12 "] \n\t" \70"addu %[" #TEMP0 "], %[temp16], %[temp19] \n\t" \71"addu %[" #TEMP4 "], %[temp17], %[temp18] \n\t" \72"subu %[" #TEMP8 "], %[temp17], %[temp18] \n\t" \73"subu %[" #TEMP12 "], %[temp16], %[temp19] \n\t" \74"lw %[temp20], 0(%[args]) \n\t" \75"sra %[" #TEMP0 "], %[" #TEMP0 "], 3 \n\t" \76"sra %[" #TEMP4 "], %[" #TEMP4 "], 3 \n\t" \77"sra %[" #TEMP8 "], %[" #TEMP8 "], 3 \n\t" \78"sra %[" #TEMP12 "], %[" #TEMP12 "], 3 \n\t" \79"lbu %[temp16], 0+" XSTR(BPS) "*" #A "(%[temp20]) \n\t" \80"lbu %[temp17], 1+" XSTR(BPS) "*" #A "(%[temp20]) \n\t" \81"lbu %[temp18], 2+" XSTR(BPS) "*" #A "(%[temp20]) \n\t" \82"lbu %[temp19], 3+" XSTR(BPS) "*" #A "(%[temp20]) \n\t" \83"addu %[" #TEMP0 "], %[temp16], %[" #TEMP0 "] \n\t" \84"addu %[" #TEMP4 "], %[temp17], %[" #TEMP4 "] \n\t" \85"addu %[" #TEMP8 "], %[temp18], %[" #TEMP8 "] \n\t" \86"addu %[" #TEMP12 "], %[temp19], %[" #TEMP12 "] \n\t" \87"slt %[temp16], %[" #TEMP0 "], $zero \n\t" \88"slt %[temp17], %[" #TEMP4 "], $zero \n\t" \89"slt %[temp18], %[" #TEMP8 "], $zero \n\t" \90"slt %[temp19], %[" #TEMP12 "], $zero \n\t" \91"movn %[" #TEMP0 "], $zero, %[temp16] \n\t" \92"movn %[" #TEMP4 "], $zero, %[temp17] \n\t" \93"movn %[" #TEMP8 "], $zero, %[temp18] \n\t" \94"movn %[" #TEMP12 "], $zero, %[temp19] \n\t" \95"addiu %[temp20], $zero, 255 \n\t" \96"slt %[temp16], %[" #TEMP0 "], %[temp20] \n\t" \97"slt %[temp17], %[" #TEMP4 "], %[temp20] \n\t" \98"slt %[temp18], %[" #TEMP8 "], %[temp20] \n\t" \99"slt %[temp19], %[" #TEMP12 "], %[temp20] \n\t" \100"movz %[" #TEMP0 "], %[temp20], %[temp16] \n\t" \101"movz %[" #TEMP4 "], %[temp20], %[temp17] \n\t" \102"lw %[temp16], 8(%[args]) \n\t" \103"movz %[" #TEMP8 "], %[temp20], %[temp18] \n\t" \104"movz %[" #TEMP12 "], %[temp20], %[temp19] \n\t" \105"sb %[" #TEMP0 "], 0+" XSTR(BPS) "*" #A "(%[temp16]) \n\t" \106"sb %[" #TEMP4 "], 1+" XSTR(BPS) "*" #A "(%[temp16]) \n\t" \107"sb %[" #TEMP8 "], 2+" XSTR(BPS) "*" #A "(%[temp16]) \n\t" \108"sb %[" #TEMP12 "], 3+" XSTR(BPS) "*" #A "(%[temp16]) \n\t"109110// Does one or two inverse transforms.111static WEBP_INLINE void ITransformOne_MIPS32(const uint8_t* WEBP_RESTRICT ref,112const int16_t* WEBP_RESTRICT in,113uint8_t* WEBP_RESTRICT dst) {114int temp0, temp1, temp2, temp3, temp4, temp5, temp6;115int temp7, temp8, temp9, temp10, temp11, temp12, temp13;116int temp14, temp15, temp16, temp17, temp18, temp19, temp20;117const int* args[3] = {(const int*)ref, (const int*)in, (const int*)dst};118119__asm__ volatile(120"lw %[temp20], 4(%[args]) \n\t"121VERTICAL_PASS(0, 16, 8, 24, temp4, temp0, temp1, temp2, temp3)122VERTICAL_PASS(2, 18, 10, 26, temp8, temp4, temp5, temp6, temp7)123VERTICAL_PASS(4, 20, 12, 28, temp12, temp8, temp9, temp10, temp11)124VERTICAL_PASS(6, 22, 14, 30, temp20, temp12, temp13, temp14, temp15)125126HORIZONTAL_PASS(0, temp0, temp4, temp8, temp12)127HORIZONTAL_PASS(1, temp1, temp5, temp9, temp13)128HORIZONTAL_PASS(2, temp2, temp6, temp10, temp14)129HORIZONTAL_PASS(3, temp3, temp7, temp11, temp15)130131: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),132[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),133[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),134[temp9]"=&r"(temp9), [temp10]"=&r"(temp10), [temp11]"=&r"(temp11),135[temp12]"=&r"(temp12), [temp13]"=&r"(temp13), [temp14]"=&r"(temp14),136[temp15]"=&r"(temp15), [temp16]"=&r"(temp16), [temp17]"=&r"(temp17),137[temp18]"=&r"(temp18), [temp19]"=&r"(temp19), [temp20]"=&r"(temp20)138: [args]"r"(args), [kC1]"r"(kC1), [kC2]"r"(kC2)139: "memory", "hi", "lo"140);141}142143static void ITransform_MIPS32(const uint8_t* WEBP_RESTRICT ref,144const int16_t* WEBP_RESTRICT in,145uint8_t* WEBP_RESTRICT dst, int do_two) {146ITransformOne_MIPS32(ref, in, dst);147if (do_two) {148ITransformOne_MIPS32(ref + 4, in + 16, dst + 4);149}150}151152#undef VERTICAL_PASS153#undef HORIZONTAL_PASS154155// macro for one pass through for loop in QuantizeBlock156// QUANTDIV macro inlined157// J - offset in bytes (kZigzag[n] * 2)158// K - offset in bytes (kZigzag[n] * 4)159// N - offset in bytes (n * 2)160#define QUANTIZE_ONE(J, K, N) \161"lh %[temp0], " #J "(%[ppin]) \n\t" \162"lhu %[temp1], " #J "(%[ppsharpen]) \n\t" \163"lw %[temp2], " #K "(%[ppzthresh]) \n\t" \164"sra %[sign], %[temp0], 15 \n\t" \165"xor %[coeff], %[temp0], %[sign] \n\t" \166"subu %[coeff], %[coeff], %[sign] \n\t" \167"addu %[coeff], %[coeff], %[temp1] \n\t" \168"slt %[temp4], %[temp2], %[coeff] \n\t" \169"addiu %[temp5], $zero, 0 \n\t" \170"addiu %[level], $zero, 0 \n\t" \171"beqz %[temp4], 2f \n\t" \172"lhu %[temp1], " #J "(%[ppiq]) \n\t" \173"lw %[temp2], " #K "(%[ppbias]) \n\t" \174"lhu %[temp3], " #J "(%[ppq]) \n\t" \175"mul %[level], %[coeff], %[temp1] \n\t" \176"addu %[level], %[level], %[temp2] \n\t" \177"sra %[level], %[level], 17 \n\t" \178"slt %[temp4], %[max_level], %[level] \n\t" \179"movn %[level], %[max_level], %[temp4] \n\t" \180"xor %[level], %[level], %[sign] \n\t" \181"subu %[level], %[level], %[sign] \n\t" \182"mul %[temp5], %[level], %[temp3] \n\t" \183"2: \n\t" \184"sh %[temp5], " #J "(%[ppin]) \n\t" \185"sh %[level], " #N "(%[pout]) \n\t"186187static int QuantizeBlock_MIPS32(int16_t in[16], int16_t out[16],188const VP8Matrix* const mtx) {189int temp0, temp1, temp2, temp3, temp4, temp5;190int sign, coeff, level, i;191int max_level = MAX_LEVEL;192193int16_t* ppin = &in[0];194int16_t* pout = &out[0];195const uint16_t* ppsharpen = &mtx->sharpen_[0];196const uint32_t* ppzthresh = &mtx->zthresh_[0];197const uint16_t* ppq = &mtx->q_[0];198const uint16_t* ppiq = &mtx->iq_[0];199const uint32_t* ppbias = &mtx->bias_[0];200201__asm__ volatile(202QUANTIZE_ONE( 0, 0, 0)203QUANTIZE_ONE( 2, 4, 2)204QUANTIZE_ONE( 8, 16, 4)205QUANTIZE_ONE(16, 32, 6)206QUANTIZE_ONE(10, 20, 8)207QUANTIZE_ONE( 4, 8, 10)208QUANTIZE_ONE( 6, 12, 12)209QUANTIZE_ONE(12, 24, 14)210QUANTIZE_ONE(18, 36, 16)211QUANTIZE_ONE(24, 48, 18)212QUANTIZE_ONE(26, 52, 20)213QUANTIZE_ONE(20, 40, 22)214QUANTIZE_ONE(14, 28, 24)215QUANTIZE_ONE(22, 44, 26)216QUANTIZE_ONE(28, 56, 28)217QUANTIZE_ONE(30, 60, 30)218219: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1),220[temp2]"=&r"(temp2), [temp3]"=&r"(temp3),221[temp4]"=&r"(temp4), [temp5]"=&r"(temp5),222[sign]"=&r"(sign), [coeff]"=&r"(coeff),223[level]"=&r"(level)224: [pout]"r"(pout), [ppin]"r"(ppin),225[ppiq]"r"(ppiq), [max_level]"r"(max_level),226[ppbias]"r"(ppbias), [ppzthresh]"r"(ppzthresh),227[ppsharpen]"r"(ppsharpen), [ppq]"r"(ppq)228: "memory", "hi", "lo"229);230231// moved out from macro to increase possibility for earlier breaking232for (i = 15; i >= 0; i--) {233if (out[i]) return 1;234}235return 0;236}237238static int Quantize2Blocks_MIPS32(int16_t in[32], int16_t out[32],239const VP8Matrix* WEBP_RESTRICT const mtx) {240int nz;241nz = QuantizeBlock_MIPS32(in + 0 * 16, out + 0 * 16, mtx) << 0;242nz |= QuantizeBlock_MIPS32(in + 1 * 16, out + 1 * 16, mtx) << 1;243return nz;244}245246#undef QUANTIZE_ONE247248// macro for one horizontal pass in Disto4x4 (TTransform)249// two calls of function TTransform are merged into single one250// A - offset in bytes to load from a and b buffers251// E..H - offsets in bytes to store first results to tmp buffer252// E1..H1 - offsets in bytes to store second results to tmp buffer253#define HORIZONTAL_PASS(A, E, F, G, H, E1, F1, G1, H1) \254"lbu %[temp0], 0+" XSTR(BPS) "*" #A "(%[a]) \n\t" \255"lbu %[temp1], 1+" XSTR(BPS) "*" #A "(%[a]) \n\t" \256"lbu %[temp2], 2+" XSTR(BPS) "*" #A "(%[a]) \n\t" \257"lbu %[temp3], 3+" XSTR(BPS) "*" #A "(%[a]) \n\t" \258"lbu %[temp4], 0+" XSTR(BPS) "*" #A "(%[b]) \n\t" \259"lbu %[temp5], 1+" XSTR(BPS) "*" #A "(%[b]) \n\t" \260"lbu %[temp6], 2+" XSTR(BPS) "*" #A "(%[b]) \n\t" \261"lbu %[temp7], 3+" XSTR(BPS) "*" #A "(%[b]) \n\t" \262"addu %[temp8], %[temp0], %[temp2] \n\t" \263"subu %[temp0], %[temp0], %[temp2] \n\t" \264"addu %[temp2], %[temp1], %[temp3] \n\t" \265"subu %[temp1], %[temp1], %[temp3] \n\t" \266"addu %[temp3], %[temp4], %[temp6] \n\t" \267"subu %[temp4], %[temp4], %[temp6] \n\t" \268"addu %[temp6], %[temp5], %[temp7] \n\t" \269"subu %[temp5], %[temp5], %[temp7] \n\t" \270"addu %[temp7], %[temp8], %[temp2] \n\t" \271"subu %[temp2], %[temp8], %[temp2] \n\t" \272"addu %[temp8], %[temp0], %[temp1] \n\t" \273"subu %[temp0], %[temp0], %[temp1] \n\t" \274"addu %[temp1], %[temp3], %[temp6] \n\t" \275"subu %[temp3], %[temp3], %[temp6] \n\t" \276"addu %[temp6], %[temp4], %[temp5] \n\t" \277"subu %[temp4], %[temp4], %[temp5] \n\t" \278"sw %[temp7], " #E "(%[tmp]) \n\t" \279"sw %[temp2], " #H "(%[tmp]) \n\t" \280"sw %[temp8], " #F "(%[tmp]) \n\t" \281"sw %[temp0], " #G "(%[tmp]) \n\t" \282"sw %[temp1], " #E1 "(%[tmp]) \n\t" \283"sw %[temp3], " #H1 "(%[tmp]) \n\t" \284"sw %[temp6], " #F1 "(%[tmp]) \n\t" \285"sw %[temp4], " #G1 "(%[tmp]) \n\t"286287// macro for one vertical pass in Disto4x4 (TTransform)288// two calls of function TTransform are merged into single one289// since only one accu is available in mips32r1 instruction set290// first is done second call of function TTransform and after291// that first one.292// const int sum1 = TTransform(a, w);293// const int sum2 = TTransform(b, w);294// return abs(sum2 - sum1) >> 5;295// (sum2 - sum1) is calculated with madds (sub2) and msubs (sub1)296// A..D - offsets in bytes to load first results from tmp buffer297// A1..D1 - offsets in bytes to load second results from tmp buffer298// E..H - offsets in bytes to load from w buffer299#define VERTICAL_PASS(A, B, C, D, A1, B1, C1, D1, E, F, G, H) \300"lw %[temp0], " #A1 "(%[tmp]) \n\t" \301"lw %[temp1], " #C1 "(%[tmp]) \n\t" \302"lw %[temp2], " #B1 "(%[tmp]) \n\t" \303"lw %[temp3], " #D1 "(%[tmp]) \n\t" \304"addu %[temp8], %[temp0], %[temp1] \n\t" \305"subu %[temp0], %[temp0], %[temp1] \n\t" \306"addu %[temp1], %[temp2], %[temp3] \n\t" \307"subu %[temp2], %[temp2], %[temp3] \n\t" \308"addu %[temp3], %[temp8], %[temp1] \n\t" \309"subu %[temp8], %[temp8], %[temp1] \n\t" \310"addu %[temp1], %[temp0], %[temp2] \n\t" \311"subu %[temp0], %[temp0], %[temp2] \n\t" \312"sra %[temp4], %[temp3], 31 \n\t" \313"sra %[temp5], %[temp1], 31 \n\t" \314"sra %[temp6], %[temp0], 31 \n\t" \315"sra %[temp7], %[temp8], 31 \n\t" \316"xor %[temp3], %[temp3], %[temp4] \n\t" \317"xor %[temp1], %[temp1], %[temp5] \n\t" \318"xor %[temp0], %[temp0], %[temp6] \n\t" \319"xor %[temp8], %[temp8], %[temp7] \n\t" \320"subu %[temp3], %[temp3], %[temp4] \n\t" \321"subu %[temp1], %[temp1], %[temp5] \n\t" \322"subu %[temp0], %[temp0], %[temp6] \n\t" \323"subu %[temp8], %[temp8], %[temp7] \n\t" \324"lhu %[temp4], " #E "(%[w]) \n\t" \325"lhu %[temp5], " #F "(%[w]) \n\t" \326"lhu %[temp6], " #G "(%[w]) \n\t" \327"lhu %[temp7], " #H "(%[w]) \n\t" \328"madd %[temp4], %[temp3] \n\t" \329"madd %[temp5], %[temp1] \n\t" \330"madd %[temp6], %[temp0] \n\t" \331"madd %[temp7], %[temp8] \n\t" \332"lw %[temp0], " #A "(%[tmp]) \n\t" \333"lw %[temp1], " #C "(%[tmp]) \n\t" \334"lw %[temp2], " #B "(%[tmp]) \n\t" \335"lw %[temp3], " #D "(%[tmp]) \n\t" \336"addu %[temp8], %[temp0], %[temp1] \n\t" \337"subu %[temp0], %[temp0], %[temp1] \n\t" \338"addu %[temp1], %[temp2], %[temp3] \n\t" \339"subu %[temp2], %[temp2], %[temp3] \n\t" \340"addu %[temp3], %[temp8], %[temp1] \n\t" \341"subu %[temp1], %[temp8], %[temp1] \n\t" \342"addu %[temp8], %[temp0], %[temp2] \n\t" \343"subu %[temp0], %[temp0], %[temp2] \n\t" \344"sra %[temp2], %[temp3], 31 \n\t" \345"xor %[temp3], %[temp3], %[temp2] \n\t" \346"subu %[temp3], %[temp3], %[temp2] \n\t" \347"msub %[temp4], %[temp3] \n\t" \348"sra %[temp2], %[temp8], 31 \n\t" \349"sra %[temp3], %[temp0], 31 \n\t" \350"sra %[temp4], %[temp1], 31 \n\t" \351"xor %[temp8], %[temp8], %[temp2] \n\t" \352"xor %[temp0], %[temp0], %[temp3] \n\t" \353"xor %[temp1], %[temp1], %[temp4] \n\t" \354"subu %[temp8], %[temp8], %[temp2] \n\t" \355"subu %[temp0], %[temp0], %[temp3] \n\t" \356"subu %[temp1], %[temp1], %[temp4] \n\t" \357"msub %[temp5], %[temp8] \n\t" \358"msub %[temp6], %[temp0] \n\t" \359"msub %[temp7], %[temp1] \n\t"360361static int Disto4x4_MIPS32(const uint8_t* WEBP_RESTRICT const a,362const uint8_t* WEBP_RESTRICT const b,363const uint16_t* WEBP_RESTRICT const w) {364int tmp[32];365int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8;366367__asm__ volatile(368HORIZONTAL_PASS(0, 0, 4, 8, 12, 64, 68, 72, 76)369HORIZONTAL_PASS(1, 16, 20, 24, 28, 80, 84, 88, 92)370HORIZONTAL_PASS(2, 32, 36, 40, 44, 96, 100, 104, 108)371HORIZONTAL_PASS(3, 48, 52, 56, 60, 112, 116, 120, 124)372"mthi $zero \n\t"373"mtlo $zero \n\t"374VERTICAL_PASS( 0, 16, 32, 48, 64, 80, 96, 112, 0, 8, 16, 24)375VERTICAL_PASS( 4, 20, 36, 52, 68, 84, 100, 116, 2, 10, 18, 26)376VERTICAL_PASS( 8, 24, 40, 56, 72, 88, 104, 120, 4, 12, 20, 28)377VERTICAL_PASS(12, 28, 44, 60, 76, 92, 108, 124, 6, 14, 22, 30)378"mflo %[temp0] \n\t"379"sra %[temp1], %[temp0], 31 \n\t"380"xor %[temp0], %[temp0], %[temp1] \n\t"381"subu %[temp0], %[temp0], %[temp1] \n\t"382"sra %[temp0], %[temp0], 5 \n\t"383384: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),385[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),386[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8)387: [a]"r"(a), [b]"r"(b), [w]"r"(w), [tmp]"r"(tmp)388: "memory", "hi", "lo"389);390391return temp0;392}393394#undef VERTICAL_PASS395#undef HORIZONTAL_PASS396397static int Disto16x16_MIPS32(const uint8_t* WEBP_RESTRICT const a,398const uint8_t* WEBP_RESTRICT const b,399const uint16_t* WEBP_RESTRICT const w) {400int D = 0;401int x, y;402for (y = 0; y < 16 * BPS; y += 4 * BPS) {403for (x = 0; x < 16; x += 4) {404D += Disto4x4_MIPS32(a + x + y, b + x + y, w);405}406}407return D;408}409410// macro for one horizontal pass in FTransform411// temp0..temp15 holds tmp[0]..tmp[15]412// A - offset in bytes to load from src and ref buffers413// TEMP0..TEMP3 - registers for corresponding tmp elements414#define HORIZONTAL_PASS(A, TEMP0, TEMP1, TEMP2, TEMP3) \415"lw %[" #TEMP1 "], 0(%[args]) \n\t" \416"lw %[" #TEMP2 "], 4(%[args]) \n\t" \417"lbu %[temp16], 0+" XSTR(BPS) "*" #A "(%[" #TEMP1 "]) \n\t" \418"lbu %[temp17], 0+" XSTR(BPS) "*" #A "(%[" #TEMP2 "]) \n\t" \419"lbu %[temp18], 1+" XSTR(BPS) "*" #A "(%[" #TEMP1 "]) \n\t" \420"lbu %[temp19], 1+" XSTR(BPS) "*" #A "(%[" #TEMP2 "]) \n\t" \421"subu %[temp20], %[temp16], %[temp17] \n\t" \422"lbu %[temp16], 2+" XSTR(BPS) "*" #A "(%[" #TEMP1 "]) \n\t" \423"lbu %[temp17], 2+" XSTR(BPS) "*" #A "(%[" #TEMP2 "]) \n\t" \424"subu %[" #TEMP0 "], %[temp18], %[temp19] \n\t" \425"lbu %[temp18], 3+" XSTR(BPS) "*" #A "(%[" #TEMP1 "]) \n\t" \426"lbu %[temp19], 3+" XSTR(BPS) "*" #A "(%[" #TEMP2 "]) \n\t" \427"subu %[" #TEMP1 "], %[temp16], %[temp17] \n\t" \428"subu %[" #TEMP2 "], %[temp18], %[temp19] \n\t" \429"addu %[" #TEMP3 "], %[temp20], %[" #TEMP2 "] \n\t" \430"subu %[" #TEMP2 "], %[temp20], %[" #TEMP2 "] \n\t" \431"addu %[temp20], %[" #TEMP0 "], %[" #TEMP1 "] \n\t" \432"subu %[" #TEMP0 "], %[" #TEMP0 "], %[" #TEMP1 "] \n\t" \433"mul %[temp16], %[" #TEMP2 "], %[c5352] \n\t" \434"mul %[temp17], %[" #TEMP2 "], %[c2217] \n\t" \435"mul %[temp18], %[" #TEMP0 "], %[c5352] \n\t" \436"mul %[temp19], %[" #TEMP0 "], %[c2217] \n\t" \437"addu %[" #TEMP1 "], %[" #TEMP3 "], %[temp20] \n\t" \438"subu %[temp20], %[" #TEMP3 "], %[temp20] \n\t" \439"sll %[" #TEMP0 "], %[" #TEMP1 "], 3 \n\t" \440"sll %[" #TEMP2 "], %[temp20], 3 \n\t" \441"addiu %[temp16], %[temp16], 1812 \n\t" \442"addiu %[temp17], %[temp17], 937 \n\t" \443"addu %[temp16], %[temp16], %[temp19] \n\t" \444"subu %[temp17], %[temp17], %[temp18] \n\t" \445"sra %[" #TEMP1 "], %[temp16], 9 \n\t" \446"sra %[" #TEMP3 "], %[temp17], 9 \n\t"447448// macro for one vertical pass in FTransform449// temp0..temp15 holds tmp[0]..tmp[15]450// A..D - offsets in bytes to store to out buffer451// TEMP0, TEMP4, TEMP8 and TEMP12 - registers for corresponding tmp elements452#define VERTICAL_PASS(A, B, C, D, TEMP0, TEMP4, TEMP8, TEMP12) \453"addu %[temp16], %[" #TEMP0 "], %[" #TEMP12 "] \n\t" \454"subu %[temp19], %[" #TEMP0 "], %[" #TEMP12 "] \n\t" \455"addu %[temp17], %[" #TEMP4 "], %[" #TEMP8 "] \n\t" \456"subu %[temp18], %[" #TEMP4 "], %[" #TEMP8 "] \n\t" \457"mul %[" #TEMP8 "], %[temp19], %[c2217] \n\t" \458"mul %[" #TEMP12 "], %[temp18], %[c2217] \n\t" \459"mul %[" #TEMP4 "], %[temp19], %[c5352] \n\t" \460"mul %[temp18], %[temp18], %[c5352] \n\t" \461"addiu %[temp16], %[temp16], 7 \n\t" \462"addu %[" #TEMP0 "], %[temp16], %[temp17] \n\t" \463"sra %[" #TEMP0 "], %[" #TEMP0 "], 4 \n\t" \464"addu %[" #TEMP12 "], %[" #TEMP12 "], %[" #TEMP4 "] \n\t" \465"subu %[" #TEMP4 "], %[temp16], %[temp17] \n\t" \466"sra %[" #TEMP4 "], %[" #TEMP4 "], 4 \n\t" \467"addiu %[" #TEMP8 "], %[" #TEMP8 "], 30000 \n\t" \468"addiu %[" #TEMP12 "], %[" #TEMP12 "], 12000 \n\t" \469"addiu %[" #TEMP8 "], %[" #TEMP8 "], 21000 \n\t" \470"subu %[" #TEMP8 "], %[" #TEMP8 "], %[temp18] \n\t" \471"sra %[" #TEMP12 "], %[" #TEMP12 "], 16 \n\t" \472"sra %[" #TEMP8 "], %[" #TEMP8 "], 16 \n\t" \473"addiu %[temp16], %[" #TEMP12 "], 1 \n\t" \474"movn %[" #TEMP12 "], %[temp16], %[temp19] \n\t" \475"sh %[" #TEMP0 "], " #A "(%[temp20]) \n\t" \476"sh %[" #TEMP4 "], " #C "(%[temp20]) \n\t" \477"sh %[" #TEMP8 "], " #D "(%[temp20]) \n\t" \478"sh %[" #TEMP12 "], " #B "(%[temp20]) \n\t"479480static void FTransform_MIPS32(const uint8_t* WEBP_RESTRICT src,481const uint8_t* WEBP_RESTRICT ref,482int16_t* WEBP_RESTRICT out) {483int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8;484int temp9, temp10, temp11, temp12, temp13, temp14, temp15, temp16;485int temp17, temp18, temp19, temp20;486const int c2217 = 2217;487const int c5352 = 5352;488const int* const args[3] =489{ (const int*)src, (const int*)ref, (const int*)out };490491__asm__ volatile(492HORIZONTAL_PASS(0, temp0, temp1, temp2, temp3)493HORIZONTAL_PASS(1, temp4, temp5, temp6, temp7)494HORIZONTAL_PASS(2, temp8, temp9, temp10, temp11)495HORIZONTAL_PASS(3, temp12, temp13, temp14, temp15)496"lw %[temp20], 8(%[args]) \n\t"497VERTICAL_PASS(0, 8, 16, 24, temp0, temp4, temp8, temp12)498VERTICAL_PASS(2, 10, 18, 26, temp1, temp5, temp9, temp13)499VERTICAL_PASS(4, 12, 20, 28, temp2, temp6, temp10, temp14)500VERTICAL_PASS(6, 14, 22, 30, temp3, temp7, temp11, temp15)501502: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),503[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),504[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),505[temp9]"=&r"(temp9), [temp10]"=&r"(temp10), [temp11]"=&r"(temp11),506[temp12]"=&r"(temp12), [temp13]"=&r"(temp13), [temp14]"=&r"(temp14),507[temp15]"=&r"(temp15), [temp16]"=&r"(temp16), [temp17]"=&r"(temp17),508[temp18]"=&r"(temp18), [temp19]"=&r"(temp19), [temp20]"=&r"(temp20)509: [args]"r"(args), [c2217]"r"(c2217), [c5352]"r"(c5352)510: "memory", "hi", "lo"511);512}513514#undef VERTICAL_PASS515#undef HORIZONTAL_PASS516517#if !defined(WORK_AROUND_GCC)518519#define GET_SSE_INNER(A, B, C, D) \520"lbu %[temp0], " #A "(%[a]) \n\t" \521"lbu %[temp1], " #A "(%[b]) \n\t" \522"lbu %[temp2], " #B "(%[a]) \n\t" \523"lbu %[temp3], " #B "(%[b]) \n\t" \524"lbu %[temp4], " #C "(%[a]) \n\t" \525"lbu %[temp5], " #C "(%[b]) \n\t" \526"lbu %[temp6], " #D "(%[a]) \n\t" \527"lbu %[temp7], " #D "(%[b]) \n\t" \528"subu %[temp0], %[temp0], %[temp1] \n\t" \529"subu %[temp2], %[temp2], %[temp3] \n\t" \530"subu %[temp4], %[temp4], %[temp5] \n\t" \531"subu %[temp6], %[temp6], %[temp7] \n\t" \532"madd %[temp0], %[temp0] \n\t" \533"madd %[temp2], %[temp2] \n\t" \534"madd %[temp4], %[temp4] \n\t" \535"madd %[temp6], %[temp6] \n\t"536537#define GET_SSE(A, B, C, D) \538GET_SSE_INNER(A, A + 1, A + 2, A + 3) \539GET_SSE_INNER(B, B + 1, B + 2, B + 3) \540GET_SSE_INNER(C, C + 1, C + 2, C + 3) \541GET_SSE_INNER(D, D + 1, D + 2, D + 3)542543static int SSE16x16_MIPS32(const uint8_t* WEBP_RESTRICT a,544const uint8_t* WEBP_RESTRICT b) {545int count;546int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;547548__asm__ volatile(549"mult $zero, $zero \n\t"550551GET_SSE( 0 * BPS, 4 + 0 * BPS, 8 + 0 * BPS, 12 + 0 * BPS)552GET_SSE( 1 * BPS, 4 + 1 * BPS, 8 + 1 * BPS, 12 + 1 * BPS)553GET_SSE( 2 * BPS, 4 + 2 * BPS, 8 + 2 * BPS, 12 + 2 * BPS)554GET_SSE( 3 * BPS, 4 + 3 * BPS, 8 + 3 * BPS, 12 + 3 * BPS)555GET_SSE( 4 * BPS, 4 + 4 * BPS, 8 + 4 * BPS, 12 + 4 * BPS)556GET_SSE( 5 * BPS, 4 + 5 * BPS, 8 + 5 * BPS, 12 + 5 * BPS)557GET_SSE( 6 * BPS, 4 + 6 * BPS, 8 + 6 * BPS, 12 + 6 * BPS)558GET_SSE( 7 * BPS, 4 + 7 * BPS, 8 + 7 * BPS, 12 + 7 * BPS)559GET_SSE( 8 * BPS, 4 + 8 * BPS, 8 + 8 * BPS, 12 + 8 * BPS)560GET_SSE( 9 * BPS, 4 + 9 * BPS, 8 + 9 * BPS, 12 + 9 * BPS)561GET_SSE(10 * BPS, 4 + 10 * BPS, 8 + 10 * BPS, 12 + 10 * BPS)562GET_SSE(11 * BPS, 4 + 11 * BPS, 8 + 11 * BPS, 12 + 11 * BPS)563GET_SSE(12 * BPS, 4 + 12 * BPS, 8 + 12 * BPS, 12 + 12 * BPS)564GET_SSE(13 * BPS, 4 + 13 * BPS, 8 + 13 * BPS, 12 + 13 * BPS)565GET_SSE(14 * BPS, 4 + 14 * BPS, 8 + 14 * BPS, 12 + 14 * BPS)566GET_SSE(15 * BPS, 4 + 15 * BPS, 8 + 15 * BPS, 12 + 15 * BPS)567568"mflo %[count] \n\t"569: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),570[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),571[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count)572: [a]"r"(a), [b]"r"(b)573: "memory", "hi", "lo"574);575return count;576}577578static int SSE16x8_MIPS32(const uint8_t* WEBP_RESTRICT a,579const uint8_t* WEBP_RESTRICT b) {580int count;581int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;582583__asm__ volatile(584"mult $zero, $zero \n\t"585586GET_SSE( 0 * BPS, 4 + 0 * BPS, 8 + 0 * BPS, 12 + 0 * BPS)587GET_SSE( 1 * BPS, 4 + 1 * BPS, 8 + 1 * BPS, 12 + 1 * BPS)588GET_SSE( 2 * BPS, 4 + 2 * BPS, 8 + 2 * BPS, 12 + 2 * BPS)589GET_SSE( 3 * BPS, 4 + 3 * BPS, 8 + 3 * BPS, 12 + 3 * BPS)590GET_SSE( 4 * BPS, 4 + 4 * BPS, 8 + 4 * BPS, 12 + 4 * BPS)591GET_SSE( 5 * BPS, 4 + 5 * BPS, 8 + 5 * BPS, 12 + 5 * BPS)592GET_SSE( 6 * BPS, 4 + 6 * BPS, 8 + 6 * BPS, 12 + 6 * BPS)593GET_SSE( 7 * BPS, 4 + 7 * BPS, 8 + 7 * BPS, 12 + 7 * BPS)594595"mflo %[count] \n\t"596: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),597[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),598[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count)599: [a]"r"(a), [b]"r"(b)600: "memory", "hi", "lo"601);602return count;603}604605static int SSE8x8_MIPS32(const uint8_t* WEBP_RESTRICT a,606const uint8_t* WEBP_RESTRICT b) {607int count;608int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;609610__asm__ volatile(611"mult $zero, $zero \n\t"612613GET_SSE(0 * BPS, 4 + 0 * BPS, 1 * BPS, 4 + 1 * BPS)614GET_SSE(2 * BPS, 4 + 2 * BPS, 3 * BPS, 4 + 3 * BPS)615GET_SSE(4 * BPS, 4 + 4 * BPS, 5 * BPS, 4 + 5 * BPS)616GET_SSE(6 * BPS, 4 + 6 * BPS, 7 * BPS, 4 + 7 * BPS)617618"mflo %[count] \n\t"619: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),620[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),621[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count)622: [a]"r"(a), [b]"r"(b)623: "memory", "hi", "lo"624);625return count;626}627628static int SSE4x4_MIPS32(const uint8_t* WEBP_RESTRICT a,629const uint8_t* WEBP_RESTRICT b) {630int count;631int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;632633__asm__ volatile(634"mult $zero, $zero \n\t"635636GET_SSE(0 * BPS, 1 * BPS, 2 * BPS, 3 * BPS)637638"mflo %[count] \n\t"639: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),640[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),641[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [count]"=&r"(count)642: [a]"r"(a), [b]"r"(b)643: "memory", "hi", "lo"644);645return count;646}647648#undef GET_SSE649#undef GET_SSE_INNER650651#endif // !WORK_AROUND_GCC652653//------------------------------------------------------------------------------654// Entry point655656extern void VP8EncDspInitMIPS32(void);657658WEBP_TSAN_IGNORE_FUNCTION void VP8EncDspInitMIPS32(void) {659VP8ITransform = ITransform_MIPS32;660VP8FTransform = FTransform_MIPS32;661662VP8EncQuantizeBlock = QuantizeBlock_MIPS32;663VP8EncQuantize2Blocks = Quantize2Blocks_MIPS32;664665VP8TDisto4x4 = Disto4x4_MIPS32;666VP8TDisto16x16 = Disto16x16_MIPS32;667668#if !defined(WORK_AROUND_GCC)669VP8SSE16x16 = SSE16x16_MIPS32;670VP8SSE8x8 = SSE8x8_MIPS32;671VP8SSE16x8 = SSE16x8_MIPS32;672VP8SSE4x4 = SSE4x4_MIPS32;673#endif674}675676#else // !WEBP_USE_MIPS32677678WEBP_DSP_INIT_STUB(VP8EncDspInitMIPS32)679680#endif // WEBP_USE_MIPS32681682683