Path: blob/master/thirdparty/libwebp/src/dsp/enc_mips_dsp_r2.c
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// Copyright 2014 Google Inc. All Rights Reserved.1//2// Use of this source code is governed by a BSD-style license3// that can be found in the COPYING file in the root of the source4// tree. An additional intellectual property rights grant can be found5// in the file PATENTS. All contributing project authors may6// be found in the AUTHORS file in the root of the source tree.7// -----------------------------------------------------------------------------8//9// MIPS version of speed-critical encoding functions.10//11// Author(s): Darko Laus ([email protected])12// Mirko Raus ([email protected])1314#include "src/dsp/dsp.h"1516#if defined(WEBP_USE_MIPS_DSP_R2)1718#include "src/dsp/mips_macro.h"19#include "src/enc/cost_enc.h"20#include "src/enc/vp8i_enc.h"2122static const int kC1 = WEBP_TRANSFORM_AC3_C1;23static const int kC2 = WEBP_TRANSFORM_AC3_C2;2425// O - output26// I - input (macro doesn't change it)27#define ADD_SUB_HALVES_X4(O0, O1, O2, O3, O4, O5, O6, O7, \28I0, I1, I2, I3, I4, I5, I6, I7) \29"addq.ph %[" #O0 "], %[" #I0 "], %[" #I1 "] \n\t" \30"subq.ph %[" #O1 "], %[" #I0 "], %[" #I1 "] \n\t" \31"addq.ph %[" #O2 "], %[" #I2 "], %[" #I3 "] \n\t" \32"subq.ph %[" #O3 "], %[" #I2 "], %[" #I3 "] \n\t" \33"addq.ph %[" #O4 "], %[" #I4 "], %[" #I5 "] \n\t" \34"subq.ph %[" #O5 "], %[" #I4 "], %[" #I5 "] \n\t" \35"addq.ph %[" #O6 "], %[" #I6 "], %[" #I7 "] \n\t" \36"subq.ph %[" #O7 "], %[" #I6 "], %[" #I7 "] \n\t"3738// IO - input/output39#define ABS_X8(IO0, IO1, IO2, IO3, IO4, IO5, IO6, IO7) \40"absq_s.ph %[" #IO0 "], %[" #IO0 "] \n\t" \41"absq_s.ph %[" #IO1 "], %[" #IO1 "] \n\t" \42"absq_s.ph %[" #IO2 "], %[" #IO2 "] \n\t" \43"absq_s.ph %[" #IO3 "], %[" #IO3 "] \n\t" \44"absq_s.ph %[" #IO4 "], %[" #IO4 "] \n\t" \45"absq_s.ph %[" #IO5 "], %[" #IO5 "] \n\t" \46"absq_s.ph %[" #IO6 "], %[" #IO6 "] \n\t" \47"absq_s.ph %[" #IO7 "], %[" #IO7 "] \n\t"4849// dpa.w.ph $ac0 temp0 ,temp150// $ac += temp0[31..16] * temp1[31..16] + temp0[15..0] * temp1[15..0]51// dpax.w.ph $ac0 temp0 ,temp152// $ac += temp0[31..16] * temp1[15..0] + temp0[15..0] * temp1[31..16]53// O - output54// I - input (macro doesn't change it)55#define MUL_HALF(O0, I0, I1, I2, I3, I4, I5, I6, I7, \56I8, I9, I10, I11, I12, I13, I14, I15) \57"mult $ac0, $zero, $zero \n\t" \58"dpa.w.ph $ac0, %[" #I2 "], %[" #I0 "] \n\t" \59"dpax.w.ph $ac0, %[" #I5 "], %[" #I6 "] \n\t" \60"dpa.w.ph $ac0, %[" #I8 "], %[" #I9 "] \n\t" \61"dpax.w.ph $ac0, %[" #I11 "], %[" #I4 "] \n\t" \62"dpa.w.ph $ac0, %[" #I12 "], %[" #I7 "] \n\t" \63"dpax.w.ph $ac0, %[" #I13 "], %[" #I1 "] \n\t" \64"dpa.w.ph $ac0, %[" #I14 "], %[" #I3 "] \n\t" \65"dpax.w.ph $ac0, %[" #I15 "], %[" #I10 "] \n\t" \66"mflo %[" #O0 "], $ac0 \n\t"6768#define OUTPUT_EARLY_CLOBBER_REGS_17() \69OUTPUT_EARLY_CLOBBER_REGS_10(), \70[temp11]"=&r"(temp11), [temp12]"=&r"(temp12), [temp13]"=&r"(temp13), \71[temp14]"=&r"(temp14), [temp15]"=&r"(temp15), [temp16]"=&r"(temp16), \72[temp17]"=&r"(temp17)7374// macro for one horizontal pass in FTransform75// temp0..temp15 holds tmp[0]..tmp[15]76// A - offset in bytes to load from src and ref buffers77// TEMP0..TEMP3 - registers for corresponding tmp elements78#define HORIZONTAL_PASS(A, TEMP0, TEMP1, TEMP2, TEMP3) \79"lw %[" #TEMP0 "], 0(%[args]) \n\t" \80"lw %[" #TEMP1 "], 4(%[args]) \n\t" \81"lw %[" #TEMP2 "], " XSTR(BPS) "*" #A "(%[" #TEMP0 "]) \n\t" \82"lw %[" #TEMP3 "], " XSTR(BPS) "*" #A "(%[" #TEMP1 "]) \n\t" \83"preceu.ph.qbl %[" #TEMP0 "], %[" #TEMP2 "] \n\t" \84"preceu.ph.qbl %[" #TEMP1 "], %[" #TEMP3 "] \n\t" \85"preceu.ph.qbr %[" #TEMP2 "], %[" #TEMP2 "] \n\t" \86"preceu.ph.qbr %[" #TEMP3 "], %[" #TEMP3 "] \n\t" \87"subq.ph %[" #TEMP0 "], %[" #TEMP0 "], %[" #TEMP1 "] \n\t" \88"subq.ph %[" #TEMP2 "], %[" #TEMP2 "], %[" #TEMP3 "] \n\t" \89"rotr %[" #TEMP0 "], %[" #TEMP0 "], 16 \n\t" \90"addq.ph %[" #TEMP1 "], %[" #TEMP2 "], %[" #TEMP0 "] \n\t" \91"subq.ph %[" #TEMP3 "], %[" #TEMP2 "], %[" #TEMP0 "] \n\t" \92"seh %[" #TEMP0 "], %[" #TEMP1 "] \n\t" \93"sra %[temp16], %[" #TEMP1 "], 16 \n\t" \94"seh %[temp19], %[" #TEMP3 "] \n\t" \95"sra %[" #TEMP3 "], %[" #TEMP3 "], 16 \n\t" \96"subu %[" #TEMP2 "], %[" #TEMP0 "], %[temp16] \n\t" \97"addu %[" #TEMP0 "], %[" #TEMP0 "], %[temp16] \n\t" \98"mul %[temp17], %[temp19], %[c2217] \n\t" \99"mul %[temp18], %[" #TEMP3 "], %[c5352] \n\t" \100"mul %[" #TEMP1 "], %[temp19], %[c5352] \n\t" \101"mul %[temp16], %[" #TEMP3 "], %[c2217] \n\t" \102"sll %[" #TEMP2 "], %[" #TEMP2 "], 3 \n\t" \103"sll %[" #TEMP0 "], %[" #TEMP0 "], 3 \n\t" \104"subu %[" #TEMP3 "], %[temp17], %[temp18] \n\t" \105"addu %[" #TEMP1 "], %[temp16], %[" #TEMP1 "] \n\t" \106"addiu %[" #TEMP3 "], %[" #TEMP3 "], 937 \n\t" \107"addiu %[" #TEMP1 "], %[" #TEMP1 "], 1812 \n\t" \108"sra %[" #TEMP3 "], %[" #TEMP3 "], 9 \n\t" \109"sra %[" #TEMP1 "], %[" #TEMP1 "], 9 \n\t"110111// macro for one vertical pass in FTransform112// temp0..temp15 holds tmp[0]..tmp[15]113// A..D - offsets in bytes to store to out buffer114// TEMP0, TEMP4, TEMP8 and TEMP12 - registers for corresponding tmp elements115#define VERTICAL_PASS(A, B, C, D, TEMP0, TEMP4, TEMP8, TEMP12) \116"addu %[temp16], %[" #TEMP0 "], %[" #TEMP12 "] \n\t" \117"subu %[temp19], %[" #TEMP0 "], %[" #TEMP12 "] \n\t" \118"addu %[temp17], %[" #TEMP4 "], %[" #TEMP8 "] \n\t" \119"subu %[temp18], %[" #TEMP4 "], %[" #TEMP8 "] \n\t" \120"mul %[" #TEMP8 "], %[temp19], %[c2217] \n\t" \121"mul %[" #TEMP12 "], %[temp18], %[c2217] \n\t" \122"mul %[" #TEMP4 "], %[temp19], %[c5352] \n\t" \123"mul %[temp18], %[temp18], %[c5352] \n\t" \124"addiu %[temp16], %[temp16], 7 \n\t" \125"addu %[" #TEMP0 "], %[temp16], %[temp17] \n\t" \126"sra %[" #TEMP0 "], %[" #TEMP0 "], 4 \n\t" \127"addu %[" #TEMP12 "], %[" #TEMP12 "], %[" #TEMP4 "] \n\t" \128"subu %[" #TEMP4 "], %[temp16], %[temp17] \n\t" \129"sra %[" #TEMP4 "], %[" #TEMP4 "], 4 \n\t" \130"addiu %[" #TEMP8 "], %[" #TEMP8 "], 30000 \n\t" \131"addiu %[" #TEMP12 "], %[" #TEMP12 "], 12000 \n\t" \132"addiu %[" #TEMP8 "], %[" #TEMP8 "], 21000 \n\t" \133"subu %[" #TEMP8 "], %[" #TEMP8 "], %[temp18] \n\t" \134"sra %[" #TEMP12 "], %[" #TEMP12 "], 16 \n\t" \135"sra %[" #TEMP8 "], %[" #TEMP8 "], 16 \n\t" \136"addiu %[temp16], %[" #TEMP12 "], 1 \n\t" \137"movn %[" #TEMP12 "], %[temp16], %[temp19] \n\t" \138"sh %[" #TEMP0 "], " #A "(%[temp20]) \n\t" \139"sh %[" #TEMP4 "], " #C "(%[temp20]) \n\t" \140"sh %[" #TEMP8 "], " #D "(%[temp20]) \n\t" \141"sh %[" #TEMP12 "], " #B "(%[temp20]) \n\t"142143static void FTransform_MIPSdspR2(const uint8_t* WEBP_RESTRICT src,144const uint8_t* WEBP_RESTRICT ref,145int16_t* WEBP_RESTRICT out) {146const int c2217 = 2217;147const int c5352 = 5352;148int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8;149int temp9, temp10, temp11, temp12, temp13, temp14, temp15, temp16;150int temp17, temp18, temp19, temp20;151const int* const args[3] =152{ (const int*)src, (const int*)ref, (const int*)out };153154__asm__ volatile (155HORIZONTAL_PASS(0, temp0, temp1, temp2, temp3)156HORIZONTAL_PASS(1, temp4, temp5, temp6, temp7)157HORIZONTAL_PASS(2, temp8, temp9, temp10, temp11)158HORIZONTAL_PASS(3, temp12, temp13, temp14, temp15)159"lw %[temp20], 8(%[args]) \n\t"160VERTICAL_PASS(0, 8, 16, 24, temp0, temp4, temp8, temp12)161VERTICAL_PASS(2, 10, 18, 26, temp1, temp5, temp9, temp13)162VERTICAL_PASS(4, 12, 20, 28, temp2, temp6, temp10, temp14)163VERTICAL_PASS(6, 14, 22, 30, temp3, temp7, temp11, temp15)164OUTPUT_EARLY_CLOBBER_REGS_18(),165[temp0]"=&r"(temp0), [temp19]"=&r"(temp19), [temp20]"=&r"(temp20)166: [args]"r"(args), [c2217]"r"(c2217), [c5352]"r"(c5352)167: "memory", "hi", "lo"168);169}170171#undef VERTICAL_PASS172#undef HORIZONTAL_PASS173174static WEBP_INLINE void ITransformOne(const uint8_t* WEBP_RESTRICT ref,175const int16_t* WEBP_RESTRICT in,176uint8_t* WEBP_RESTRICT dst) {177int temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8, temp9;178int temp10, temp11, temp12, temp13, temp14, temp15, temp16, temp17, temp18;179180__asm__ volatile (181"ulw %[temp1], 0(%[in]) \n\t"182"ulw %[temp2], 16(%[in]) \n\t"183LOAD_IN_X2(temp5, temp6, 24, 26)184ADD_SUB_HALVES(temp3, temp4, temp1, temp2)185LOAD_IN_X2(temp1, temp2, 8, 10)186MUL_SHIFT_SUM(temp7, temp8, temp9, temp10, temp11, temp12, temp13, temp14,187temp10, temp8, temp9, temp7, temp1, temp2, temp5, temp6,188temp13, temp11, temp14, temp12)189INSERT_HALF_X2(temp8, temp7, temp10, temp9)190"ulw %[temp17], 4(%[in]) \n\t"191"ulw %[temp18], 20(%[in]) \n\t"192ADD_SUB_HALVES(temp1, temp2, temp3, temp8)193ADD_SUB_HALVES(temp5, temp6, temp4, temp7)194ADD_SUB_HALVES(temp7, temp8, temp17, temp18)195LOAD_IN_X2(temp17, temp18, 12, 14)196LOAD_IN_X2(temp9, temp10, 28, 30)197MUL_SHIFT_SUM(temp11, temp12, temp13, temp14, temp15, temp16, temp4, temp17,198temp12, temp14, temp11, temp13, temp17, temp18, temp9, temp10,199temp15, temp4, temp16, temp17)200INSERT_HALF_X2(temp11, temp12, temp13, temp14)201ADD_SUB_HALVES(temp17, temp8, temp8, temp11)202ADD_SUB_HALVES(temp3, temp4, temp7, temp12)203204// horizontal205SRA_16(temp9, temp10, temp11, temp12, temp1, temp2, temp5, temp6)206INSERT_HALF_X2(temp1, temp6, temp5, temp2)207SRA_16(temp13, temp14, temp15, temp16, temp3, temp4, temp17, temp8)208"repl.ph %[temp2], 0x4 \n\t"209INSERT_HALF_X2(temp3, temp8, temp17, temp4)210"addq.ph %[temp1], %[temp1], %[temp2] \n\t"211"addq.ph %[temp6], %[temp6], %[temp2] \n\t"212ADD_SUB_HALVES(temp2, temp4, temp1, temp3)213ADD_SUB_HALVES(temp5, temp7, temp6, temp8)214MUL_SHIFT_SUM(temp1, temp3, temp6, temp8, temp9, temp13, temp17, temp18,215temp3, temp13, temp1, temp9, temp9, temp13, temp11, temp15,216temp6, temp17, temp8, temp18)217MUL_SHIFT_SUM(temp6, temp8, temp18, temp17, temp11, temp15, temp12, temp16,218temp8, temp15, temp6, temp11, temp12, temp16, temp10, temp14,219temp18, temp12, temp17, temp16)220INSERT_HALF_X2(temp1, temp3, temp9, temp13)221INSERT_HALF_X2(temp6, temp8, temp11, temp15)222SHIFT_R_SUM_X2(temp9, temp10, temp11, temp12, temp13, temp14, temp15,223temp16, temp2, temp4, temp5, temp7, temp3, temp1, temp8,224temp6)225PACK_2_HALVES_TO_WORD(temp1, temp2, temp3, temp4, temp9, temp12, temp13,226temp16, temp11, temp10, temp15, temp14)227LOAD_WITH_OFFSET_X4(temp10, temp11, temp14, temp15, ref,2280, 0, 0, 0,2290, 1, 2, 3,230BPS)231CONVERT_2_BYTES_TO_HALF(temp5, temp6, temp7, temp8, temp17, temp18, temp10,232temp11, temp10, temp11, temp14, temp15)233STORE_SAT_SUM_X2(temp5, temp6, temp7, temp8, temp17, temp18, temp10, temp11,234temp9, temp12, temp1, temp2, temp13, temp16, temp3, temp4,235dst, 0, 1, 2, 3, BPS)236237OUTPUT_EARLY_CLOBBER_REGS_18()238: [dst]"r"(dst), [in]"r"(in), [kC1]"r"(kC1), [kC2]"r"(kC2), [ref]"r"(ref)239: "memory", "hi", "lo"240);241}242243static void ITransform_MIPSdspR2(const uint8_t* WEBP_RESTRICT ref,244const int16_t* WEBP_RESTRICT in,245uint8_t* WEBP_RESTRICT dst, int do_two) {246ITransformOne(ref, in, dst);247if (do_two) {248ITransformOne(ref + 4, in + 16, dst + 4);249}250}251252static int Disto4x4_MIPSdspR2(const uint8_t* WEBP_RESTRICT const a,253const uint8_t* WEBP_RESTRICT const b,254const uint16_t* WEBP_RESTRICT const w) {255int temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8, temp9;256int temp10, temp11, temp12, temp13, temp14, temp15, temp16, temp17;257258__asm__ volatile (259LOAD_WITH_OFFSET_X4(temp1, temp2, temp3, temp4, a,2600, 0, 0, 0,2610, 1, 2, 3,262BPS)263CONVERT_2_BYTES_TO_HALF(temp5, temp6, temp7, temp8, temp9,temp10, temp11,264temp12, temp1, temp2, temp3, temp4)265ADD_SUB_HALVES_X4(temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8,266temp5, temp6, temp7, temp8, temp9, temp10, temp11, temp12)267PACK_2_HALVES_TO_WORD(temp9, temp10, temp11, temp12, temp1, temp3, temp5,268temp7, temp2, temp4, temp6, temp8)269ADD_SUB_HALVES_X4(temp2, temp4, temp6, temp8, temp9, temp1, temp3, temp10,270temp1, temp9, temp3, temp10, temp5, temp11, temp7, temp12)271ADD_SUB_HALVES_X4(temp5, temp11, temp7, temp2, temp9, temp3, temp6, temp12,272temp2, temp9, temp6, temp3, temp4, temp1, temp8, temp10)273ADD_SUB_HALVES_X4(temp1, temp4, temp10, temp8, temp7, temp11, temp5, temp2,274temp5, temp7, temp11, temp2, temp9, temp6, temp3, temp12)275ABS_X8(temp1, temp4, temp10, temp8, temp7, temp11, temp5, temp2)276LOAD_WITH_OFFSET_X4(temp3, temp6, temp9, temp12, w,2770, 4, 8, 12,2780, 0, 0, 0,2790)280LOAD_WITH_OFFSET_X4(temp13, temp14, temp15, temp16, w,2810, 4, 8, 12,2821, 1, 1, 1,28316)284MUL_HALF(temp17, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8,285temp9, temp10, temp11, temp12, temp13, temp14, temp15, temp16)286LOAD_WITH_OFFSET_X4(temp1, temp2, temp3, temp4, b,2870, 0, 0, 0,2880, 1, 2, 3,289BPS)290CONVERT_2_BYTES_TO_HALF(temp5,temp6, temp7, temp8, temp9,temp10, temp11,291temp12, temp1, temp2, temp3, temp4)292ADD_SUB_HALVES_X4(temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8,293temp5, temp6, temp7, temp8, temp9, temp10, temp11, temp12)294PACK_2_HALVES_TO_WORD(temp9, temp10, temp11, temp12, temp1, temp3, temp5,295temp7, temp2, temp4, temp6, temp8)296ADD_SUB_HALVES_X4(temp2, temp4, temp6, temp8, temp9, temp1, temp3, temp10,297temp1, temp9, temp3, temp10, temp5, temp11, temp7, temp12)298ADD_SUB_HALVES_X4(temp5, temp11, temp7, temp2, temp9, temp3, temp6, temp12,299temp2, temp9, temp6, temp3, temp4, temp1, temp8, temp10)300ADD_SUB_HALVES_X4(temp1, temp4, temp10, temp8, temp7, temp11, temp5, temp2,301temp5, temp7, temp11, temp2, temp9, temp6, temp3, temp12)302ABS_X8(temp1, temp4, temp10, temp8, temp7, temp11, temp5, temp2)303LOAD_WITH_OFFSET_X4(temp3, temp6, temp9, temp12, w,3040, 4, 8, 12,3050, 0, 0, 0,3060)307LOAD_WITH_OFFSET_X4(temp13, temp14, temp15, temp16, w,3080, 4, 8, 12,3091, 1, 1, 1,31016)311MUL_HALF(temp3, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8,312temp9, temp10, temp11, temp12, temp13, temp14, temp15, temp16)313OUTPUT_EARLY_CLOBBER_REGS_17()314: [a]"r"(a), [b]"r"(b), [w]"r"(w)315: "memory", "hi", "lo"316);317return abs(temp3 - temp17) >> 5;318}319320static int Disto16x16_MIPSdspR2(const uint8_t* WEBP_RESTRICT const a,321const uint8_t* WEBP_RESTRICT const b,322const uint16_t* WEBP_RESTRICT const w) {323int D = 0;324int x, y;325for (y = 0; y < 16 * BPS; y += 4 * BPS) {326for (x = 0; x < 16; x += 4) {327D += Disto4x4_MIPSdspR2(a + x + y, b + x + y, w);328}329}330return D;331}332333//------------------------------------------------------------------------------334// Intra predictions335336#define FILL_PART(J, SIZE) \337"usw %[value], 0+" #J "*" XSTR(BPS) "(%[dst]) \n\t" \338"usw %[value], 4+" #J "*" XSTR(BPS) "(%[dst]) \n\t" \339".if " #SIZE " == 16 \n\t" \340"usw %[value], 8+" #J "*" XSTR(BPS) "(%[dst]) \n\t" \341"usw %[value], 12+" #J "*" XSTR(BPS) "(%[dst]) \n\t" \342".endif \n\t"343344#define FILL_8_OR_16(DST, VALUE, SIZE) do { \345int value = (VALUE); \346__asm__ volatile ( \347"replv.qb %[value], %[value] \n\t" \348FILL_PART( 0, SIZE) \349FILL_PART( 1, SIZE) \350FILL_PART( 2, SIZE) \351FILL_PART( 3, SIZE) \352FILL_PART( 4, SIZE) \353FILL_PART( 5, SIZE) \354FILL_PART( 6, SIZE) \355FILL_PART( 7, SIZE) \356".if " #SIZE " == 16 \n\t" \357FILL_PART( 8, 16) \358FILL_PART( 9, 16) \359FILL_PART(10, 16) \360FILL_PART(11, 16) \361FILL_PART(12, 16) \362FILL_PART(13, 16) \363FILL_PART(14, 16) \364FILL_PART(15, 16) \365".endif \n\t" \366: [value]"+&r"(value) \367: [dst]"r"((DST)) \368: "memory" \369); \370} while (0)371372#define VERTICAL_PRED(DST, TOP, SIZE) \373static WEBP_INLINE void VerticalPred##SIZE( \374uint8_t* WEBP_RESTRICT (DST), const uint8_t* WEBP_RESTRICT (TOP)) { \375int j; \376if ((TOP)) { \377for (j = 0; j < (SIZE); ++j) memcpy((DST) + j * BPS, (TOP), (SIZE)); \378} else { \379FILL_8_OR_16((DST), 127, (SIZE)); \380} \381}382383VERTICAL_PRED(dst, top, 8)384VERTICAL_PRED(dst, top, 16)385386#undef VERTICAL_PRED387388#define HORIZONTAL_PRED(DST, LEFT, SIZE) \389static WEBP_INLINE void HorizontalPred##SIZE( \390uint8_t* WEBP_RESTRICT (DST), const uint8_t* WEBP_RESTRICT (LEFT)) { \391if (LEFT) { \392int j; \393for (j = 0; j < (SIZE); ++j) { \394memset((DST) + j * BPS, (LEFT)[j], (SIZE)); \395} \396} else { \397FILL_8_OR_16((DST), 129, (SIZE)); \398} \399}400401HORIZONTAL_PRED(dst, left, 8)402HORIZONTAL_PRED(dst, left, 16)403404#undef HORIZONTAL_PRED405406#define CLIPPING() \407"preceu.ph.qbl %[temp2], %[temp0] \n\t" \408"preceu.ph.qbr %[temp0], %[temp0] \n\t" \409"preceu.ph.qbl %[temp3], %[temp1] \n\t" \410"preceu.ph.qbr %[temp1], %[temp1] \n\t" \411"addu.ph %[temp2], %[temp2], %[leftY_1] \n\t" \412"addu.ph %[temp0], %[temp0], %[leftY_1] \n\t" \413"addu.ph %[temp3], %[temp3], %[leftY_1] \n\t" \414"addu.ph %[temp1], %[temp1], %[leftY_1] \n\t" \415"shll_s.ph %[temp2], %[temp2], 7 \n\t" \416"shll_s.ph %[temp0], %[temp0], 7 \n\t" \417"shll_s.ph %[temp3], %[temp3], 7 \n\t" \418"shll_s.ph %[temp1], %[temp1], 7 \n\t" \419"precrqu_s.qb.ph %[temp0], %[temp2], %[temp0] \n\t" \420"precrqu_s.qb.ph %[temp1], %[temp3], %[temp1] \n\t"421422#define CLIP_8B_TO_DST(DST, LEFT, TOP, SIZE) do { \423int leftY_1 = ((int)(LEFT)[y] << 16) + (LEFT)[y]; \424int temp0, temp1, temp2, temp3; \425__asm__ volatile ( \426"replv.ph %[leftY_1], %[leftY_1] \n\t" \427"ulw %[temp0], 0(%[top]) \n\t" \428"ulw %[temp1], 4(%[top]) \n\t" \429"subu.ph %[leftY_1], %[leftY_1], %[left_1] \n\t" \430CLIPPING() \431"usw %[temp0], 0(%[dst]) \n\t" \432"usw %[temp1], 4(%[dst]) \n\t" \433".if " #SIZE " == 16 \n\t" \434"ulw %[temp0], 8(%[top]) \n\t" \435"ulw %[temp1], 12(%[top]) \n\t" \436CLIPPING() \437"usw %[temp0], 8(%[dst]) \n\t" \438"usw %[temp1], 12(%[dst]) \n\t" \439".endif \n\t" \440: [leftY_1]"+&r"(leftY_1), [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), \441[temp2]"=&r"(temp2), [temp3]"=&r"(temp3) \442: [left_1]"r"(left_1), [top]"r"((TOP)), [dst]"r"((DST)) \443: "memory" \444); \445} while (0)446447#define CLIP_TO_DST(DST, LEFT, TOP, SIZE) do { \448int y; \449const int left_1 = ((int)(LEFT)[-1] << 16) + (LEFT)[-1]; \450for (y = 0; y < (SIZE); ++y) { \451CLIP_8B_TO_DST((DST), (LEFT), (TOP), (SIZE)); \452(DST) += BPS; \453} \454} while (0)455456#define TRUE_MOTION(DST, LEFT, TOP, SIZE) \457static WEBP_INLINE void TrueMotion##SIZE(uint8_t* WEBP_RESTRICT (DST), \458const uint8_t* WEBP_RESTRICT (LEFT), \459const uint8_t* WEBP_RESTRICT (TOP)) { \460if ((LEFT) != NULL) { \461if ((TOP) != NULL) { \462CLIP_TO_DST((DST), (LEFT), (TOP), (SIZE)); \463} else { \464HorizontalPred##SIZE((DST), (LEFT)); \465} \466} else { \467/* true motion without left samples (hence: with default 129 value) */ \468/* is equivalent to VE prediction where you just copy the top samples. */ \469/* Note that if top samples are not available, the default value is */ \470/* then 129, and not 127 as in the VerticalPred case. */ \471if ((TOP) != NULL) { \472VerticalPred##SIZE((DST), (TOP)); \473} else { \474FILL_8_OR_16((DST), 129, (SIZE)); \475} \476} \477}478479TRUE_MOTION(dst, left, top, 8)480TRUE_MOTION(dst, left, top, 16)481482#undef TRUE_MOTION483#undef CLIP_TO_DST484#undef CLIP_8B_TO_DST485#undef CLIPPING486487static WEBP_INLINE void DCMode16(uint8_t* WEBP_RESTRICT dst,488const uint8_t* WEBP_RESTRICT left,489const uint8_t* WEBP_RESTRICT top) {490int DC, DC1;491int temp0, temp1, temp2, temp3;492493__asm__ volatile(494"beqz %[top], 2f \n\t"495LOAD_WITH_OFFSET_X4(temp0, temp1, temp2, temp3, top,4960, 4, 8, 12,4970, 0, 0, 0,4980)499"raddu.w.qb %[temp0], %[temp0] \n\t"500"raddu.w.qb %[temp1], %[temp1] \n\t"501"raddu.w.qb %[temp2], %[temp2] \n\t"502"raddu.w.qb %[temp3], %[temp3] \n\t"503"addu %[temp0], %[temp0], %[temp1] \n\t"504"addu %[temp2], %[temp2], %[temp3] \n\t"505"addu %[DC], %[temp0], %[temp2] \n\t"506"move %[DC1], %[DC] \n\t"507"beqz %[left], 1f \n\t"508LOAD_WITH_OFFSET_X4(temp0, temp1, temp2, temp3, left,5090, 4, 8, 12,5100, 0, 0, 0,5110)512"raddu.w.qb %[temp0], %[temp0] \n\t"513"raddu.w.qb %[temp1], %[temp1] \n\t"514"raddu.w.qb %[temp2], %[temp2] \n\t"515"raddu.w.qb %[temp3], %[temp3] \n\t"516"addu %[temp0], %[temp0], %[temp1] \n\t"517"addu %[temp2], %[temp2], %[temp3] \n\t"518"addu %[DC1], %[temp0], %[temp2] \n\t"519"1: \n\t"520"addu %[DC], %[DC], %[DC1] \n\t"521"j 3f \n\t"522"2: \n\t"523"beqz %[left], 4f \n\t"524LOAD_WITH_OFFSET_X4(temp0, temp1, temp2, temp3, left,5250, 4, 8, 12,5260, 0, 0, 0,5270)528"raddu.w.qb %[temp0], %[temp0] \n\t"529"raddu.w.qb %[temp1], %[temp1] \n\t"530"raddu.w.qb %[temp2], %[temp2] \n\t"531"raddu.w.qb %[temp3], %[temp3] \n\t"532"addu %[temp0], %[temp0], %[temp1] \n\t"533"addu %[temp2], %[temp2], %[temp3] \n\t"534"addu %[DC], %[temp0], %[temp2] \n\t"535"addu %[DC], %[DC], %[DC] \n\t"536"3: \n\t"537"shra_r.w %[DC], %[DC], 5 \n\t"538"j 5f \n\t"539"4: \n\t"540"li %[DC], 0x80 \n\t"541"5: \n\t"542: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [DC]"=&r"(DC),543[temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [DC1]"=&r"(DC1)544: [left]"r"(left), [top]"r"(top)545: "memory"546);547548FILL_8_OR_16(dst, DC, 16);549}550551static WEBP_INLINE void DCMode8(uint8_t* WEBP_RESTRICT dst,552const uint8_t* WEBP_RESTRICT left,553const uint8_t* WEBP_RESTRICT top) {554int DC, DC1;555int temp0, temp1, temp2, temp3;556557__asm__ volatile(558"beqz %[top], 2f \n\t"559"ulw %[temp0], 0(%[top]) \n\t"560"ulw %[temp1], 4(%[top]) \n\t"561"raddu.w.qb %[temp0], %[temp0] \n\t"562"raddu.w.qb %[temp1], %[temp1] \n\t"563"addu %[DC], %[temp0], %[temp1] \n\t"564"move %[DC1], %[DC] \n\t"565"beqz %[left], 1f \n\t"566"ulw %[temp2], 0(%[left]) \n\t"567"ulw %[temp3], 4(%[left]) \n\t"568"raddu.w.qb %[temp2], %[temp2] \n\t"569"raddu.w.qb %[temp3], %[temp3] \n\t"570"addu %[DC1], %[temp2], %[temp3] \n\t"571"1: \n\t"572"addu %[DC], %[DC], %[DC1] \n\t"573"j 3f \n\t"574"2: \n\t"575"beqz %[left], 4f \n\t"576"ulw %[temp2], 0(%[left]) \n\t"577"ulw %[temp3], 4(%[left]) \n\t"578"raddu.w.qb %[temp2], %[temp2] \n\t"579"raddu.w.qb %[temp3], %[temp3] \n\t"580"addu %[DC], %[temp2], %[temp3] \n\t"581"addu %[DC], %[DC], %[DC] \n\t"582"3: \n\t"583"shra_r.w %[DC], %[DC], 4 \n\t"584"j 5f \n\t"585"4: \n\t"586"li %[DC], 0x80 \n\t"587"5: \n\t"588: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [DC]"=&r"(DC),589[temp2]"=&r"(temp2), [temp3]"=&r"(temp3), [DC1]"=&r"(DC1)590: [left]"r"(left), [top]"r"(top)591: "memory"592);593594FILL_8_OR_16(dst, DC, 8);595}596597static void DC4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {598int temp0, temp1;599__asm__ volatile(600"ulw %[temp0], 0(%[top]) \n\t"601"ulw %[temp1], -5(%[top]) \n\t"602"raddu.w.qb %[temp0], %[temp0] \n\t"603"raddu.w.qb %[temp1], %[temp1] \n\t"604"addu %[temp0], %[temp0], %[temp1] \n\t"605"addiu %[temp0], %[temp0], 4 \n\t"606"srl %[temp0], %[temp0], 3 \n\t"607"replv.qb %[temp0], %[temp0] \n\t"608"usw %[temp0], 0*" XSTR(BPS) "(%[dst]) \n\t"609"usw %[temp0], 1*" XSTR(BPS) "(%[dst]) \n\t"610"usw %[temp0], 2*" XSTR(BPS) "(%[dst]) \n\t"611"usw %[temp0], 3*" XSTR(BPS) "(%[dst]) \n\t"612: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1)613: [top]"r"(top), [dst]"r"(dst)614: "memory"615);616}617618static void TM4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {619int a10, a32, temp0, temp1, temp2, temp3, temp4, temp5;620const int c35 = 0xff00ff;621__asm__ volatile (622"lbu %[temp1], 0(%[top]) \n\t"623"lbu %[a10], 1(%[top]) \n\t"624"lbu %[temp2], 2(%[top]) \n\t"625"lbu %[a32], 3(%[top]) \n\t"626"ulw %[temp0], -5(%[top]) \n\t"627"lbu %[temp4], -1(%[top]) \n\t"628"append %[a10], %[temp1], 16 \n\t"629"append %[a32], %[temp2], 16 \n\t"630"replv.ph %[temp4], %[temp4] \n\t"631"shrl.ph %[temp1], %[temp0], 8 \n\t"632"and %[temp0], %[temp0], %[c35] \n\t"633"subu.ph %[temp1], %[temp1], %[temp4] \n\t"634"subu.ph %[temp0], %[temp0], %[temp4] \n\t"635"srl %[temp2], %[temp1], 16 \n\t"636"srl %[temp3], %[temp0], 16 \n\t"637"replv.ph %[temp2], %[temp2] \n\t"638"replv.ph %[temp3], %[temp3] \n\t"639"replv.ph %[temp4], %[temp1] \n\t"640"replv.ph %[temp5], %[temp0] \n\t"641"addu.ph %[temp0], %[temp3], %[a10] \n\t"642"addu.ph %[temp1], %[temp3], %[a32] \n\t"643"addu.ph %[temp3], %[temp2], %[a10] \n\t"644"addu.ph %[temp2], %[temp2], %[a32] \n\t"645"shll_s.ph %[temp0], %[temp0], 7 \n\t"646"shll_s.ph %[temp1], %[temp1], 7 \n\t"647"shll_s.ph %[temp3], %[temp3], 7 \n\t"648"shll_s.ph %[temp2], %[temp2], 7 \n\t"649"precrqu_s.qb.ph %[temp0], %[temp1], %[temp0] \n\t"650"precrqu_s.qb.ph %[temp1], %[temp2], %[temp3] \n\t"651"addu.ph %[temp2], %[temp5], %[a10] \n\t"652"addu.ph %[temp3], %[temp5], %[a32] \n\t"653"addu.ph %[temp5], %[temp4], %[a10] \n\t"654"addu.ph %[temp4], %[temp4], %[a32] \n\t"655"shll_s.ph %[temp2], %[temp2], 7 \n\t"656"shll_s.ph %[temp3], %[temp3], 7 \n\t"657"shll_s.ph %[temp4], %[temp4], 7 \n\t"658"shll_s.ph %[temp5], %[temp5], 7 \n\t"659"precrqu_s.qb.ph %[temp2], %[temp3], %[temp2] \n\t"660"precrqu_s.qb.ph %[temp3], %[temp4], %[temp5] \n\t"661"usw %[temp1], 0*" XSTR(BPS) "(%[dst]) \n\t"662"usw %[temp0], 1*" XSTR(BPS) "(%[dst]) \n\t"663"usw %[temp3], 2*" XSTR(BPS) "(%[dst]) \n\t"664"usw %[temp2], 3*" XSTR(BPS) "(%[dst]) \n\t"665: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),666[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),667[a10]"=&r"(a10), [a32]"=&r"(a32)668: [c35]"r"(c35), [top]"r"(top), [dst]"r"(dst)669: "memory"670);671}672673static void VE4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {674int temp0, temp1, temp2, temp3, temp4, temp5, temp6;675__asm__ volatile(676"ulw %[temp0], -1(%[top]) \n\t"677"ulh %[temp1], 3(%[top]) \n\t"678"preceu.ph.qbr %[temp2], %[temp0] \n\t"679"preceu.ph.qbl %[temp3], %[temp0] \n\t"680"preceu.ph.qbr %[temp4], %[temp1] \n\t"681"packrl.ph %[temp5], %[temp3], %[temp2] \n\t"682"packrl.ph %[temp6], %[temp4], %[temp3] \n\t"683"shll.ph %[temp5], %[temp5], 1 \n\t"684"shll.ph %[temp6], %[temp6], 1 \n\t"685"addq.ph %[temp2], %[temp5], %[temp2] \n\t"686"addq.ph %[temp6], %[temp6], %[temp4] \n\t"687"addq.ph %[temp2], %[temp2], %[temp3] \n\t"688"addq.ph %[temp6], %[temp6], %[temp3] \n\t"689"shra_r.ph %[temp2], %[temp2], 2 \n\t"690"shra_r.ph %[temp6], %[temp6], 2 \n\t"691"precr.qb.ph %[temp4], %[temp6], %[temp2] \n\t"692"usw %[temp4], 0*" XSTR(BPS) "(%[dst]) \n\t"693"usw %[temp4], 1*" XSTR(BPS) "(%[dst]) \n\t"694"usw %[temp4], 2*" XSTR(BPS) "(%[dst]) \n\t"695"usw %[temp4], 3*" XSTR(BPS) "(%[dst]) \n\t"696: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),697[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),698[temp6]"=&r"(temp6)699: [top]"r"(top), [dst]"r"(dst)700: "memory"701);702}703704static void HE4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {705int temp0, temp1, temp2, temp3, temp4, temp5, temp6;706__asm__ volatile(707"ulw %[temp0], -4(%[top]) \n\t"708"lbu %[temp1], -5(%[top]) \n\t"709"preceu.ph.qbr %[temp2], %[temp0] \n\t"710"preceu.ph.qbl %[temp3], %[temp0] \n\t"711"replv.ph %[temp4], %[temp1] \n\t"712"packrl.ph %[temp5], %[temp3], %[temp2] \n\t"713"packrl.ph %[temp6], %[temp2], %[temp4] \n\t"714"shll.ph %[temp5], %[temp5], 1 \n\t"715"shll.ph %[temp6], %[temp6], 1 \n\t"716"addq.ph %[temp3], %[temp3], %[temp5] \n\t"717"addq.ph %[temp3], %[temp3], %[temp2] \n\t"718"addq.ph %[temp2], %[temp2], %[temp6] \n\t"719"addq.ph %[temp2], %[temp2], %[temp4] \n\t"720"shra_r.ph %[temp3], %[temp3], 2 \n\t"721"shra_r.ph %[temp2], %[temp2], 2 \n\t"722"replv.qb %[temp0], %[temp3] \n\t"723"replv.qb %[temp1], %[temp2] \n\t"724"srl %[temp3], %[temp3], 16 \n\t"725"srl %[temp2], %[temp2], 16 \n\t"726"replv.qb %[temp3], %[temp3] \n\t"727"replv.qb %[temp2], %[temp2] \n\t"728"usw %[temp3], 0*" XSTR(BPS) "(%[dst]) \n\t"729"usw %[temp0], 1*" XSTR(BPS) "(%[dst]) \n\t"730"usw %[temp2], 2*" XSTR(BPS) "(%[dst]) \n\t"731"usw %[temp1], 3*" XSTR(BPS) "(%[dst]) \n\t"732: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),733[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),734[temp6]"=&r"(temp6)735: [top]"r"(top), [dst]"r"(dst)736: "memory"737);738}739740static void RD4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {741int temp0, temp1, temp2, temp3, temp4, temp5;742int temp6, temp7, temp8, temp9, temp10, temp11;743__asm__ volatile(744"ulw %[temp0], -5(%[top]) \n\t"745"ulw %[temp1], -1(%[top]) \n\t"746"preceu.ph.qbl %[temp2], %[temp0] \n\t"747"preceu.ph.qbr %[temp3], %[temp0] \n\t"748"preceu.ph.qbr %[temp4], %[temp1] \n\t"749"preceu.ph.qbl %[temp5], %[temp1] \n\t"750"packrl.ph %[temp6], %[temp2], %[temp3] \n\t"751"packrl.ph %[temp7], %[temp4], %[temp2] \n\t"752"packrl.ph %[temp8], %[temp5], %[temp4] \n\t"753"shll.ph %[temp6], %[temp6], 1 \n\t"754"addq.ph %[temp9], %[temp2], %[temp6] \n\t"755"shll.ph %[temp7], %[temp7], 1 \n\t"756"addq.ph %[temp9], %[temp9], %[temp3] \n\t"757"shll.ph %[temp8], %[temp8], 1 \n\t"758"shra_r.ph %[temp9], %[temp9], 2 \n\t"759"addq.ph %[temp10], %[temp4], %[temp7] \n\t"760"addq.ph %[temp11], %[temp5], %[temp8] \n\t"761"addq.ph %[temp10], %[temp10], %[temp2] \n\t"762"addq.ph %[temp11], %[temp11], %[temp4] \n\t"763"shra_r.ph %[temp10], %[temp10], 2 \n\t"764"shra_r.ph %[temp11], %[temp11], 2 \n\t"765"lbu %[temp0], 3(%[top]) \n\t"766"lbu %[temp1], 2(%[top]) \n\t"767"lbu %[temp2], 1(%[top]) \n\t"768"sll %[temp1], %[temp1], 1 \n\t"769"addu %[temp0], %[temp0], %[temp1] \n\t"770"addu %[temp0], %[temp0], %[temp2] \n\t"771"precr.qb.ph %[temp9], %[temp10], %[temp9] \n\t"772"shra_r.w %[temp0], %[temp0], 2 \n\t"773"precr.qb.ph %[temp10], %[temp11], %[temp10] \n\t"774"usw %[temp9], 3*" XSTR(BPS) "(%[dst]) \n\t"775"usw %[temp10], 1*" XSTR(BPS) "(%[dst]) \n\t"776"prepend %[temp9], %[temp11], 8 \n\t"777"prepend %[temp10], %[temp0], 8 \n\t"778"usw %[temp9], 2*" XSTR(BPS) "(%[dst]) \n\t"779"usw %[temp10], 0*" XSTR(BPS) "(%[dst]) \n\t"780: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),781[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),782[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),783[temp9]"=&r"(temp9), [temp10]"=&r"(temp10), [temp11]"=&r"(temp11)784: [top]"r"(top), [dst]"r"(dst)785: "memory"786);787}788789static void VR4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {790int temp0, temp1, temp2, temp3, temp4;791int temp5, temp6, temp7, temp8, temp9;792__asm__ volatile (793"ulw %[temp0], -4(%[top]) \n\t"794"ulw %[temp1], 0(%[top]) \n\t"795"preceu.ph.qbl %[temp2], %[temp0] \n\t"796"preceu.ph.qbr %[temp0], %[temp0] \n\t"797"preceu.ph.qbla %[temp3], %[temp1] \n\t"798"preceu.ph.qbra %[temp1], %[temp1] \n\t"799"packrl.ph %[temp7], %[temp3], %[temp2] \n\t"800"addqh_r.ph %[temp4], %[temp1], %[temp3] \n\t"801"move %[temp6], %[temp1] \n\t"802"append %[temp1], %[temp2], 16 \n\t"803"shll.ph %[temp9], %[temp6], 1 \n\t"804"addqh_r.ph %[temp5], %[temp7], %[temp6] \n\t"805"shll.ph %[temp8], %[temp7], 1 \n\t"806"addu.ph %[temp3], %[temp7], %[temp3] \n\t"807"addu.ph %[temp1], %[temp1], %[temp6] \n\t"808"packrl.ph %[temp7], %[temp2], %[temp0] \n\t"809"addu.ph %[temp6], %[temp0], %[temp2] \n\t"810"addu.ph %[temp3], %[temp3], %[temp9] \n\t"811"addu.ph %[temp1], %[temp1], %[temp8] \n\t"812"shll.ph %[temp7], %[temp7], 1 \n\t"813"shra_r.ph %[temp3], %[temp3], 2 \n\t"814"shra_r.ph %[temp1], %[temp1], 2 \n\t"815"addu.ph %[temp6], %[temp6], %[temp7] \n\t"816"shra_r.ph %[temp6], %[temp6], 2 \n\t"817"precrq.ph.w %[temp8], %[temp4], %[temp5] \n\t"818"append %[temp4], %[temp5], 16 \n\t"819"precrq.ph.w %[temp2], %[temp3], %[temp1] \n\t"820"append %[temp3], %[temp1], 16 \n\t"821"precr.qb.ph %[temp8], %[temp8], %[temp4] \n\t"822"precr.qb.ph %[temp3], %[temp2], %[temp3] \n\t"823"usw %[temp8], 0*" XSTR(BPS) "(%[dst]) \n\t"824"usw %[temp3], 1*" XSTR(BPS) "(%[dst]) \n\t"825"append %[temp3], %[temp6], 8 \n\t"826"srl %[temp6], %[temp6], 16 \n\t"827"append %[temp8], %[temp6], 8 \n\t"828"usw %[temp3], 3*" XSTR(BPS) "(%[dst]) \n\t"829"usw %[temp8], 2*" XSTR(BPS) "(%[dst]) \n\t"830: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),831[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),832[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),833[temp9]"=&r"(temp9)834: [top]"r"(top), [dst]"r"(dst)835: "memory"836);837}838839static void LD4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {840int temp0, temp1, temp2, temp3, temp4, temp5;841int temp6, temp7, temp8, temp9, temp10, temp11;842__asm__ volatile(843"ulw %[temp0], 0(%[top]) \n\t"844"ulw %[temp1], 4(%[top]) \n\t"845"preceu.ph.qbl %[temp2], %[temp0] \n\t"846"preceu.ph.qbr %[temp3], %[temp0] \n\t"847"preceu.ph.qbr %[temp4], %[temp1] \n\t"848"preceu.ph.qbl %[temp5], %[temp1] \n\t"849"packrl.ph %[temp6], %[temp2], %[temp3] \n\t"850"packrl.ph %[temp7], %[temp4], %[temp2] \n\t"851"packrl.ph %[temp8], %[temp5], %[temp4] \n\t"852"shll.ph %[temp6], %[temp6], 1 \n\t"853"addq.ph %[temp9], %[temp2], %[temp6] \n\t"854"shll.ph %[temp7], %[temp7], 1 \n\t"855"addq.ph %[temp9], %[temp9], %[temp3] \n\t"856"shll.ph %[temp8], %[temp8], 1 \n\t"857"shra_r.ph %[temp9], %[temp9], 2 \n\t"858"addq.ph %[temp10], %[temp4], %[temp7] \n\t"859"addq.ph %[temp11], %[temp5], %[temp8] \n\t"860"addq.ph %[temp10], %[temp10], %[temp2] \n\t"861"addq.ph %[temp11], %[temp11], %[temp4] \n\t"862"shra_r.ph %[temp10], %[temp10], 2 \n\t"863"shra_r.ph %[temp11], %[temp11], 2 \n\t"864"srl %[temp1], %[temp1], 24 \n\t"865"sll %[temp1], %[temp1], 1 \n\t"866"raddu.w.qb %[temp5], %[temp5] \n\t"867"precr.qb.ph %[temp9], %[temp10], %[temp9] \n\t"868"precr.qb.ph %[temp10], %[temp11], %[temp10] \n\t"869"addu %[temp1], %[temp1], %[temp5] \n\t"870"shra_r.w %[temp1], %[temp1], 2 \n\t"871"usw %[temp9], 0*" XSTR(BPS) "(%[dst]) \n\t"872"usw %[temp10], 2*" XSTR(BPS) "(%[dst]) \n\t"873"prepend %[temp9], %[temp11], 8 \n\t"874"prepend %[temp10], %[temp1], 8 \n\t"875"usw %[temp9], 1*" XSTR(BPS) "(%[dst]) \n\t"876"usw %[temp10], 3*" XSTR(BPS) "(%[dst]) \n\t"877: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),878[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),879[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),880[temp9]"=&r"(temp9), [temp10]"=&r"(temp10), [temp11]"=&r"(temp11)881: [top]"r"(top), [dst]"r"(dst)882: "memory"883);884}885886static void VL4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {887int temp0, temp1, temp2, temp3, temp4;888int temp5, temp6, temp7, temp8, temp9;889__asm__ volatile (890"ulw %[temp0], 0(%[top]) \n\t"891"ulw %[temp1], 4(%[top]) \n\t"892"preceu.ph.qbla %[temp2], %[temp0] \n\t"893"preceu.ph.qbra %[temp0], %[temp0] \n\t"894"preceu.ph.qbl %[temp3], %[temp1] \n\t"895"preceu.ph.qbr %[temp1], %[temp1] \n\t"896"addqh_r.ph %[temp4], %[temp0], %[temp2] \n\t"897"packrl.ph %[temp7], %[temp1], %[temp0] \n\t"898"precrq.ph.w %[temp6], %[temp1], %[temp2] \n\t"899"shll.ph %[temp9], %[temp2], 1 \n\t"900"addqh_r.ph %[temp5], %[temp7], %[temp2] \n\t"901"shll.ph %[temp8], %[temp7], 1 \n\t"902"addu.ph %[temp2], %[temp2], %[temp6] \n\t"903"addu.ph %[temp0], %[temp0], %[temp7] \n\t"904"packrl.ph %[temp7], %[temp3], %[temp1] \n\t"905"addu.ph %[temp6], %[temp1], %[temp3] \n\t"906"addu.ph %[temp2], %[temp2], %[temp8] \n\t"907"addu.ph %[temp0], %[temp0], %[temp9] \n\t"908"shll.ph %[temp7], %[temp7], 1 \n\t"909"shra_r.ph %[temp2], %[temp2], 2 \n\t"910"shra_r.ph %[temp0], %[temp0], 2 \n\t"911"addu.ph %[temp6], %[temp6], %[temp7] \n\t"912"shra_r.ph %[temp6], %[temp6], 2 \n\t"913"precrq.ph.w %[temp8], %[temp5], %[temp4] \n\t"914"append %[temp5], %[temp4], 16 \n\t"915"precrq.ph.w %[temp3], %[temp2], %[temp0] \n\t"916"append %[temp2], %[temp0], 16 \n\t"917"precr.qb.ph %[temp8], %[temp8], %[temp5] \n\t"918"precr.qb.ph %[temp3], %[temp3], %[temp2] \n\t"919"usw %[temp8], 0*" XSTR(BPS) "(%[dst]) \n\t"920"prepend %[temp8], %[temp6], 8 \n\t"921"usw %[temp3], 1*" XSTR(BPS) "(%[dst]) \n\t"922"srl %[temp6], %[temp6], 16 \n\t"923"prepend %[temp3], %[temp6], 8 \n\t"924"usw %[temp8], 2*" XSTR(BPS) "(%[dst]) \n\t"925"usw %[temp3], 3*" XSTR(BPS) "(%[dst]) \n\t"926: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),927[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),928[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),929[temp9]"=&r"(temp9)930: [top]"r"(top), [dst]"r"(dst)931: "memory"932);933}934935static void HD4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {936int temp0, temp1, temp2, temp3, temp4;937int temp5, temp6, temp7, temp8, temp9;938__asm__ volatile (939"ulw %[temp0], -5(%[top]) \n\t"940"ulw %[temp1], -1(%[top]) \n\t"941"preceu.ph.qbla %[temp2], %[temp0] \n\t"942"preceu.ph.qbra %[temp0], %[temp0] \n\t"943"preceu.ph.qbl %[temp3], %[temp1] \n\t"944"preceu.ph.qbr %[temp1], %[temp1] \n\t"945"addqh_r.ph %[temp4], %[temp0], %[temp2] \n\t"946"packrl.ph %[temp7], %[temp1], %[temp0] \n\t"947"precrq.ph.w %[temp6], %[temp1], %[temp2] \n\t"948"shll.ph %[temp9], %[temp2], 1 \n\t"949"addqh_r.ph %[temp5], %[temp7], %[temp2] \n\t"950"shll.ph %[temp8], %[temp7], 1 \n\t"951"addu.ph %[temp2], %[temp2], %[temp6] \n\t"952"addu.ph %[temp0], %[temp0], %[temp7] \n\t"953"packrl.ph %[temp7], %[temp3], %[temp1] \n\t"954"addu.ph %[temp6], %[temp1], %[temp3] \n\t"955"addu.ph %[temp2], %[temp2], %[temp8] \n\t"956"addu.ph %[temp0], %[temp0], %[temp9] \n\t"957"shll.ph %[temp7], %[temp7], 1 \n\t"958"shra_r.ph %[temp2], %[temp2], 2 \n\t"959"shra_r.ph %[temp0], %[temp0], 2 \n\t"960"addu.ph %[temp6], %[temp6], %[temp7] \n\t"961"shra_r.ph %[temp6], %[temp6], 2 \n\t"962"precrq.ph.w %[temp1], %[temp2], %[temp5] \n\t"963"precrq.ph.w %[temp3], %[temp0], %[temp4] \n\t"964"precr.qb.ph %[temp7], %[temp6], %[temp1] \n\t"965"precr.qb.ph %[temp6], %[temp1], %[temp3] \n\t"966"usw %[temp7], 0*" XSTR(BPS) "(%[dst]) \n\t"967"usw %[temp6], 1*" XSTR(BPS) "(%[dst]) \n\t"968"append %[temp2], %[temp5], 16 \n\t"969"append %[temp0], %[temp4], 16 \n\t"970"precr.qb.ph %[temp5], %[temp3], %[temp2] \n\t"971"precr.qb.ph %[temp4], %[temp2], %[temp0] \n\t"972"usw %[temp5], 2*" XSTR(BPS) "(%[dst]) \n\t"973"usw %[temp4], 3*" XSTR(BPS) "(%[dst]) \n\t"974: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),975[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),976[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),977[temp9]"=&r"(temp9)978: [top]"r"(top), [dst]"r"(dst)979: "memory"980);981}982983static void HU4(uint8_t* WEBP_RESTRICT dst, const uint8_t* WEBP_RESTRICT top) {984int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7;985__asm__ volatile (986"ulw %[temp0], -5(%[top]) \n\t"987"preceu.ph.qbl %[temp1], %[temp0] \n\t"988"preceu.ph.qbr %[temp2], %[temp0] \n\t"989"packrl.ph %[temp3], %[temp1], %[temp2] \n\t"990"replv.qb %[temp7], %[temp2] \n\t"991"addqh_r.ph %[temp4], %[temp1], %[temp3] \n\t"992"addqh_r.ph %[temp5], %[temp3], %[temp2] \n\t"993"shll.ph %[temp6], %[temp3], 1 \n\t"994"addu.ph %[temp3], %[temp2], %[temp3] \n\t"995"addu.ph %[temp6], %[temp1], %[temp6] \n\t"996"shll.ph %[temp0], %[temp2], 1 \n\t"997"addu.ph %[temp6], %[temp6], %[temp2] \n\t"998"addu.ph %[temp0], %[temp3], %[temp0] \n\t"999"shra_r.ph %[temp6], %[temp6], 2 \n\t"1000"shra_r.ph %[temp0], %[temp0], 2 \n\t"1001"packrl.ph %[temp3], %[temp6], %[temp5] \n\t"1002"precrq.ph.w %[temp2], %[temp6], %[temp4] \n\t"1003"append %[temp0], %[temp5], 16 \n\t"1004"precr.qb.ph %[temp3], %[temp3], %[temp2] \n\t"1005"usw %[temp3], 0*" XSTR(BPS) "(%[dst]) \n\t"1006"precr.qb.ph %[temp1], %[temp7], %[temp0] \n\t"1007"usw %[temp7], 3*" XSTR(BPS) "(%[dst]) \n\t"1008"packrl.ph %[temp2], %[temp1], %[temp3] \n\t"1009"usw %[temp1], 2*" XSTR(BPS) "(%[dst]) \n\t"1010"usw %[temp2], 1*" XSTR(BPS) "(%[dst]) \n\t"1011: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),1012[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),1013[temp6]"=&r"(temp6), [temp7]"=&r"(temp7)1014: [top]"r"(top), [dst]"r"(dst)1015: "memory"1016);1017}10181019//------------------------------------------------------------------------------1020// Chroma 8x8 prediction (paragraph 12.2)10211022static void IntraChromaPreds_MIPSdspR2(uint8_t* WEBP_RESTRICT dst,1023const uint8_t* WEBP_RESTRICT left,1024const uint8_t* WEBP_RESTRICT top) {1025// U block1026DCMode8(C8DC8 + dst, left, top);1027VerticalPred8(C8VE8 + dst, top);1028HorizontalPred8(C8HE8 + dst, left);1029TrueMotion8(C8TM8 + dst, left, top);1030// V block1031dst += 8;1032if (top) top += 8;1033if (left) left += 16;1034DCMode8(C8DC8 + dst, left, top);1035VerticalPred8(C8VE8 + dst, top);1036HorizontalPred8(C8HE8 + dst, left);1037TrueMotion8(C8TM8 + dst, left, top);1038}10391040//------------------------------------------------------------------------------1041// luma 16x16 prediction (paragraph 12.3)10421043static void Intra16Preds_MIPSdspR2(uint8_t* WEBP_RESTRICT dst,1044const uint8_t* WEBP_RESTRICT left,1045const uint8_t* WEBP_RESTRICT top) {1046DCMode16(I16DC16 + dst, left, top);1047VerticalPred16(I16VE16 + dst, top);1048HorizontalPred16(I16HE16 + dst, left);1049TrueMotion16(I16TM16 + dst, left, top);1050}10511052// Left samples are top[-5 .. -2], top_left is top[-1], top are1053// located at top[0..3], and top right is top[4..7]1054static void Intra4Preds_MIPSdspR2(uint8_t* WEBP_RESTRICT dst,1055const uint8_t* WEBP_RESTRICT top) {1056DC4(I4DC4 + dst, top);1057TM4(I4TM4 + dst, top);1058VE4(I4VE4 + dst, top);1059HE4(I4HE4 + dst, top);1060RD4(I4RD4 + dst, top);1061VR4(I4VR4 + dst, top);1062LD4(I4LD4 + dst, top);1063VL4(I4VL4 + dst, top);1064HD4(I4HD4 + dst, top);1065HU4(I4HU4 + dst, top);1066}10671068//------------------------------------------------------------------------------1069// Metric10701071#if !defined(WORK_AROUND_GCC)10721073#define GET_SSE_INNER(A) \1074"lw %[temp0], " #A "(%[a]) \n\t" \1075"lw %[temp1], " #A "(%[b]) \n\t" \1076"preceu.ph.qbr %[temp2], %[temp0] \n\t" \1077"preceu.ph.qbl %[temp0], %[temp0] \n\t" \1078"preceu.ph.qbr %[temp3], %[temp1] \n\t" \1079"preceu.ph.qbl %[temp1], %[temp1] \n\t" \1080"subq.ph %[temp2], %[temp2], %[temp3] \n\t" \1081"subq.ph %[temp0], %[temp0], %[temp1] \n\t" \1082"dpa.w.ph $ac0, %[temp2], %[temp2] \n\t" \1083"dpa.w.ph $ac0, %[temp0], %[temp0] \n\t"10841085#define GET_SSE(A, B, C, D) \1086GET_SSE_INNER(A) \1087GET_SSE_INNER(B) \1088GET_SSE_INNER(C) \1089GET_SSE_INNER(D)10901091static int SSE16x16_MIPSdspR2(const uint8_t* WEBP_RESTRICT a,1092const uint8_t* WEBP_RESTRICT b) {1093int count;1094int temp0, temp1, temp2, temp3;1095__asm__ volatile (1096"mult $zero, $zero \n\t"1097GET_SSE( 0 * BPS, 4 + 0 * BPS, 8 + 0 * BPS, 12 + 0 * BPS)1098GET_SSE( 1 * BPS, 4 + 1 * BPS, 8 + 1 * BPS, 12 + 1 * BPS)1099GET_SSE( 2 * BPS, 4 + 2 * BPS, 8 + 2 * BPS, 12 + 2 * BPS)1100GET_SSE( 3 * BPS, 4 + 3 * BPS, 8 + 3 * BPS, 12 + 3 * BPS)1101GET_SSE( 4 * BPS, 4 + 4 * BPS, 8 + 4 * BPS, 12 + 4 * BPS)1102GET_SSE( 5 * BPS, 4 + 5 * BPS, 8 + 5 * BPS, 12 + 5 * BPS)1103GET_SSE( 6 * BPS, 4 + 6 * BPS, 8 + 6 * BPS, 12 + 6 * BPS)1104GET_SSE( 7 * BPS, 4 + 7 * BPS, 8 + 7 * BPS, 12 + 7 * BPS)1105GET_SSE( 8 * BPS, 4 + 8 * BPS, 8 + 8 * BPS, 12 + 8 * BPS)1106GET_SSE( 9 * BPS, 4 + 9 * BPS, 8 + 9 * BPS, 12 + 9 * BPS)1107GET_SSE(10 * BPS, 4 + 10 * BPS, 8 + 10 * BPS, 12 + 10 * BPS)1108GET_SSE(11 * BPS, 4 + 11 * BPS, 8 + 11 * BPS, 12 + 11 * BPS)1109GET_SSE(12 * BPS, 4 + 12 * BPS, 8 + 12 * BPS, 12 + 12 * BPS)1110GET_SSE(13 * BPS, 4 + 13 * BPS, 8 + 13 * BPS, 12 + 13 * BPS)1111GET_SSE(14 * BPS, 4 + 14 * BPS, 8 + 14 * BPS, 12 + 14 * BPS)1112GET_SSE(15 * BPS, 4 + 15 * BPS, 8 + 15 * BPS, 12 + 15 * BPS)1113"mflo %[count] \n\t"1114: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),1115[temp3]"=&r"(temp3), [count]"=&r"(count)1116: [a]"r"(a), [b]"r"(b)1117: "memory", "hi", "lo"1118);1119return count;1120}11211122static int SSE16x8_MIPSdspR2(const uint8_t* WEBP_RESTRICT a,1123const uint8_t* WEBP_RESTRICT b) {1124int count;1125int temp0, temp1, temp2, temp3;1126__asm__ volatile (1127"mult $zero, $zero \n\t"1128GET_SSE( 0 * BPS, 4 + 0 * BPS, 8 + 0 * BPS, 12 + 0 * BPS)1129GET_SSE( 1 * BPS, 4 + 1 * BPS, 8 + 1 * BPS, 12 + 1 * BPS)1130GET_SSE( 2 * BPS, 4 + 2 * BPS, 8 + 2 * BPS, 12 + 2 * BPS)1131GET_SSE( 3 * BPS, 4 + 3 * BPS, 8 + 3 * BPS, 12 + 3 * BPS)1132GET_SSE( 4 * BPS, 4 + 4 * BPS, 8 + 4 * BPS, 12 + 4 * BPS)1133GET_SSE( 5 * BPS, 4 + 5 * BPS, 8 + 5 * BPS, 12 + 5 * BPS)1134GET_SSE( 6 * BPS, 4 + 6 * BPS, 8 + 6 * BPS, 12 + 6 * BPS)1135GET_SSE( 7 * BPS, 4 + 7 * BPS, 8 + 7 * BPS, 12 + 7 * BPS)1136"mflo %[count] \n\t"1137: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),1138[temp3]"=&r"(temp3), [count]"=&r"(count)1139: [a]"r"(a), [b]"r"(b)1140: "memory", "hi", "lo"1141);1142return count;1143}11441145static int SSE8x8_MIPSdspR2(const uint8_t* WEBP_RESTRICT a,1146const uint8_t* WEBP_RESTRICT b) {1147int count;1148int temp0, temp1, temp2, temp3;1149__asm__ volatile (1150"mult $zero, $zero \n\t"1151GET_SSE(0 * BPS, 4 + 0 * BPS, 1 * BPS, 4 + 1 * BPS)1152GET_SSE(2 * BPS, 4 + 2 * BPS, 3 * BPS, 4 + 3 * BPS)1153GET_SSE(4 * BPS, 4 + 4 * BPS, 5 * BPS, 4 + 5 * BPS)1154GET_SSE(6 * BPS, 4 + 6 * BPS, 7 * BPS, 4 + 7 * BPS)1155"mflo %[count] \n\t"1156: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),1157[temp3]"=&r"(temp3), [count]"=&r"(count)1158: [a]"r"(a), [b]"r"(b)1159: "memory", "hi", "lo"1160);1161return count;1162}11631164static int SSE4x4_MIPSdspR2(const uint8_t* WEBP_RESTRICT a,1165const uint8_t* WEBP_RESTRICT b) {1166int count;1167int temp0, temp1, temp2, temp3;1168__asm__ volatile (1169"mult $zero, $zero \n\t"1170GET_SSE(0 * BPS, 1 * BPS, 2 * BPS, 3 * BPS)1171"mflo %[count] \n\t"1172: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),1173[temp3]"=&r"(temp3), [count]"=&r"(count)1174: [a]"r"(a), [b]"r"(b)1175: "memory", "hi", "lo"1176);1177return count;1178}11791180#undef GET_SSE1181#undef GET_SSE_INNER11821183#endif // !WORK_AROUND_GCC11841185#undef FILL_8_OR_161186#undef FILL_PART1187#undef OUTPUT_EARLY_CLOBBER_REGS_171188#undef MUL_HALF1189#undef ABS_X81190#undef ADD_SUB_HALVES_X411911192//------------------------------------------------------------------------------1193// Quantization1194//11951196// macro for one pass through for loop in QuantizeBlock reading 2 values at time1197// QUANTDIV macro inlined1198// J - offset in bytes (kZigzag[n] * 2)1199// K - offset in bytes (kZigzag[n] * 4)1200// N - offset in bytes (n * 2)1201// N1 - offset in bytes ((n + 1) * 2)1202#define QUANTIZE_ONE(J, K, N, N1) \1203"ulw %[temp1], " #J "(%[ppin]) \n\t" \1204"ulw %[temp2], " #J "(%[ppsharpen]) \n\t" \1205"lhu %[temp3], " #K "(%[ppzthresh]) \n\t" \1206"lhu %[temp6], " #K "+4(%[ppzthresh]) \n\t" \1207"absq_s.ph %[temp4], %[temp1] \n\t" \1208"ins %[temp3], %[temp6], 16, 16 \n\t" \1209"addu.ph %[coeff], %[temp4], %[temp2] \n\t" \1210"shra.ph %[sign], %[temp1], 15 \n\t" \1211"li %[level], 0x10001 \n\t" \1212"cmp.lt.ph %[temp3], %[coeff] \n\t" \1213"lhu %[temp1], " #J "(%[ppiq]) \n\t" \1214"pick.ph %[temp5], %[level], $0 \n\t" \1215"lw %[temp2], " #K "(%[ppbias]) \n\t" \1216"beqz %[temp5], 0f \n\t" \1217"lhu %[temp3], " #J "(%[ppq]) \n\t" \1218"beq %[temp5], %[level], 1f \n\t" \1219"andi %[temp5], %[temp5], 0x1 \n\t" \1220"andi %[temp4], %[coeff], 0xffff \n\t" \1221"beqz %[temp5], 2f \n\t" \1222"mul %[level], %[temp4], %[temp1] \n\t" \1223"sh $0, " #J "+2(%[ppin]) \n\t" \1224"sh $0, " #N1 "(%[pout]) \n\t" \1225"addu %[level], %[level], %[temp2] \n\t" \1226"sra %[level], %[level], 17 \n\t" \1227"slt %[temp4], %[max_level], %[level] \n\t" \1228"movn %[level], %[max_level], %[temp4] \n\t" \1229"andi %[temp6], %[sign], 0xffff \n\t" \1230"xor %[level], %[level], %[temp6] \n\t" \1231"subu %[level], %[level], %[temp6] \n\t" \1232"mul %[temp5], %[level], %[temp3] \n\t" \1233"or %[ret], %[ret], %[level] \n\t" \1234"sh %[level], " #N "(%[pout]) \n\t" \1235"sh %[temp5], " #J "(%[ppin]) \n\t" \1236"j 3f \n\t" \1237"2: \n\t" \1238"lhu %[temp1], " #J "+2(%[ppiq]) \n\t" \1239"srl %[temp5], %[coeff], 16 \n\t" \1240"mul %[level], %[temp5], %[temp1] \n\t" \1241"lw %[temp2], " #K "+4(%[ppbias]) \n\t" \1242"lhu %[temp3], " #J "+2(%[ppq]) \n\t" \1243"addu %[level], %[level], %[temp2] \n\t" \1244"sra %[level], %[level], 17 \n\t" \1245"srl %[temp6], %[sign], 16 \n\t" \1246"slt %[temp4], %[max_level], %[level] \n\t" \1247"movn %[level], %[max_level], %[temp4] \n\t" \1248"xor %[level], %[level], %[temp6] \n\t" \1249"subu %[level], %[level], %[temp6] \n\t" \1250"mul %[temp5], %[level], %[temp3] \n\t" \1251"sh $0, " #J "(%[ppin]) \n\t" \1252"sh $0, " #N "(%[pout]) \n\t" \1253"or %[ret], %[ret], %[level] \n\t" \1254"sh %[temp5], " #J "+2(%[ppin]) \n\t" \1255"sh %[level], " #N1 "(%[pout]) \n\t" \1256"j 3f \n\t" \1257"1: \n\t" \1258"lhu %[temp1], " #J "(%[ppiq]) \n\t" \1259"lw %[temp2], " #K "(%[ppbias]) \n\t" \1260"ulw %[temp3], " #J "(%[ppq]) \n\t" \1261"andi %[temp5], %[coeff], 0xffff \n\t" \1262"srl %[temp0], %[coeff], 16 \n\t" \1263"lhu %[temp6], " #J "+2(%[ppiq]) \n\t" \1264"lw %[coeff], " #K "+4(%[ppbias]) \n\t" \1265"mul %[level], %[temp5], %[temp1] \n\t" \1266"mul %[temp4], %[temp0], %[temp6] \n\t" \1267"addu %[level], %[level], %[temp2] \n\t" \1268"addu %[temp4], %[temp4], %[coeff] \n\t" \1269"precrq.ph.w %[level], %[temp4], %[level] \n\t" \1270"shra.ph %[level], %[level], 1 \n\t" \1271"cmp.lt.ph %[max_level1],%[level] \n\t" \1272"pick.ph %[level], %[max_level], %[level] \n\t" \1273"xor %[level], %[level], %[sign] \n\t" \1274"subu.ph %[level], %[level], %[sign] \n\t" \1275"mul.ph %[temp3], %[level], %[temp3] \n\t" \1276"or %[ret], %[ret], %[level] \n\t" \1277"sh %[level], " #N "(%[pout]) \n\t" \1278"srl %[level], %[level], 16 \n\t" \1279"sh %[level], " #N1 "(%[pout]) \n\t" \1280"usw %[temp3], " #J "(%[ppin]) \n\t" \1281"j 3f \n\t" \1282"0: \n\t" \1283"sh $0, " #N "(%[pout]) \n\t" \1284"sh $0, " #N1 "(%[pout]) \n\t" \1285"usw $0, " #J "(%[ppin]) \n\t" \1286"3: \n\t"12871288static int QuantizeBlock_MIPSdspR2(int16_t in[16], int16_t out[16],1289const VP8Matrix* WEBP_RESTRICT const mtx) {1290int temp0, temp1, temp2, temp3, temp4, temp5,temp6;1291int sign, coeff, level;1292int max_level = MAX_LEVEL;1293int max_level1 = max_level << 16 | max_level;1294int ret = 0;12951296int16_t* ppin = &in[0];1297int16_t* pout = &out[0];1298const uint16_t* ppsharpen = &mtx->sharpen_[0];1299const uint32_t* ppzthresh = &mtx->zthresh_[0];1300const uint16_t* ppq = &mtx->q_[0];1301const uint16_t* ppiq = &mtx->iq_[0];1302const uint32_t* ppbias = &mtx->bias_[0];13031304__asm__ volatile (1305QUANTIZE_ONE( 0, 0, 0, 2)1306QUANTIZE_ONE( 4, 8, 10, 12)1307QUANTIZE_ONE( 8, 16, 4, 8)1308QUANTIZE_ONE(12, 24, 14, 24)1309QUANTIZE_ONE(16, 32, 6, 16)1310QUANTIZE_ONE(20, 40, 22, 26)1311QUANTIZE_ONE(24, 48, 18, 20)1312QUANTIZE_ONE(28, 56, 28, 30)13131314: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1),1315[temp2]"=&r"(temp2), [temp3]"=&r"(temp3),1316[temp4]"=&r"(temp4), [temp5]"=&r"(temp5),1317[sign]"=&r"(sign), [coeff]"=&r"(coeff),1318[level]"=&r"(level), [temp6]"=&r"(temp6), [ret]"+&r"(ret)1319: [ppin]"r"(ppin), [pout]"r"(pout), [max_level1]"r"(max_level1),1320[ppiq]"r"(ppiq), [max_level]"r"(max_level),1321[ppbias]"r"(ppbias), [ppzthresh]"r"(ppzthresh),1322[ppsharpen]"r"(ppsharpen), [ppq]"r"(ppq)1323: "memory", "hi", "lo"1324);13251326return (ret != 0);1327}13281329static int Quantize2Blocks_MIPSdspR2(int16_t in[32], int16_t out[32],1330const VP8Matrix* WEBP_RESTRICT const mtx) {1331int nz;1332nz = QuantizeBlock_MIPSdspR2(in + 0 * 16, out + 0 * 16, mtx) << 0;1333nz |= QuantizeBlock_MIPSdspR2(in + 1 * 16, out + 1 * 16, mtx) << 1;1334return nz;1335}13361337#undef QUANTIZE_ONE13381339// macro for one horizontal pass in FTransformWHT1340// temp0..temp7 holds tmp[0]..tmp[15]1341// A, B, C, D - offset in bytes to load from in buffer1342// TEMP0, TEMP1 - registers for corresponding tmp elements1343#define HORIZONTAL_PASS_WHT(A, B, C, D, TEMP0, TEMP1) \1344"lh %[" #TEMP0 "], " #A "(%[in]) \n\t" \1345"lh %[" #TEMP1 "], " #B "(%[in]) \n\t" \1346"lh %[temp8], " #C "(%[in]) \n\t" \1347"lh %[temp9], " #D "(%[in]) \n\t" \1348"ins %[" #TEMP1 "], %[" #TEMP0 "], 16, 16 \n\t" \1349"ins %[temp9], %[temp8], 16, 16 \n\t" \1350"subq.ph %[temp8], %[" #TEMP1 "], %[temp9] \n\t" \1351"addq.ph %[temp9], %[" #TEMP1 "], %[temp9] \n\t" \1352"precrq.ph.w %[" #TEMP0 "], %[temp8], %[temp9] \n\t" \1353"append %[temp8], %[temp9], 16 \n\t" \1354"subq.ph %[" #TEMP1 "], %[" #TEMP0 "], %[temp8] \n\t" \1355"addq.ph %[" #TEMP0 "], %[" #TEMP0 "], %[temp8] \n\t" \1356"rotr %[" #TEMP1 "], %[" #TEMP1 "], 16 \n\t"13571358// macro for one vertical pass in FTransformWHT1359// temp0..temp7 holds tmp[0]..tmp[15]1360// A, B, C, D - offsets in bytes to store to out buffer1361// TEMP0, TEMP2, TEMP4 and TEMP6 - registers for corresponding tmp elements1362#define VERTICAL_PASS_WHT(A, B, C, D, TEMP0, TEMP2, TEMP4, TEMP6) \1363"addq.ph %[temp8], %[" #TEMP0 "], %[" #TEMP4 "] \n\t" \1364"addq.ph %[temp9], %[" #TEMP2 "], %[" #TEMP6 "] \n\t" \1365"subq.ph %[" #TEMP2 "], %[" #TEMP2 "], %[" #TEMP6 "] \n\t" \1366"subq.ph %[" #TEMP6 "], %[" #TEMP0 "], %[" #TEMP4 "] \n\t" \1367"addqh.ph %[" #TEMP0 "], %[temp8], %[temp9] \n\t" \1368"subqh.ph %[" #TEMP4 "], %[" #TEMP6 "], %[" #TEMP2 "] \n\t" \1369"addqh.ph %[" #TEMP2 "], %[" #TEMP2 "], %[" #TEMP6 "] \n\t" \1370"subqh.ph %[" #TEMP6 "], %[temp8], %[temp9] \n\t" \1371"usw %[" #TEMP0 "], " #A "(%[out]) \n\t" \1372"usw %[" #TEMP2 "], " #B "(%[out]) \n\t" \1373"usw %[" #TEMP4 "], " #C "(%[out]) \n\t" \1374"usw %[" #TEMP6 "], " #D "(%[out]) \n\t"13751376static void FTransformWHT_MIPSdspR2(const int16_t* WEBP_RESTRICT in,1377int16_t* WEBP_RESTRICT out) {1378int temp0, temp1, temp2, temp3, temp4;1379int temp5, temp6, temp7, temp8, temp9;13801381__asm__ volatile (1382HORIZONTAL_PASS_WHT( 0, 32, 64, 96, temp0, temp1)1383HORIZONTAL_PASS_WHT(128, 160, 192, 224, temp2, temp3)1384HORIZONTAL_PASS_WHT(256, 288, 320, 352, temp4, temp5)1385HORIZONTAL_PASS_WHT(384, 416, 448, 480, temp6, temp7)1386VERTICAL_PASS_WHT(0, 8, 16, 24, temp0, temp2, temp4, temp6)1387VERTICAL_PASS_WHT(4, 12, 20, 28, temp1, temp3, temp5, temp7)1388: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),1389[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),1390[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8),1391[temp9]"=&r"(temp9)1392: [in]"r"(in), [out]"r"(out)1393: "memory"1394);1395}13961397#undef VERTICAL_PASS_WHT1398#undef HORIZONTAL_PASS_WHT13991400// macro for converting coefficients to bin1401// convert 8 coeffs at time1402// A, B, C, D - offsets in bytes to load from out buffer1403#define CONVERT_COEFFS_TO_BIN(A, B, C, D) \1404"ulw %[temp0], " #A "(%[out]) \n\t" \1405"ulw %[temp1], " #B "(%[out]) \n\t" \1406"ulw %[temp2], " #C "(%[out]) \n\t" \1407"ulw %[temp3], " #D "(%[out]) \n\t" \1408"absq_s.ph %[temp0], %[temp0] \n\t" \1409"absq_s.ph %[temp1], %[temp1] \n\t" \1410"absq_s.ph %[temp2], %[temp2] \n\t" \1411"absq_s.ph %[temp3], %[temp3] \n\t" \1412"shra.ph %[temp0], %[temp0], 3 \n\t" \1413"shra.ph %[temp1], %[temp1], 3 \n\t" \1414"shra.ph %[temp2], %[temp2], 3 \n\t" \1415"shra.ph %[temp3], %[temp3], 3 \n\t" \1416"shll_s.ph %[temp0], %[temp0], 10 \n\t" \1417"shll_s.ph %[temp1], %[temp1], 10 \n\t" \1418"shll_s.ph %[temp2], %[temp2], 10 \n\t" \1419"shll_s.ph %[temp3], %[temp3], 10 \n\t" \1420"shrl.ph %[temp0], %[temp0], 10 \n\t" \1421"shrl.ph %[temp1], %[temp1], 10 \n\t" \1422"shrl.ph %[temp2], %[temp2], 10 \n\t" \1423"shrl.ph %[temp3], %[temp3], 10 \n\t" \1424"shll.ph %[temp0], %[temp0], 2 \n\t" \1425"shll.ph %[temp1], %[temp1], 2 \n\t" \1426"shll.ph %[temp2], %[temp2], 2 \n\t" \1427"shll.ph %[temp3], %[temp3], 2 \n\t" \1428"ext %[temp4], %[temp0], 0, 16 \n\t" \1429"ext %[temp0], %[temp0], 16, 16 \n\t" \1430"addu %[temp4], %[temp4], %[dist] \n\t" \1431"addu %[temp0], %[temp0], %[dist] \n\t" \1432"ext %[temp5], %[temp1], 0, 16 \n\t" \1433"lw %[temp8], 0(%[temp4]) \n\t" \1434"ext %[temp1], %[temp1], 16, 16 \n\t" \1435"addu %[temp5], %[temp5], %[dist] \n\t" \1436"addiu %[temp8], %[temp8], 1 \n\t" \1437"sw %[temp8], 0(%[temp4]) \n\t" \1438"lw %[temp8], 0(%[temp0]) \n\t" \1439"addu %[temp1], %[temp1], %[dist] \n\t" \1440"ext %[temp6], %[temp2], 0, 16 \n\t" \1441"addiu %[temp8], %[temp8], 1 \n\t" \1442"sw %[temp8], 0(%[temp0]) \n\t" \1443"lw %[temp8], 0(%[temp5]) \n\t" \1444"ext %[temp2], %[temp2], 16, 16 \n\t" \1445"addu %[temp6], %[temp6], %[dist] \n\t" \1446"addiu %[temp8], %[temp8], 1 \n\t" \1447"sw %[temp8], 0(%[temp5]) \n\t" \1448"lw %[temp8], 0(%[temp1]) \n\t" \1449"addu %[temp2], %[temp2], %[dist] \n\t" \1450"ext %[temp7], %[temp3], 0, 16 \n\t" \1451"addiu %[temp8], %[temp8], 1 \n\t" \1452"sw %[temp8], 0(%[temp1]) \n\t" \1453"lw %[temp8], 0(%[temp6]) \n\t" \1454"ext %[temp3], %[temp3], 16, 16 \n\t" \1455"addu %[temp7], %[temp7], %[dist] \n\t" \1456"addiu %[temp8], %[temp8], 1 \n\t" \1457"sw %[temp8], 0(%[temp6]) \n\t" \1458"lw %[temp8], 0(%[temp2]) \n\t" \1459"addu %[temp3], %[temp3], %[dist] \n\t" \1460"addiu %[temp8], %[temp8], 1 \n\t" \1461"sw %[temp8], 0(%[temp2]) \n\t" \1462"lw %[temp8], 0(%[temp7]) \n\t" \1463"addiu %[temp8], %[temp8], 1 \n\t" \1464"sw %[temp8], 0(%[temp7]) \n\t" \1465"lw %[temp8], 0(%[temp3]) \n\t" \1466"addiu %[temp8], %[temp8], 1 \n\t" \1467"sw %[temp8], 0(%[temp3]) \n\t"14681469static void CollectHistogram_MIPSdspR2(const uint8_t* ref, const uint8_t* pred,1470int start_block, int end_block,1471VP8Histogram* const histo) {1472int j;1473int distribution[MAX_COEFF_THRESH + 1] = { 0 };1474const int max_coeff = (MAX_COEFF_THRESH << 16) + MAX_COEFF_THRESH;1475for (j = start_block; j < end_block; ++j) {1476int16_t out[16];1477int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7, temp8;14781479VP8FTransform(ref + VP8DspScan[j], pred + VP8DspScan[j], out);14801481// Convert coefficients to bin.1482__asm__ volatile (1483CONVERT_COEFFS_TO_BIN( 0, 4, 8, 12)1484CONVERT_COEFFS_TO_BIN(16, 20, 24, 28)1485: [temp0]"=&r"(temp0), [temp1]"=&r"(temp1), [temp2]"=&r"(temp2),1486[temp3]"=&r"(temp3), [temp4]"=&r"(temp4), [temp5]"=&r"(temp5),1487[temp6]"=&r"(temp6), [temp7]"=&r"(temp7), [temp8]"=&r"(temp8)1488: [dist]"r"(distribution), [out]"r"(out), [max_coeff]"r"(max_coeff)1489: "memory"1490);1491}1492VP8SetHistogramData(distribution, histo);1493}14941495#undef CONVERT_COEFFS_TO_BIN14961497//------------------------------------------------------------------------------1498// Entry point14991500extern void VP8EncDspInitMIPSdspR2(void);15011502WEBP_TSAN_IGNORE_FUNCTION void VP8EncDspInitMIPSdspR2(void) {1503VP8FTransform = FTransform_MIPSdspR2;1504VP8FTransformWHT = FTransformWHT_MIPSdspR2;1505VP8ITransform = ITransform_MIPSdspR2;15061507VP8TDisto4x4 = Disto4x4_MIPSdspR2;1508VP8TDisto16x16 = Disto16x16_MIPSdspR2;15091510VP8EncPredLuma16 = Intra16Preds_MIPSdspR2;1511VP8EncPredChroma8 = IntraChromaPreds_MIPSdspR2;1512VP8EncPredLuma4 = Intra4Preds_MIPSdspR2;15131514#if !defined(WORK_AROUND_GCC)1515VP8SSE16x16 = SSE16x16_MIPSdspR2;1516VP8SSE8x8 = SSE8x8_MIPSdspR2;1517VP8SSE16x8 = SSE16x8_MIPSdspR2;1518VP8SSE4x4 = SSE4x4_MIPSdspR2;1519#endif15201521VP8EncQuantizeBlock = QuantizeBlock_MIPSdspR2;1522VP8EncQuantize2Blocks = Quantize2Blocks_MIPSdspR2;15231524VP8CollectHistogram = CollectHistogram_MIPSdspR2;1525}15261527#else // !WEBP_USE_MIPS_DSP_R215281529WEBP_DSP_INIT_STUB(VP8EncDspInitMIPSdspR2)15301531#endif // WEBP_USE_MIPS_DSP_R2153215331534