CoCalc -- bindings.rs

GitHub Repository: google/crosvm
Path: blob/main/hypervisor/src/halla/halla_sys/aarch64/bindings.rs
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/* automatically generated by tools/bindgen-all-the-things */
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#![allow(clippy::missing_safety_doc)]
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#![allow(clippy::undocumented_unsafe_blocks)]
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#![allow(clippy::upper_case_acronyms)]
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#![allow(non_upper_case_globals)]
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#![allow(non_camel_case_types)]
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#![allow(non_snake_case)]
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#![allow(dead_code)]
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pub const HWCAP_FP: u32 = 1;
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pub const HWCAP_ASIMD: u32 = 2;
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pub const HWCAP_EVTSTRM: u32 = 4;
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pub const HWCAP_AES: u32 = 8;
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pub const HWCAP_PMULL: u32 = 16;
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pub const HWCAP_SHA1: u32 = 32;
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pub const HWCAP_SHA2: u32 = 64;
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pub const HWCAP_CRC32: u32 = 128;
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pub const HWCAP_ATOMICS: u32 = 256;
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pub const HWCAP_FPHP: u32 = 512;
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pub const HWCAP_ASIMDHP: u32 = 1024;
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pub const HWCAP_CPUID: u32 = 2048;
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pub const HWCAP_ASIMDRDM: u32 = 4096;
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pub const HWCAP_JSCVT: u32 = 8192;
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pub const HWCAP_FCMA: u32 = 16384;
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pub const HWCAP_LRCPC: u32 = 32768;
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pub const HWCAP_DCPOP: u32 = 65536;
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pub const HWCAP_SHA3: u32 = 131072;
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pub const HWCAP_SM3: u32 = 262144;
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pub const HWCAP_SM4: u32 = 524288;
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pub const HWCAP_ASIMDDP: u32 = 1048576;
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pub const HWCAP_SHA512: u32 = 2097152;
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pub const HWCAP_SVE: u32 = 4194304;
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pub const HWCAP_ASIMDFHM: u32 = 8388608;
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pub const HWCAP_DIT: u32 = 16777216;
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pub const HWCAP_USCAT: u32 = 33554432;
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pub const HWCAP_ILRCPC: u32 = 67108864;
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pub const HWCAP_FLAGM: u32 = 134217728;
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pub const HWCAP_SSBS: u32 = 268435456;
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pub const HWCAP_SB: u32 = 536870912;
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pub const HWCAP_PACA: u32 = 1073741824;
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pub const HWCAP_PACG: u32 = 2147483648;
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pub const HWCAP2_DCPODP: u32 = 1;
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pub const HWCAP2_SVE2: u32 = 2;
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pub const HWCAP2_SVEAES: u32 = 4;
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pub const HWCAP2_SVEPMULL: u32 = 8;
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pub const HWCAP2_SVEBITPERM: u32 = 16;
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pub const HWCAP2_SVESHA3: u32 = 32;
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pub const HWCAP2_SVESM4: u32 = 64;
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pub const HWCAP2_FLAGM2: u32 = 128;
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pub const HWCAP2_FRINT: u32 = 256;
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pub const HWCAP2_SVEI8MM: u32 = 512;
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pub const HWCAP2_SVEF32MM: u32 = 1024;
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pub const HWCAP2_SVEF64MM: u32 = 2048;
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pub const HWCAP2_SVEBF16: u32 = 4096;
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pub const HWCAP2_I8MM: u32 = 8192;
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pub const HWCAP2_BF16: u32 = 16384;
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pub const HWCAP2_DGH: u32 = 32768;
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pub const HWCAP2_RNG: u32 = 65536;
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pub const HWCAP2_BTI: u32 = 131072;
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pub const HWCAP2_MTE: u32 = 262144;
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pub const HWCAP2_ECV: u32 = 524288;
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pub const HWCAP2_AFP: u32 = 1048576;
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pub const HWCAP2_RPRES: u32 = 2097152;
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pub const HWCAP2_MTE3: u32 = 4194304;
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pub const HWCAP2_SME: u32 = 8388608;
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pub const HWCAP2_SME_I16I64: u32 = 16777216;
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pub const HWCAP2_SME_F64F64: u32 = 33554432;
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pub const HWCAP2_SME_I8I32: u32 = 67108864;
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pub const HWCAP2_SME_F16F32: u32 = 134217728;
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pub const HWCAP2_SME_B16F32: u32 = 268435456;
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pub const HWCAP2_SME_F32F32: u32 = 536870912;
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pub const HWCAP2_SME_FA64: u32 = 1073741824;
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pub const HWCAP2_WFXT: u32 = 2147483648;
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pub const HWCAP2_EBF16: u64 = 4294967296;
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pub const HWCAP2_SVE_EBF16: u64 = 8589934592;
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pub const __SVE_VQ_BYTES: u32 = 16;
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pub const __SVE_VQ_MIN: u32 = 1;
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pub const __SVE_VQ_MAX: u32 = 512;
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pub const __SVE_VL_MIN: u32 = 16;
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pub const __SVE_VL_MAX: u32 = 8192;
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pub const __SVE_NUM_ZREGS: u32 = 32;
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pub const __SVE_NUM_PREGS: u32 = 16;
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pub const __SVE_ZREGS_OFFSET: u32 = 0;
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pub const PSR_MODE_EL0t: u32 = 0;
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pub const PSR_MODE_EL1t: u32 = 4;
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pub const PSR_MODE_EL1h: u32 = 5;
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pub const PSR_MODE_EL2t: u32 = 8;
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pub const PSR_MODE_EL2h: u32 = 9;
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pub const PSR_MODE_EL3t: u32 = 12;
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pub const PSR_MODE_EL3h: u32 = 13;
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pub const PSR_MODE_MASK: u32 = 15;
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pub const PSR_MODE32_BIT: u32 = 16;
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pub const PSR_F_BIT: u32 = 64;
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pub const PSR_I_BIT: u32 = 128;
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pub const PSR_A_BIT: u32 = 256;
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pub const PSR_D_BIT: u32 = 512;
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pub const PSR_BTYPE_MASK: u32 = 3072;
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pub const PSR_SSBS_BIT: u32 = 4096;
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pub const PSR_PAN_BIT: u32 = 4194304;
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pub const PSR_UAO_BIT: u32 = 8388608;
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pub const PSR_DIT_BIT: u32 = 16777216;
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pub const PSR_TCO_BIT: u32 = 33554432;
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pub const PSR_V_BIT: u32 = 268435456;
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pub const PSR_C_BIT: u32 = 536870912;
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pub const PSR_Z_BIT: u32 = 1073741824;
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pub const PSR_N_BIT: u32 = 2147483648;
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pub const PSR_BTYPE_SHIFT: u32 = 10;
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pub const PSR_f: u32 = 4278190080;
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pub const PSR_s: u32 = 16711680;
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pub const PSR_x: u32 = 65280;
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pub const PSR_c: u32 = 255;
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pub const PSR_BTYPE_NONE: u32 = 0;
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pub const PSR_BTYPE_JC: u32 = 1024;
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pub const PSR_BTYPE_C: u32 = 2048;
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pub const PSR_BTYPE_J: u32 = 3072;
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pub const PTRACE_SYSEMU: u32 = 31;
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pub const PTRACE_SYSEMU_SINGLESTEP: u32 = 32;
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pub const PTRACE_PEEKMTETAGS: u32 = 33;
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pub const PTRACE_POKEMTETAGS: u32 = 34;
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pub const SVE_PT_REGS_MASK: u32 = 1;
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pub const SVE_PT_REGS_FPSIMD: u32 = 0;
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pub const SVE_PT_REGS_SVE: u32 = 1;
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pub const SVE_PT_VL_INHERIT: u32 = 2;
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pub const SVE_PT_VL_ONEXEC: u32 = 4;
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pub const ZA_PT_VL_INHERIT: u32 = 2;
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pub const ZA_PT_VL_ONEXEC: u32 = 4;
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pub const HVM_SYSTEM_EVENT_SHUTDOWN: u32 = 1;
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pub const HVM_SYSTEM_EVENT_RESET: u32 = 2;
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pub const HVM_SYSTEM_EVENT_CRASH: u32 = 3;
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pub const HVM_SYSTEM_EVENT_WAKEUP: u32 = 4;
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pub const HVM_SYSTEM_EVENT_SUSPEND: u32 = 5;
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pub const HVM_SYSTEM_EVENT_SEV_TERM: u32 = 6;
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pub const GIC_V3_NR_LRS: u32 = 16;
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pub const HVM_IOC_MAGIC: u32 = 76;
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pub const HVM_CAP_ARM_VM_IPA_SIZE: u32 = 4673601;
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pub const HVM_CAP_ARM_PROTECTED_VM: u32 = 5264973;
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pub const HVM_VM_TYPE_ARM_PROTECTED: u32 = 2147483648; // (1UL << 31)
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pub const HVM_VM_TYPE_IPA_SIZE_MASK: u32 = 255;
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pub const HVM_USER_MEM_REGION_GUEST_MEM: u32 = 1;
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pub const HVM_USER_MEM_REGION_PROTECT_FW: u32 = 2;
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pub const HVM_USER_MEM_REGION_STATIC_SWIOTLB: u32 = 4;
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pub const HVM_IRQ_VCPU2_SHIFT: u32 = 28;
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pub const HVM_IRQ_VCPU2_MASK: u32 = 15;
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pub const HVM_IRQ_TYPE_SHIFT: u32 = 24;
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pub const HVM_IRQ_TYPE_MASK: u32 = 15;
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pub const HVM_IRQ_VCPU_SHIFT: u32 = 16;
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pub const HVM_IRQ_VCPU_MASK: u32 = 255;
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pub const HVM_IRQ_NUM_SHIFT: u32 = 0;
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pub const HVM_IRQ_NUM_MASK: u32 = 65535;
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pub const HVM_IRQ_TYPE_CPU: u32 = 0;
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pub const HVM_IRQ_TYPE_SPI: u32 = 1;
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pub const HVM_IRQ_TYPE_PPI: u32 = 2;
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pub const HVM_IRQ_CPU_IRQ: u32 = 0;
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pub const HVM_IRQ_CPU_FIQ: u32 = 1;
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pub const HVM_IRQFD_FLAG_DEASSIGN: u32 = 1;
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pub const HVM_IRQFD_FLAG_RESAMPLE: u32 = 2;
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pub const HVM_CAP_ARM_PVM_SET_PVMFW_IPA: u32 = 0;
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pub const HVM_CAP_ARM_PVM_GET_PVMFW_SIZE: u32 = 1;
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pub const HVM_REG_ARCH_MASK: i64 = -72057594037927936;
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pub const HVM_REG_GENERIC: u32 = 0;
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pub const HVM_REG_ARM: u64 = 4611686018427387904;
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pub const HVM_REG_ARM64: u64 = 6917529027641081856;
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pub const HVM_REG_SIZE_SHIFT: u32 = 52;
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pub const HVM_REG_SIZE_MASK: u64 = 67553994410557440;
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pub const HVM_REG_SIZE_U8: u32 = 0;
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pub const HVM_REG_SIZE_U16: u64 = 4503599627370496;
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pub const HVM_REG_SIZE_U32: u64 = 9007199254740992;
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pub const HVM_REG_SIZE_U64: u64 = 13510798882111488;
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pub const HVM_REG_SIZE_U128: u64 = 18014398509481984;
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pub const HVM_REG_SIZE_U256: u64 = 22517998136852480;
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pub const HVM_REG_SIZE_U512: u64 = 27021597764222976;
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pub const HVM_REG_SIZE_U1024: u64 = 31525197391593472;
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pub const HVM_REG_SIZE_U2048: u64 = 36028797018963968;
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pub const HVM_NR_SPSR: u32 = 5;
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pub const HVM_REG_ARM_COPROC_MASK: u32 = 268369920;
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pub const HVM_REG_ARM_COPROC_SHIFT: u32 = 16;
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pub const HVM_REG_ARM_CORE: u32 = 1048576;
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pub const HVM_REG_ARM_DEMUX: u32 = 1114112;
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pub const HVM_REG_ARM_DEMUX_ID_MASK: u32 = 65280;
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pub const HVM_REG_ARM_DEMUX_ID_SHIFT: u32 = 8;
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pub const HVM_REG_ARM_DEMUX_ID_CCSIDR: u32 = 0;
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pub const HVM_REG_ARM_DEMUX_VAL_MASK: u32 = 255;
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pub const HVM_REG_ARM_DEMUX_VAL_SHIFT: u32 = 0;
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pub const HVM_REG_ARM64_SYSREG: u32 = 1245184;
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pub const HVM_REG_ARM64_SYSREG_OP0_MASK: u32 = 49152;
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pub const HVM_REG_ARM64_SYSREG_OP0_SHIFT: u32 = 14;
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pub const HVM_REG_ARM64_SYSREG_OP1_MASK: u32 = 14336;
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pub const HVM_REG_ARM64_SYSREG_OP1_SHIFT: u32 = 11;
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pub const HVM_REG_ARM64_SYSREG_CRN_MASK: u32 = 1920;
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pub const HVM_REG_ARM64_SYSREG_CRN_SHIFT: u32 = 7;
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pub const HVM_REG_ARM64_SYSREG_CRM_MASK: u32 = 120;
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pub const HVM_REG_ARM64_SYSREG_CRM_SHIFT: u32 = 3;
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pub const HVM_REG_ARM64_SYSREG_OP2_MASK: u32 = 7;
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pub const HVM_REG_ARM64_SYSREG_OP2_SHIFT: u32 = 0;
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pub type __le16 = u16;
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pub type __be16 = u16;
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pub type __le32 = u32;
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pub type __be32 = u32;
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pub type __le64 = u64;
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pub type __be64 = u64;
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pub type __sum16 = u16;
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pub type __wsum = u32;
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pub type __poll_t = ::std::os::raw::c_uint;
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct user_pt_regs {
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    pub regs: [u64; 31usize],
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    pub sp: u64,
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    pub pc: u64,
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    pub pstate: u64,
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}
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#[repr(C)]
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#[repr(align(16))]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct user_fpsimd_state {
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    pub vregs: [__uint128_t; 32usize],
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    pub fpsr: u32,
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    pub fpcr: u32,
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    pub __reserved: [u32; 2usize],
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}
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pub const HVM_FUNC_CREATE_VM: ::std::os::raw::c_uint = 0;
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pub const HVM_FUNC_DESTROY_VM: ::std::os::raw::c_uint = 1;
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pub const HVM_FUNC_CREATE_VCPU: ::std::os::raw::c_uint = 2;
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pub const HVM_FUNC_DESTROY_VCPU: ::std::os::raw::c_uint = 3;
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pub const HVM_FUNC_SET_MEMREGION: ::std::os::raw::c_uint = 4;
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pub const HVM_FUNC_RUN: ::std::os::raw::c_uint = 5;
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pub const HVM_FUNC_GET_REGS: ::std::os::raw::c_uint = 6;
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pub const HVM_FUNC_SET_REGS: ::std::os::raw::c_uint = 7;
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pub const HVM_FUNC_GET_ONE_REG: ::std::os::raw::c_uint = 8;
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pub const HVM_FUNC_SET_ONE_REG: ::std::os::raw::c_uint = 9;
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pub const HVM_FUNC_IRQ_LINE: ::std::os::raw::c_uint = 10;
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pub const HVM_FUNC_CREATE_DEVICE: ::std::os::raw::c_uint = 11;
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pub const HVM_FUNC_PROBE: ::std::os::raw::c_uint = 12;
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pub const HVM_FUNC_ENABLE_CAP: ::std::os::raw::c_uint = 13;
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pub const HVM_FUNC_MEMREGION_PURPOSE: ::std::os::raw::c_uint = 14;
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pub const HVM_FUNC_SET_DTB_CONFIG: ::std::os::raw::c_uint = 15;
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pub const NR_HVM_FUNC: ::std::os::raw::c_uint = 16;
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pub type _bindgen_ty_1 = ::std::os::raw::c_uint;
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pub type hvm_id_t = u16;
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pub type hvm_vcpu_id_t = u16;
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pub const HVM_EXIT_MMIO: ::std::os::raw::c_uint = 1212940289;
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pub const HVM_EXIT_IRQ: ::std::os::raw::c_uint = 1212940290;
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pub const HVM_EXIT_EXCEPTION: ::std::os::raw::c_uint = 1212940291;
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pub const HVM_EXIT_INTERNAL_ERROR: ::std::os::raw::c_uint = 1212940292;
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pub const HVM_EXIT_SYSTEM_EVENT: ::std::os::raw::c_uint = 1212940293;
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pub const HVM_EXIT_SHUTDOWN: ::std::os::raw::c_uint = 1212940294;
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pub type _bindgen_ty_2 = ::std::os::raw::c_uint;
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#[repr(C)]
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#[derive(Copy, Clone)]
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pub struct hvm_vcpu_run {
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    pub exit_reason: u32,
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    pub immediate_exit: u8,
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    pub padding1: [u8; 3usize],
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    pub __bindgen_anon_1: hvm_vcpu_run__bindgen_ty_1,
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}
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#[repr(C)]
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#[derive(Copy, Clone)]
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pub union hvm_vcpu_run__bindgen_ty_1 {
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    pub mmio: hvm_vcpu_run__bindgen_ty_1__bindgen_ty_1,
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    pub system_event: hvm_vcpu_run__bindgen_ty_1__bindgen_ty_2,
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    pub padding: [::std::os::raw::c_char; 256usize],
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}
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_vcpu_run__bindgen_ty_1__bindgen_ty_1 {
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    pub phys_addr: u64,
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    pub data: [u8; 8usize],
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    pub size: u64,
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    pub reg_nr: u32,
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    pub is_write: u8,
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}
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_vcpu_run__bindgen_ty_1__bindgen_ty_2 {
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    pub type_: u32,
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    pub ndata: u32,
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    pub data: [u64; 16usize],
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}
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impl Default for hvm_vcpu_run__bindgen_ty_1 {
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    fn default() -> Self {
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        let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
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        unsafe {
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            ::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
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            s.assume_init()
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        }
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    }
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}
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impl Default for hvm_vcpu_run {
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    fn default() -> Self {
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        let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
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        unsafe {
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            ::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
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            s.assume_init()
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        }
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    }
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}
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_userspace_memory_region {
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    pub slot: u32,
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    pub flags: u32,
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    pub guest_phys_addr: u64,
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    pub memory_size: u64,
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    pub userspace_addr: u64,
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}
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#[repr(C)]
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#[derive(Copy, Clone)]
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pub struct hvm_irq_level {
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    pub __bindgen_anon_1: hvm_irq_level__bindgen_ty_1,
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    pub level: u32,
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}
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#[repr(C)]
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#[derive(Copy, Clone)]
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pub union hvm_irq_level__bindgen_ty_1 {
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    pub irq: u32,
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    pub status: i32,
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}
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impl Default for hvm_irq_level__bindgen_ty_1 {
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    fn default() -> Self {
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        let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
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        unsafe {
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            ::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
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            s.assume_init()
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        }
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    }
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}
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impl Default for hvm_irq_level {
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    fn default() -> Self {
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        let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
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        unsafe {
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            ::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
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            s.assume_init()
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        }
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    }
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}
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_irqfd {
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    pub fd: u32,
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    pub gsi: u32,
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    pub flags: u32,
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    pub resamplefd: u32,
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    pub pad: [u8; 16usize],
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}
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pub const hvm_ioeventfd_flag_nr_datamatch: ::std::os::raw::c_uint = 0;
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pub const hvm_ioeventfd_flag_nr_pio: ::std::os::raw::c_uint = 1;
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pub const hvm_ioeventfd_flag_nr_deassign: ::std::os::raw::c_uint = 2;
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pub const hvm_ioeventfd_flag_nr_max: ::std::os::raw::c_uint = 3;
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pub type _bindgen_ty_3 = ::std::os::raw::c_uint;
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#[repr(C)]
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#[derive(Debug, Copy, Clone)]
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pub struct hvm_ioeventfd {
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    pub datamatch: u64,
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    pub addr: u64,
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    pub len: u32,
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    pub fd: i32,
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    pub flags: u32,
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    pub pad: [u8; 36usize],
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}
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impl Default for hvm_ioeventfd {
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    fn default() -> Self {
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        let mut s = ::std::mem::MaybeUninit::<Self>::uninit();
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        unsafe {
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            ::std::ptr::write_bytes(s.as_mut_ptr(), 0, 1);
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            s.assume_init()
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        }
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    }
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}
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pub const hvm_device_type_HVM_DEV_TYPE_ARM_VGIC_V3_DIST: hvm_device_type = 0;
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pub const hvm_device_type_HVM_DEV_TYPE_ARM_VGIC_V3_REDIST: hvm_device_type = 1;
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pub const hvm_device_type_HVM_DEV_TYPE_MAX: hvm_device_type = 2;
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pub type hvm_device_type = ::std::os::raw::c_uint;
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_create_device {
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    pub dev_type: u32,
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    pub id: u32,
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    pub flags: u64,
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    pub dev_addr: u64,
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    pub dev_reg_size: u64,
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    pub attr_addr: u64,
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    pub attr_size: u64,
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}
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_dtb_config {
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    pub dtb_addr: u64,
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    pub dtb_size: u64,
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}
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_enable_cap {
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    pub cap: u64,
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    pub args: [u64; 5usize],
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}
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#[repr(C)]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_one_reg {
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    pub id: u64,
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    pub addr: u64,
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}
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#[repr(C)]
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#[repr(align(16))]
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#[derive(Debug, Default, Copy, Clone)]
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pub struct hvm_regs {
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    pub regs: user_pt_regs,
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    pub sp_el1: u64,
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    pub elr_el1: u64,
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    pub spsr: [u64; 5usize],
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    pub __bindgen_padding_0: u64,
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    pub fp_regs: user_fpsimd_state,
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}
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pub type __uint128_t = u128;
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