Path: blob/master/algo/rainforest.c
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// RainForest hash algorithm1// Author: Bill Schneider2// Date: Feb 13th, 20183//4// RainForest uses native integer operations which are extremely fast on5// modern 64-bit processors, significantly slower on 32-bit processors such6// as GPUs, and extremely slow if at all implementable on FPGAs and ASICs.7// It makes an intensive use of the L1 cache to maintain a heavy intermediary8// state favoring modern CPUs compared to GPUs (small L1 cache shared by many9// shaders) or FPGAs (very hard to implement the required low-latency cache)10// when scanning ranges for nonces. The purpose is to create a fair balance11// between all mining equipments, from mobile phones to extreme performance12// GPUs and to rule out farming factories relying on ASICs and FPGAs. The13// CRC32 instruction is used a lot as it is extremely fast on low-power ARM14// chips and allows such devices to rival high-end PCs mining performance.15//16// Tests on various devices have shown the following performance :17// +--------------------------------------------------------------------------+18// | CPU/GPU Clock Threads Full hash Nonce scan Watts Cost |19// | (MHz) (80 bytes) (4 bytes) total |20// | Core i7-6700k 4000 8 390 kH/s 1642 kH/s 200 ~$350+PC |21// | Radeon RX560 1300 1024 1100 kH/s 1650 kH/s 300 ~$180+PC |22// | RK3368 (8*A53) 1416 8 534 kH/s 1582 kH/s 6 $60 (Geekbox) |23// +--------------------------------------------------------------------------+24//25// Build instructions on Ubuntu 16.04 :26// - on x86: use gcc -march=native or -maes to enable AES-NI27// - on ARMv8: use gcc -march=native or -march=armv8-a+crypto+crc to enable28// CRC32 and AES extensions.29//30// Note: always use the same options to build all files!3132#include <miner.h>3334#include <stdlib.h>35#include <stdint.h>36#include <string.h>37#include <stdio.h>3839//#define DEBUG_ALGO4041/* Rijndael's substitution box for sub_bytes step */42static uint8_t SBOX[256] = {430x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,440xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,450xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,460x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,470x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,480x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,490xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,500x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,510xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,520x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,530xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,540xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,550xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,560x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,570xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,580x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x1659};6061/*--- The parts below are not used when crypto extensions are available ---*/62/* Use -march=armv8-a+crypto on ARMv8 to use crypto extensions */63/* Use -maes on x86_64 to use AES-NI */64#if defined(RF_NOASM) || (!defined(__aarch64__) || !defined(__ARM_FEATURE_CRYPTO)) && (!defined(__x86_64__) || !defined(__AES__))6566/* shifts to do for shift_rows step */67static uint8_t shifts[16] = {680, 5, 10, 15,694, 9, 14, 3,708, 13, 2, 7,7112, 1, 6, 1172};7374/* add the round key to the state with simple XOR operation */75static void add_round_key(uint8_t * state, uint8_t * rkey) {76uint8_t i;77for (i = 0; i < 16; i++)78state[i] ^= rkey[i];79}8081/* substitute all bytes using Rijndael's substitution box */82static void sub_bytes(uint8_t * state) {83uint8_t i;84for (i = 0; i < 16; i++)85state[i] = SBOX[state[i]];86}8788/* imagine the state not as 1-dimensional, but a 4x4 grid;89* this step shifts the rows of this grid around */90static void shift_rows(uint8_t * state) {91uint8_t temp[16];92uint8_t i;9394for (i = 0; i < 16; i++) {95temp[i] = state[shifts[i]];96}9798for (i = 0; i < 16; i++) {99state[i] = temp[i];100}101}102103/* mix columns */104static void mix_columns(uint8_t * state) {105uint8_t a[4];106uint8_t b[4];107uint8_t h, i, k;108109for (k = 0; k < 4; k++) {110for (i = 0; i < 4; i++) {111a[i] = state[i + 4 * k];112h = state[i + 4 * k] & 0x80; /* hi bit */113b[i] = state[i + 4 * k] << 1;114115if (h == 0x80) {116b[i] ^= 0x1b; /* Rijndael's Galois field */117}118}119120state[4 * k] = b[0] ^ a[3] ^ a[2] ^ b[1] ^ a[1];121state[1 + 4 * k] = b[1] ^ a[0] ^ a[3] ^ b[2] ^ a[2];122state[2 + 4 * k] = b[2] ^ a[1] ^ a[0] ^ b[3] ^ a[3];123state[3 + 4 * k] = b[3] ^ a[2] ^ a[1] ^ b[0] ^ a[0];124}125}126#endif // (!defined(__aarch64__) || !defined(__ARM_FEATURE_CRYPTO)) && (!defined(__x86_64__) || !defined(__AES__))127128129/* key schedule stuff */130131/* simple function to rotate 4 byte array */132static inline uint32_t rotate32(uint32_t in) {133#if defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__134in = (in >> 8) | (in << 24);135#elif defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__136in = (in << 8) | (in >> 24);137#else138uint8_t *b = (uint8_t *)&in, temp = b[0];139b[0] = b[1]; b[1] = b[2]; b[2] = b[3]; b[3] = temp;140#endif141return in;142}143144/* key schedule core operation */145static inline uint32_t sbox(uint32_t in, uint8_t n) {146in = (SBOX[in & 255]) | (SBOX[(in >> 8) & 255] << 8) | (SBOX[(in >> 16) & 255] << 16) | (SBOX[(in >> 24) & 255] << 24);147#if defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__148in ^= n;149#elif defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__150in ^= n << 24;151#else152*(uint8_t *)&in ^= n;153#endif154return in;155}156157// this version is optimized for exactly two rounds.158// _state_ must be 16-byte aligned.159static void aes2r_encrypt(uint8_t * state, uint8_t * key) {160uint32_t _ALIGN(16) key_schedule[12];161uint32_t t;162163/* initialize key schedule; its first 16 bytes are the key */164key_schedule[0] = ((uint32_t *)key)[0];165key_schedule[1] = ((uint32_t *)key)[1];166key_schedule[2] = ((uint32_t *)key)[2];167key_schedule[3] = ((uint32_t *)key)[3];168t = key_schedule[3];169170t = rotate32(t);171t = sbox(t, 1);172t = key_schedule[4] = key_schedule[0] ^ t;173t = key_schedule[5] = key_schedule[1] ^ t;174t = key_schedule[6] = key_schedule[2] ^ t;175t = key_schedule[7] = key_schedule[3] ^ t;176177t = rotate32(t);178t = sbox(t, 2);179t = key_schedule[8] = key_schedule[4] ^ t;180t = key_schedule[9] = key_schedule[5] ^ t;181t = key_schedule[10] = key_schedule[6] ^ t;182t = key_schedule[11] = key_schedule[7] ^ t;183184// Use -march=armv8-a+crypto+crc to get this one185#if defined(__aarch64__) && defined(__ARM_FEATURE_CRYPTO)186asm volatile(187"ld1 {v0.16b},[%0] \n"188"ld1 {v1.16b,v2.16b,v3.16b},[%1] \n"189"aese v0.16b,v1.16b \n" // round1: add_round_key,sub_bytes,shift_rows190"aesmc v0.16b,v0.16b \n" // round1: mix_columns191"aese v0.16b,v2.16b \n" // round2: add_round_key,sub_bytes,shift_rows192"eor v0.16b,v0.16b,v3.16b \n" // finish: add_round_key193"st1 {v0.16b},[%0] \n"194: /* only output is in *state */195: "r"(state), "r"(key_schedule)196: "v0", "v1", "v2", "v3", "cc", "memory");197198// Use -maes to get this one199#elif defined(__x86_64__) && defined(__AES__)200asm volatile(201"movups (%0), %%xmm0 \n"202"movups (%1), %%xmm1 \n"203"pxor %%xmm1,%%xmm0 \n" // add_round_key(state, key_schedule)204"movups 16(%1),%%xmm2 \n"205"movups 32(%1),%%xmm1 \n"206"aesenc %%xmm2,%%xmm0 \n" // first round207"aesenclast %%xmm1,%%xmm0 \n" // final round208"movups %%xmm0, (%0) \n"209: /* only output is in *state */210: "r"(state), "r" (key_schedule)211: "xmm0", "xmm1", "xmm2", "cc", "memory");212213#else214/* first round of the algorithm */215add_round_key(state, (void*)&key_schedule[0]);216sub_bytes(state);217shift_rows(state);218mix_columns(state);219add_round_key(state, (void*)&key_schedule[4]);220221/* final round of the algorithm */222sub_bytes(state);223shift_rows(state);224add_round_key(state, (void*)&key_schedule[8]);225226#endif227}228229// this seems necessary only for gcc, otherwise hash is bogus230#ifdef _MSC_VER231typedef unsigned long ulong;232typedef uint8_t rf_u8;233typedef uint16_t rf_u16;234typedef uint32_t rf_u32;235typedef uint64_t rf_u64;236#else237typedef __attribute__((may_alias)) uint8_t rf_u8;238typedef __attribute__((may_alias)) uint16_t rf_u16;239typedef __attribute__((may_alias)) uint32_t rf_u32;240typedef __attribute__((may_alias)) uint64_t rf_u64;241#endif242243// 2048 entries for the rambox => 16kB244#define RAMBOX_SIZE 2048245#define RAMBOX_LOOPS 4246#define RAMBOX_HIST 32247248typedef union {249rf_u8 b[32];250rf_u16 w[16];251rf_u32 d[8];252rf_u64 q[4];253} hash256_t;254255typedef struct _ALIGN(128) rf_ctx {256uint32_t word; // LE pending message257uint32_t len; // total message length258uint32_t crc;259uint32_t changes; // must remain lower than RAMBOX_HIST260hash256_t _ALIGN(32) hash;261uint16_t hist[RAMBOX_HIST];262uint64_t _ALIGN(64) rambox[RAMBOX_SIZE];263} rf256_ctx_t;264265// these archs are fine with unaligned reads266#if defined(__x86_64__)||defined(__aarch64__)267#define RF_UNALIGNED_LE64268#define RF_UNALIGNED_LE32269#elif defined(__i386__)||defined(__ARM_ARCH_7A__)270#define RF_UNALIGNED_LE32271#endif272273#define RF256_INIT_CRC 20180213274275// the table is used as an 8 bit-aligned array of uint64_t for the first word,276// and as a 16 bit-aligned array of uint64_t for the second word. It is filled277// with the sha256 of "RainForestProCpuAntiAsic", iterated over and over until278// the table is filled. The highest offset being ((uint16_t *)table)[255] we279// need to add 6 extra bytes at the end to read an uint64_t. Maybe calculated280// on a UNIX system with this loop :281//282// ref="RainForestProCpuAntiAsic"283// for ((i=0;i<18;i++)); do284// set $(echo -n $ref|sha256sum)285// echo $1|sed 's/\(..\)/0x\1,/g'286// ref=$(printf $(echo $1|sed 's/\(..\)/\\x\1/g'))287// done288289const uint8_t rf_table[256*2+6] = {2900x8e,0xc1,0xa8,0x04,0x38,0x78,0x7c,0x54,0x29,0x23,0x1b,0x78,0x9f,0xf9,0x27,0x54,2910x11,0x78,0x95,0xb6,0xaf,0x78,0x45,0x16,0x2b,0x9e,0x91,0xe8,0x97,0x25,0xf8,0x63,2920x82,0x56,0xcf,0x48,0x6f,0x82,0x14,0x0d,0x61,0xbe,0x47,0xd1,0x37,0xee,0x30,0xa9,2930x28,0x1e,0x4b,0xbf,0x07,0xcd,0x41,0xdf,0x23,0x21,0x12,0xb8,0x81,0x99,0x1d,0xe6,2940x68,0xcf,0xfa,0x2d,0x8e,0xb9,0x88,0xa7,0x15,0xce,0x9e,0x2f,0xeb,0x1b,0x0f,0x67,2950x20,0x68,0x6c,0xa9,0x5d,0xc1,0x7c,0x76,0xdf,0xbd,0x98,0x61,0xb4,0x14,0x65,0x40,2960x1e,0x72,0x51,0x74,0x93,0xd3,0xad,0xbe,0x46,0x0a,0x25,0xfb,0x6a,0x5e,0x1e,0x8a,2970x5a,0x03,0x3c,0xab,0x12,0xc2,0xd4,0x07,0x91,0xab,0xc9,0xdf,0x92,0x2c,0x85,0x6a,2980xa6,0x25,0x1e,0x66,0x50,0x26,0x4e,0xa8,0xbd,0xda,0x88,0x1b,0x95,0xd4,0x00,0xeb,2990x0d,0x1c,0x9b,0x3c,0x86,0xc7,0xb2,0xdf,0xb4,0x5a,0x36,0x15,0x8e,0x04,0xd2,0x54,3000x79,0xd2,0x3e,0x3d,0x99,0x50,0xa6,0x12,0x4c,0x32,0xc8,0x51,0x14,0x4d,0x4b,0x0e,3010xbb,0x17,0x80,0x8f,0xa4,0xc4,0x99,0x72,0xd7,0x14,0x4b,0xef,0xed,0x14,0xe9,0x17,3020xfa,0x9b,0x5d,0x37,0xd6,0x2f,0xef,0x02,0xd6,0x71,0x0a,0xbd,0xc5,0x40,0x11,0x90,3030x90,0x4e,0xb4,0x4c,0x72,0x51,0x7a,0xd8,0xba,0x30,0x4d,0x8c,0xe2,0x11,0xbb,0x6d,3040x4b,0xbc,0x6f,0x14,0x0c,0x9f,0xfa,0x5e,0x66,0x40,0x45,0xcb,0x7d,0x1b,0x3a,0xc5,3050x5e,0x9c,0x1e,0xcc,0xbd,0x16,0x3b,0xcf,0xfb,0x2a,0xd2,0x08,0x2a,0xf8,0x3d,0x46,3060x93,0x90,0xb3,0x66,0x81,0x34,0x7f,0x6d,0x9b,0x8c,0x99,0x03,0xc5,0x27,0xa3,0xd9,3070xce,0x90,0x88,0x0f,0x55,0xc3,0xa1,0x60,0x53,0xc8,0x0d,0x25,0xae,0x61,0xd9,0x72,3080x48,0x1d,0x6c,0x61,0xd2,0x87,0xdd,0x3d,0x23,0xf5,0xde,0x93,0x39,0x4c,0x43,0x9a,3090xf9,0x37,0xf2,0x61,0xd7,0xf8,0xea,0x65,0xf0,0xf1,0xde,0x3f,0x05,0x57,0x83,0x81,3100xde,0x02,0x62,0x49,0xd4,0x32,0x7e,0x4a,0xd4,0x9f,0x40,0x7e,0xb9,0x91,0xb1,0x35,3110xf7,0x62,0x3f,0x65,0x9e,0x4d,0x2b,0x10,0xde,0xd4,0x77,0x64,0x0f,0x84,0xad,0x92,3120xe7,0xa3,0x8a,0x10,0xc1,0x14,0xeb,0x57,0xc4,0xad,0x8e,0xc2,0xc7,0x32,0xa3,0x7e,3130x50,0x1f,0x7c,0xbb,0x2e,0x5f,0xf5,0x18,0x22,0xea,0xec,0x9d,0xa4,0x77,0xcd,0x85,3140x04,0x2f,0x20,0x61,0x72,0xa7,0x0c,0x92,0x06,0x4d,0x01,0x70,0x9b,0x35,0xa1,0x27,3150x32,0x6e,0xb9,0x78,0xe0,0xaa,0x5f,0x91,0xa6,0x51,0xe3,0x63,0xf8,0x97,0x2f,0x60,3160xd9,0xfb,0x15,0xe5,0x59,0xcf,0x31,0x3c,0x61,0xc7,0xb5,0x61,0x2a,0x6b,0xdd,0xd1,3170x09,0x70,0xc0,0xcf,0x94,0x7a,0xcc,0x31,0x94,0xb1,0xa2,0xf6,0x95,0xc0,0x38,0x3d,3180xef,0x19,0x30,0x70,0xdd,0x62,0x32,0x8f,0x7c,0x30,0xb9,0x18,0xf8,0xe7,0x8f,0x0a,3190xaa,0xb6,0x00,0x86,0xf2,0xe0,0x30,0x5f,0xa2,0xe8,0x00,0x8e,0x05,0xa0,0x22,0x18,3200x9f,0x83,0xd4,0x3a,0x85,0x10,0xb9,0x51,0x8d,0x07,0xf0,0xb3,0xcd,0x9b,0x55,0xa1,3210x14,0xce,0x0f,0xb2,0xcf,0xb8,0xce,0x2d,0xe6,0xe8,0x35,0x32,0x1f,0x22,0xb5,0xec,3220xd0,0xb9,0x72,0xa8,0xb4,0x97323//,0x6e,0x0a,0x47,0xcd,0x5a,0xf0,0xdc,0xeb,0xfd,0x46,324//0xe5,0x6e,0x83,0xe6,0x1a,0xcc,0x4a,0x8b,0xa5,0x28,0x9e,0x50,0x48,0xa9,0xa2,0x6b,325};326327// this is made of the last iteration of the rf_table (18th transformation)328const uint8_t rf256_iv[32] = {3290x78,0xe9,0x90,0xd3,0xb3,0xc8,0x9b,0x7b,0x0a,0xc4,0x86,0x6e,0x4e,0x38,0xb3,0x6b,3300x33,0x68,0x7c,0xed,0x73,0x35,0x4b,0x0a,0x97,0x25,0x4c,0x77,0x7a,0xaa,0x61,0x1b331};332333// crc32 lookup tables334#if !defined(__ARM_FEATURE_CRC32)335const uint32_t rf_crc32_table[256] = {336/* 0x00 */ 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,337/* 0x04 */ 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,338/* 0x08 */ 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,339/* 0x0c */ 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,340/* 0x10 */ 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,341/* 0x14 */ 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,342/* 0x18 */ 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,343/* 0x1c */ 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,344/* 0x20 */ 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,345/* 0x24 */ 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,346/* 0x28 */ 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,347/* 0x2c */ 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,348/* 0x30 */ 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,349/* 0x34 */ 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,350/* 0x38 */ 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,351/* 0x3c */ 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,352/* 0x40 */ 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,353/* 0x44 */ 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,354/* 0x48 */ 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,355/* 0x4c */ 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,356/* 0x50 */ 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,357/* 0x54 */ 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,358/* 0x58 */ 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,359/* 0x5c */ 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,360/* 0x60 */ 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,361/* 0x64 */ 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,362/* 0x68 */ 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,363/* 0x6c */ 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,364/* 0x70 */ 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,365/* 0x74 */ 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,366/* 0x78 */ 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,367/* 0x7c */ 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,368/* 0x80 */ 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,369/* 0x84 */ 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,370/* 0x88 */ 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,371/* 0x8c */ 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,372/* 0x90 */ 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,373/* 0x94 */ 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,374/* 0x98 */ 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,375/* 0x9c */ 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,376/* 0xa0 */ 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,377/* 0xa4 */ 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,378/* 0xa8 */ 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,379/* 0xac */ 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,380/* 0xb0 */ 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,381/* 0xb4 */ 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,382/* 0xb8 */ 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,383/* 0xbc */ 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,384/* 0xc0 */ 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,385/* 0xc4 */ 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,386/* 0xc8 */ 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,387/* 0xcc */ 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,388/* 0xd0 */ 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,389/* 0xd4 */ 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,390/* 0xd8 */ 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,391/* 0xdc */ 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,392/* 0xe0 */ 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,393/* 0xe4 */ 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,394/* 0xe8 */ 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,395/* 0xec */ 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,396/* 0xf0 */ 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,397/* 0xf4 */ 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,398/* 0xf8 */ 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,399/* 0xfc */ 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,400};401#endif402403// compute the crc32 of 32-bit message _msg_ from previous crc _crc_.404// build with -mcpu=cortex-a53+crc to enable native CRC instruction on ARM405static inline uint32_t rf_crc32_32(uint32_t crc, uint32_t msg) {406#if defined(__aarch64__) && defined(__ARM_FEATURE_CRC32)407asm("crc32w %w0,%w0,%w1\n":"+r"(crc):"r"(msg));408#else409crc=crc^msg;410crc=rf_crc32_table[crc&0xff]^(crc>>8);411crc=rf_crc32_table[crc&0xff]^(crc>>8);412crc=rf_crc32_table[crc&0xff]^(crc>>8);413crc=rf_crc32_table[crc&0xff]^(crc>>8);414#endif415return crc;416}417418//static inline uint32_t rf_crc32_24(uint32_t crc, uint32_t msg) {419//#if defined(__aarch64__) && defined(__ARM_FEATURE_CRC32)420// asm("crc32b %w0,%w0,%w1\n":"+r"(crc):"r"(msg));421// asm("crc32h %w0,%w0,%w1\n":"+r"(crc):"r"(msg>>8));422//#else423// crc=crc^msg;424// crc=rf_crc32_table[crc&0xff]^(crc>>8);425// crc=rf_crc32_table[crc&0xff]^(crc>>8);426// crc=rf_crc32_table[crc&0xff]^(crc>>8);427//#endif428// return crc;429//}430//431//static inline uint32_t rf_crc32_16(uint32_t crc, uint32_t msg) {432//#if defined(__aarch64__) && defined(__ARM_FEATURE_CRC32)433// asm("crc32h %w0,%w0,%w1\n":"+r"(crc):"r"(msg));434//#else435// crc=crc^msg;436// crc=rf_crc32_table[crc&0xff]^(crc>>8);437// crc=rf_crc32_table[crc&0xff]^(crc>>8);438//#endif439// return crc;440//}441//442//static inline uint32_t rf_crc32_8(uint32_t crc, uint32_t msg) {443//#if defined(__aarch64__) && defined(__ARM_FEATURE_CRC32)444// asm("crc32b %w0,%w0,%w1\n":"+r"(crc):"r"(msg));445//#else446// crc=crc^msg;447// crc=rf_crc32_table[crc&0xff]^(crc>>8);448//#endif449// return crc;450//}451452// add to _msg_ its own crc32. use -mcpu=cortex-a53+crc to enable native CRC453// instruction on ARM.454static inline uint64_t rf_add64_crc32(uint64_t msg) {455uint64_t crc=0;456#if defined(__aarch64__) && defined(__ARM_FEATURE_CRC32)457asm("crc32x %w0,%w0,%x1\n":"+r"(crc):"r"(msg));458#else459crc^=(uint32_t)msg;460crc=rf_crc32_table[crc&0xff]^(crc>>8);461crc=rf_crc32_table[crc&0xff]^(crc>>8);462crc=rf_crc32_table[crc&0xff]^(crc>>8);463crc=rf_crc32_table[crc&0xff]^(crc>>8);464465crc^=msg>>32;466crc=rf_crc32_table[crc&0xff]^(crc>>8);467crc=rf_crc32_table[crc&0xff]^(crc>>8);468crc=rf_crc32_table[crc&0xff]^(crc>>8);469crc=rf_crc32_table[crc&0xff]^(crc>>8);470#endif471return msg+crc;472}473474// mix the current state with the crc and return the new crc475static inline uint32_t rf_crc32x4(rf_u32 *state, uint32_t crc) {476crc=state[0]=rf_crc32_32(crc, state[0]);477crc=state[1]=rf_crc32_32(crc, state[1]);478crc=state[2]=rf_crc32_32(crc, state[2]);479crc=state[3]=rf_crc32_32(crc, state[3]);480return crc;481}482483// read 64 bit from possibly unaligned memory address _p_ in little endian mode484static inline uint64_t rf_memr64(const uint8_t *p) {485#ifdef RF_UNALIGNED_LE64486return *(uint64_t *)p;487#else488uint64_t ret;489int byte;490for (ret=byte=0; byte<8; byte++)491ret+=(uint64_t)p[byte]<<(byte*8);492return ret;493#endif494}495496// return rainforest lower word entry for index497static inline uint64_t rf_wltable(uint8_t index) {498return rf_memr64(&rf_table[index]);499}500501// return rainforest upper word entry for _index_502static inline uint64_t rf_whtable(uint8_t index) {503return rf_memr64(&rf_table[index*2]);504}505506// rotate left vector _v_ by _bits_ bits507static inline uint64_t rf_rotl64(uint64_t v, uint8_t bits) {508#if !defined(__ARM_ARCH_8A) && !defined(__AARCH64EL__) && !defined(x86_64)509bits&=63;510#endif511return (v<<bits)|(v>>(64-bits));512}513514// rotate right vector _v_ by _bits_ bits515static inline uint64_t rf_rotr64(uint64_t v, uint8_t bits) {516#if !defined(__ARM_ARCH_8A) && !defined(__AARCH64EL__) && !defined(x86_64)517bits&=63;518#endif519return (v>>bits)|(v<<(64-bits));520}521522// reverse all bytes in the word _v_523static inline uint64_t rf_bswap64(uint64_t v) {524#if defined(__x86_64__) && !defined(_MSC_VER)525asm("bswap %0":"+r"(v));526#elif defined(__aarch64__)527asm("rev %0,%0\n":"+r"(v));528#else529v=((v&0xff00ff00ff00ff00ULL)>>8)|((v&0x00ff00ff00ff00ffULL)<<8);530v=((v&0xffff0000ffff0000ULL)>>16)|((v&0x0000ffff0000ffffULL)<<16);531v=(v>>32)|(v<<32);532#endif533return v;534}535536// lookup _old_ in _rambox_, update it and perform a substitution if a matching537// value is found.538static inline uint32_t rf_rambox(rf256_ctx_t *ctx, uint64_t old) {539uint64_t *p, k;540uint32_t idx;541int loops;542543for (loops=0; loops<RAMBOX_LOOPS; loops++) {544old=rf_add64_crc32(old);545idx=old&(RAMBOX_SIZE-1);546if (ctx->changes < RAMBOX_HIST)547ctx->hist[ctx->changes++] = idx;548p=&ctx->rambox[idx];549k = *p;550old+=rf_rotr64(k, (uint8_t) (old/RAMBOX_SIZE));551*p = (int64_t)old < 0 ? k : old;552}553return (uint32_t)old;554}555556// write (_x_,_y_) at cell _cell_ for offset _ofs_557static inline void rf_w128(uint64_t *cell, uint64_t ofs, uint64_t x, uint64_t y) {558#if defined(__ARM_ARCH_8A) || defined(__AARCH64EL__)559// 128 bit at once is faster when exactly two parallelizable instructions are560// used between two calls to keep the pipe full.561asm volatile("stp %0, %1, [%2,#%3]\n\t"562: /* no output */563: "r"(x), "r"(y), "r" (cell), "I" (ofs*8));564#else565cell[ofs+0] = x;566cell[ofs+1] = y;567#endif568}569570// initialize the ram box571static void rf_raminit(rf256_ctx_t *ctx) {572uint64_t pat1 = 0x0123456789ABCDEFULL;573uint64_t pat2 = 0xFEDCBA9876543210ULL;574uint64_t pat3;575uint32_t pos;576uint64_t *rambox = ctx->rambox;577578// Note: no need to mask the higher bits on armv8 nor x86 :579//580// From ARMv8's ref manual :581// The register that is specified for a shift can be 32-bit or582// 64-bit. The amount to be shifted can be specified either as583// an immediate, that is up to register size minus one, or by584// a register where the value is taken only from the bottom five585// (modulo-32) or six (modulo-64) bits.586//587// Here we rotate pat2 by pat1's bits and put it into pat1, and in588// parallel we rotate pat1 by pat2's bits and put it into pat2. Thus589// the two data blocks are exchanged in addition to being rotated.590// What is stored each time is the previous and the rotated blocks,591// which only requires one rotate and a register rename.592593ctx->changes = 0;594for (pos = 0; pos < RAMBOX_SIZE; pos += 16) {595pat3 = pat1;596pat1 = rf_rotr64(pat2, (uint8_t)pat3) + 0x111;597rf_w128(rambox + pos, 0, pat1, pat3);598599pat3 = pat2;600pat2 = rf_rotr64(pat1, (uint8_t)pat3) + 0x222;601rf_w128(rambox + pos, 2, pat2, pat3);602603pat3 = pat1;604pat1 = rf_rotr64(pat2, (uint8_t)pat3) + 0x333;605rf_w128(rambox + pos, 4, pat1, pat3);606607pat3 = pat2;608pat2 = rf_rotr64(pat1, (uint8_t)pat3) + 0x444;609rf_w128(rambox + pos, 6, pat2, pat3);610611pat3 = pat1;612pat1 = rf_rotr64(pat2, (uint8_t)pat3) + 0x555;613rf_w128(rambox + pos, 8, pat1, pat3);614615pat3 = pat2;616pat2 = rf_rotr64(pat1, (uint8_t)pat3) + 0x666;617rf_w128(rambox + pos, 10, pat2, pat3);618619pat3 = pat1;620pat1 = rf_rotr64(pat2, (uint8_t)pat3) + 0x777;621rf_w128(rambox + pos, 12, pat1, pat3);622623pat3 = pat2;624pat2 = rf_rotr64(pat1, (uint8_t)pat3) + 0x888;625rf_w128(rambox + pos, 14, pat2, pat3);626}627}628629// exec the div/mod box. _v0_ and _v1_ must be aligned.630static inline void rf256_divbox(rf_u64 *v0, rf_u64 *v1) {631uint64_t pl, ql, ph, qh;632633//---- low word ---- ---- high word ----634pl=~*v0; ph=~*v1;635ql=rf_bswap64(*v0); qh=rf_bswap64(*v1);636637if (!pl||!ql) { pl=ql=0; }638else if (pl>ql) { uint64_t p=pl; pl=p/ql; ql=p%ql; }639else { uint64_t p=pl; pl=ql/p; ql=ql%p; }640641if (!ph||!qh) { ph=qh=0; }642else if (ph>qh) { uint64_t p=ph; ph=p/qh; qh=p%qh; }643else { uint64_t p=ph; ph=qh/p; qh=qh%p; }644645pl+=qh; ph+=ql;646*v0-=pl; *v1-=ph;647}648649// exec the rotation/add box. _v0_ and _v1_ must be aligned.650static inline void rf256_rotbox(rf_u64 *v0, rf_u64 *v1, uint8_t b0, uint8_t b1) {651uint64_t l, h;652653//---- low word ---- ---- high word ----654l=*v0; h=*v1;655l=rf_rotr64(l,b0); h=rf_rotl64(h,b1);656l+=rf_wltable(b0); h+=rf_whtable(b1);657b0=(uint8_t)l; b1=(uint8_t)h;658l=rf_rotl64(l,b1); h=rf_rotr64(h,b0);659b0=(uint8_t)l; b1=(uint8_t)h;660l=rf_rotr64(l,b1); h=rf_rotl64(h,b0);661*v0=l; *v1=h;662}663664// mix the current state with the current crc665static inline uint32_t rf256_scramble(rf256_ctx_t *ctx) {666return ctx->crc=rf_crc32x4(ctx->hash.d, ctx->crc);667}668669// mix the state with the crc and the pending text, and update the crc670static inline void rf256_inject(rf256_ctx_t *ctx) {671// BS: never <4 bytes with 80 input bytes672//ctx->crc=673// (ctx->bytes&3)==0?rf_crc32_32(rf256_scramble(ctx), ctx->word):674// (ctx->bytes&3)==3?rf_crc32_24(rf256_scramble(ctx), ctx->word):675// (ctx->bytes&3)==2?rf_crc32_16(rf256_scramble(ctx), ctx->word):676// rf_crc32_8(rf256_scramble(ctx), ctx->word);677ctx->crc=rf_crc32_32(rf256_scramble(ctx), ctx->word);678ctx->word=0;679}680681// rotate the hash by 32 bits. Not using streaming instructions (SSE/NEON) is682// faster because the compiler can follow moves an use register renames.683static inline void rf256_rot32x256(hash256_t *hash) {684#if defined(__x86_64__) || defined(__aarch64__) || defined(__ARM_ARCH_7A__)685uint32_t t0, t1, t2;686687t0=hash->d[0];688t1=hash->d[1];689t2=hash->d[2];690hash->d[1]=t0;691hash->d[2]=t1;692693t0=hash->d[3];694t1=hash->d[4];695hash->d[3]=t2;696hash->d[4]=t0;697698t2=hash->d[5];699t0=hash->d[6];700hash->d[5]=t1;701hash->d[6]=t2;702703t1=hash->d[7];704hash->d[7]=t0;705hash->d[0]=t1;706#else707uint32_t tmp=hash->d[7];708709memmove(&hash->d[1], &hash->d[0], 28);710hash->d[0]=tmp;711#endif712}713714// encrypt the first 128 bits of the hash using the last 128 bits as the key715static inline void rf256_aesenc(rf256_ctx_t *ctx) {716aes2r_encrypt((uint8_t *)ctx->hash.b, (uint8_t *)ctx->hash.b+16);717}718719// each new round consumes exactly 32 bits of text at once and perturbates720// 128 bits of output, 96 of which overlap with the previous round, and 32721// of which are new. With 5 rounds or more each output bit depends on every722// input bit.723static inline void rf256_one_round(rf256_ctx_t *ctx) {724uint64_t carry;725726rf256_rot32x256(&ctx->hash);727728carry=((uint64_t)ctx->len << 32) + ctx->crc;729rf256_scramble(ctx);730rf256_divbox(ctx->hash.q, ctx->hash.q+1);731rf256_scramble(ctx);732733carry=rf_rambox(ctx, carry);734rf256_rotbox(ctx->hash.q, ctx->hash.q+1, (uint8_t)carry, (uint8_t) (carry>>56));735rf256_scramble(ctx);736rf256_divbox(ctx->hash.q, ctx->hash.q+1);737rf256_scramble(ctx);738rf256_divbox(ctx->hash.q, ctx->hash.q+1);739rf256_scramble(ctx);740741carry=rf_rambox(ctx, carry);742rf256_rotbox(ctx->hash.q, ctx->hash.q+1, (uint8_t)(carry>>8), (uint8_t) (carry>>48));743rf256_scramble(ctx);744rf256_divbox(ctx->hash.q, ctx->hash.q+1);745rf256_scramble(ctx);746rf256_divbox(ctx->hash.q, ctx->hash.q+1);747rf256_scramble(ctx);748749carry=rf_rambox(ctx, carry);750rf256_rotbox(ctx->hash.q, ctx->hash.q+1, (uint8_t)(carry>>16), (uint8_t) (carry>>40));751rf256_scramble(ctx);752rf256_divbox(ctx->hash.q, ctx->hash.q+1);753rf256_scramble(ctx);754rf256_divbox(ctx->hash.q, ctx->hash.q+1);755rf256_scramble(ctx);756757carry=rf_rambox(ctx,carry);758rf256_rotbox(ctx->hash.q, ctx->hash.q+1, (uint8_t)(carry>>24), (uint8_t) (carry>>32));759rf256_scramble(ctx);760rf256_divbox(ctx->hash.q, ctx->hash.q+1);761rf256_inject(ctx);762rf256_aesenc(ctx);763rf256_scramble(ctx);764}765766// initialize the hash state767static void rf256_init(rf256_ctx_t *ctx) {768rf_raminit(ctx);769memcpy(ctx->hash.b, rf256_iv, sizeof(ctx->hash.b));770ctx->crc=RF256_INIT_CRC;771ctx->word=ctx->len=0;772}773774// update the hash context _ctx_ with _len_ bytes from message _msg_775static void rf256_update(rf256_ctx_t *ctx, const void *msg, size_t len) {776const uint8_t* ptr = (uint8_t*)msg;777while (len > 0) {778#ifdef RF_UNALIGNED_LE32779if (!(ctx->len&3) && len>=4) {780ctx->word=*(uint32_t*)ptr;781ctx->len+=4;782rf256_one_round(ctx);783ptr+=4;784len-=4;785continue;786}787#endif788ctx->word |= (uint32_t)*(ptr++) << (8 * (ctx->len++ & 3));789len--;790if (!(ctx->len&3))791rf256_one_round(ctx);792}793}794795// finalize the hash and copy the result into _out_ if not null (256 bits)796static void rf256_final(void *out, rf256_ctx_t *ctx) {797// BS: never happens with 80 input bytes798//uint32_t pad;799800//if (ctx->len&3)801// rf256_one_round(ctx);802803// always work on at least 256 bits of input804//for (pad=0; pad+ctx->len < 32;pad+=4)805// rf256_one_round(ctx);806807// always run 4 extra rounds to complete the last 128 bits808rf256_one_round(ctx);809rf256_one_round(ctx);810rf256_one_round(ctx);811rf256_one_round(ctx);812//if (out)813memcpy(out, ctx->hash.b, 32);814}815816// hash _len_ bytes from _in_ into _out_817void rf256_hash(void *out, const void *in, size_t len)818{819rf256_ctx_t ctx;820rf256_init(&ctx);821rf256_update(&ctx, in, len);822rf256_final(out, &ctx);823}824825int scanhash_rf256(int thr_id, struct work *work, uint32_t max_nonce, uint64_t *hashes_done)826{827uint32_t _ALIGN(64) hash[8];828uint32_t _ALIGN(64) endiandata[20];829uint32_t *pdata = work->data;830uint32_t *ptarget = work->target;831832const uint32_t Htarg = ptarget[7];833const uint32_t first_nonce = pdata[19];834uint32_t nonce = first_nonce;835volatile uint8_t *restart = &(work_restart[thr_id].restart);836837rf256_ctx_t ctx, ctx_common;838839if (opt_benchmark)840ptarget[7] = 0x0cff;841842//printf("thd%d work=%p htarg=%08x ptarg7=%08x first_nonce=%08x max_nonce=%08x hashes_done=%Lu\n",843// thr_id, work, Htarg, ptarget[7], first_nonce, max_nonce, (unsigned long)*hashes_done);844845for (int k=0; k < 19; k++)846be32enc(&endiandata[k], pdata[k]);847848// pre-compute the hash state based on the constant part of the header849rf256_init(&ctx_common);850rf256_update(&ctx_common, endiandata, 76);851ctx_common.changes = 0;852853memcpy(&ctx, &ctx_common, sizeof(ctx));854855do {856be32enc(&endiandata[19], nonce);857#ifndef RF_DISABLE_CTX_MEMCPY858#ifndef RF_DISABLE_CTX_HISTORY859if (ctx.changes == RAMBOX_HIST)860memcpy(&ctx, &ctx_common, sizeof(ctx));861else {862for (int i=0; i<ctx.changes; i++) {863int k = ctx.hist[i];864ctx.rambox[k] = ctx_common.rambox[k];865}866memcpy(&ctx, &ctx_common, offsetof(rf256_ctx_t, hist));867}868#else869memcpy(&ctx, &ctx_common, sizeof(ctx));870#endif871rf256_update(&ctx, endiandata+19, 4);872if (ctx.hash.w[7])873goto next;874rf256_final(hash, &ctx);875#else876rf256_hash(hash, endiandata, 80);877#endif878879if (hash[7] <= Htarg && fulltest(hash, ptarget)) {880work_set_target_ratio(work, hash);881pdata[19] = nonce;882*hashes_done = pdata[19] - first_nonce;883return 1;884}885next:886nonce++;887} while (nonce < max_nonce && !(*restart));888889pdata[19] = nonce;890*hashes_done = pdata[19] - first_nonce + 1;891return 0;892}893894895