Path: blob/master/ALFA-W1F1/RTL8814AU/hal/phydm/halrf/halrf_iqk.h
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/******************************************************************************1*2* Copyright(c) 2007 - 2017 Realtek Corporation.3*4* This program is free software; you can redistribute it and/or modify it5* under the terms of version 2 of the GNU General Public License as6* published by the Free Software Foundation.7*8* This program is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for11* more details.12*13* The full GNU General Public License is included in this distribution in the14* file called LICENSE.15*16* Contact Information:17* wlanfae <[email protected]>18* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,19* Hsinchu 300, Taiwan.20*21* Larry Finger <[email protected]>22*23*****************************************************************************/2425#ifndef __HALRF_IQK_H__26#define __HALRF_IQK_H__2728/*@--------------------------Define Parameters-------------------------------*/29#define LOK_delay 130#define WBIQK_delay 1031#define TX_IQK 032#define RX_IQK 133#define TXIQK 034#define RXIQK1 135#define RXIQK2 236#define kcount_limit_80m 237#define kcount_limit_others 438#define rxiqk_gs_limit 639#define TXWBIQK_EN 140#define RXWBIQK_EN 141#define NUM 442/*@-----------------------End Define Parameters-----------------------*/4344struct dm_dack_info {45u32 ic_a;46u32 qc_a;47u32 ic_b;48u32 qc_b;49boolean dack_en;50u16 msbk_d[2][2][15];51};5253struct dm_iqk_info {54boolean lok_fail[NUM];55boolean iqk_fail[2][NUM];56u32 iqc_matrix[2][NUM];57u8 iqk_times;58u32 rf_reg18;59u32 rf_reg08;60u32 lna_idx;61u8 iqk_step;62u8 rxiqk_step;63u8 tmp1bcc;64u8 txgain;65u32 txgain56;66u8 kcount;67u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/68boolean rfk_forbidden;69u8 rxbb;70u32 rf_reg58;71boolean segment_iqk;72#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\73RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\74RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\75RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\76RTL8710C_SUPPORT == 1)77u32 iqk_channel[2];78boolean iqk_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */79/*channel / path / TRX(TX:0, RX:1) / CFIR_real*/80/*channel index = 2 is just for debug*/81#if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 )82u16 iqk_cfir_real[3][2][2][17];83/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/84/*channel index = 2 is just for debug*/85u16 iqk_cfir_imag[3][2][2][17];86u32 rx_cfir_real[2][2][17];87u32 rx_cfir_imag[2][2][17];88u32 rx_cfir[2][2];89/*times/path*/90#else91u32 iqk_cfir_real[3][4][2][8];92/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/93/*channel index = 2 is just for debug*/94u32 iqk_cfir_imag[3][4][2][8];95#endif96u8 retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */97u8 gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */98/* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */99u8 rxiqk_fail_code[2][4];100u32 lok_idac[2][4]; /*channel / path*/101u16 rxiqk_agc[2][4]; /*channel / path*/102u32 bypass_iqk[2][4]; /*channel / 0xc94/0xe94*/103u32 txgap_result[8]; /*txagpK result */104u32 tmp_gntwl;105boolean is_btg;106boolean isbnd;107boolean is_reload;108boolean is_hwtx;109boolean xym_read;110boolean trximr_enable;111u32 rx_xym[2][10];112u32 tx_xym[2][10];113u32 gs1_xym[2][6];114u32 gs2_xym[2][6];115u32 rxk1_xym[2][6];116u32 txxy[2][2];117u32 rxxy[2][2];118#endif119};120121#endif /*__HALRF_IQK_H__*/122123124