Path: blob/master/ALFA-W1F1/RTL8814AU/hal/phydm/phydm_beamforming.h
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/******************************************************************************1*2* Copyright(c) 2007 - 2017 Realtek Corporation.3*4* This program is free software; you can redistribute it and/or modify it5* under the terms of version 2 of the GNU General Public License as6* published by the Free Software Foundation.7*8* This program is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for11* more details.12*13* The full GNU General Public License is included in this distribution in the14* file called LICENSE.15*16* Contact Information:17* wlanfae <[email protected]>18* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,19* Hsinchu 300, Taiwan.20*21* Larry Finger <[email protected]>22*23*****************************************************************************/2425#ifndef __INC_PHYDM_BEAMFORMING_H26#define __INC_PHYDM_BEAMFORMING_H2728/*@Beamforming Related*/29#include "txbf/halcomtxbf.h"30#include "txbf/haltxbfjaguar.h"31#include "txbf/haltxbf8192e.h"32#include "txbf/haltxbf8814a.h"33#include "txbf/haltxbf8822b.h"34#include "txbf/haltxbfinterface.h"3536#ifdef PHYDM_BEAMFORMING_SUPPORT3738#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)3940#define eq_mac_addr(a, b) (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)41#define cp_mac_addr(des, src) ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])4243#endif4445#define MAX_BEAMFORMEE_SU 246#define MAX_BEAMFORMER_SU 247#if (RTL8822B_SUPPORT == 1)48#define MAX_BEAMFORMEE_MU 649#define MAX_BEAMFORMER_MU 150#else51#define MAX_BEAMFORMEE_MU 052#define MAX_BEAMFORMER_MU 053#endif5455#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU)56#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU)5758#if (DM_ODM_SUPPORT_TYPE == ODM_CE)59/*@for different naming between WIN and CE*/60#define BEACON_QUEUE BCN_QUEUE_INX61#define NORMAL_QUEUE MGT_QUEUE_INX62#define RT_DISABLE_FUNC RTW_DISABLE_FUNC63#define RT_ENABLE_FUNC RTW_ENABLE_FUNC64#endif6566enum beamforming_entry_state {67BEAMFORMING_ENTRY_STATE_UNINITIALIZE,68BEAMFORMING_ENTRY_STATE_INITIALIZEING,69BEAMFORMING_ENTRY_STATE_INITIALIZED,70BEAMFORMING_ENTRY_STATE_PROGRESSING,71BEAMFORMING_ENTRY_STATE_PROGRESSED72};7374enum beamforming_notify_state {75BEAMFORMING_NOTIFY_NONE,76BEAMFORMING_NOTIFY_ADD,77BEAMFORMING_NOTIFY_DELETE,78BEAMFORMEE_NOTIFY_ADD_SU,79BEAMFORMEE_NOTIFY_DELETE_SU,80BEAMFORMEE_NOTIFY_ADD_MU,81BEAMFORMEE_NOTIFY_DELETE_MU,82BEAMFORMING_NOTIFY_RESET83};8485enum beamforming_cap {86BEAMFORMING_CAP_NONE = 0x0,87BEAMFORMER_CAP_HT_EXPLICIT = BIT(1),88BEAMFORMEE_CAP_HT_EXPLICIT = BIT(2),89BEAMFORMER_CAP_VHT_SU = BIT(5), /* @Self has er Cap, because Reg er & peer ee */90BEAMFORMEE_CAP_VHT_SU = BIT(6), /* @Self has ee Cap, because Reg ee & peer er */91BEAMFORMER_CAP_VHT_MU = BIT(7), /* @Self has er Cap, because Reg er & peer ee */92BEAMFORMEE_CAP_VHT_MU = BIT(8), /* @Self has ee Cap, because Reg ee & peer er */93BEAMFORMER_CAP = BIT(9),94BEAMFORMEE_CAP = BIT(10),95};9697enum sounding_mode {98SOUNDING_SW_VHT_TIMER = 0x0,99SOUNDING_SW_HT_TIMER = 0x1,100sounding_stop_all_timer = 0x2,101SOUNDING_HW_VHT_TIMER = 0x3,102SOUNDING_HW_HT_TIMER = 0x4,103SOUNDING_STOP_OID_TIMER = 0x5,104SOUNDING_AUTO_VHT_TIMER = 0x6,105SOUNDING_AUTO_HT_TIMER = 0x7,106SOUNDING_FW_VHT_TIMER = 0x8,107SOUNDING_FW_HT_TIMER = 0x9,108};109110struct _RT_BEAMFORM_STAINFO {111u8 *ra;112u16 aid;113u16 mac_id;114u8 my_mac_addr[6];115/*WIRELESS_MODE wireless_mode;*/116enum channel_width bw;117enum beamforming_cap beamform_cap;118u8 ht_beamform_cap;119u16 vht_beamform_cap;120u8 cur_beamform;121u16 cur_beamform_vht;122};123124struct _RT_BEAMFORMEE_ENTRY {125boolean is_used;126boolean is_txbf;127boolean is_sound;128u16 aid; /*Used to construct AID field of NDPA packet.*/129u16 mac_id; /*Used to Set Reg42C in IBSS mode. */130u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */131u8 g_id; /*Used to fill Tx DESC*/132u8 my_mac_addr[6];133u8 mac_addr[6]; /*@Used to fill Reg6E4 to fill Mac address of CSI report frame.*/134enum channel_width sound_bw; /*Sounding band_width*/135u16 sound_period;136enum beamforming_cap beamform_entry_cap;137enum beamforming_entry_state beamform_entry_state;138boolean is_beamforming_in_progress;139/*@u8 log_seq; // Move to _RT_BEAMFORMER_ENTRY*/140/*@u16 log_retry_cnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/141/*@u16 LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/142u16 log_status_fail_cnt : 5; /* @0~21 */143u16 default_csi_cnt : 5; /* @0~21 */144u8 csi_matrix[327];145u16 csi_matrix_len;146u8 num_of_sounding_dim;147u8 comp_steering_num_of_bfer;148u8 su_reg_index;149/*@For MU-MIMO*/150boolean is_mu_sta;151u8 mu_reg_index;152u8 gid_valid[8];153u8 user_position[16];154};155156struct _RT_BEAMFORMER_ENTRY {157boolean is_used;158/*P_AID of BFer entry is probably not used*/159u16 p_aid; /*@Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */160u8 g_id;161u8 my_mac_addr[6];162u8 mac_addr[6];163enum beamforming_cap beamform_entry_cap;164u8 num_of_sounding_dim;165u8 clock_reset_times; /*@Modified by Jeffery @2015-04-10*/166u8 pre_log_seq; /*@Modified by Jeffery @2015-03-30*/167u8 log_seq; /*@Modified by Jeffery @2014-10-29*/168u16 log_retry_cnt : 3; /*@Modified by Jeffery @2014-10-29*/169u16 log_success : 2; /*@Modified by Jeffery @2014-10-29*/170u8 su_reg_index;171/*@For MU-MIMO*/172boolean is_mu_ap;173u8 gid_valid[8];174u8 user_position[16];175u16 aid;176};177178struct _RT_SOUNDING_INFO {179u8 sound_idx;180enum channel_width sound_bw;181enum sounding_mode sound_mode;182u16 sound_period;183};184185struct _RT_BEAMFORMING_OID_INFO {186u8 sound_oid_idx;187enum channel_width sound_oid_bw;188enum sounding_mode sound_oid_mode;189u16 sound_oid_period;190};191192struct _RT_BEAMFORMING_INFO {193enum beamforming_cap beamform_cap;194struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM];195struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM];196struct _RT_BEAMFORM_STAINFO beamform_sta_info;197u8 beamformee_cur_idx;198struct phydm_timer_list beamforming_timer;199struct phydm_timer_list mu_timer;200struct _RT_SOUNDING_INFO sounding_info;201struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info;202struct _HAL_TXBF_INFO txbf_info;203u8 sounding_sequence;204u8 beamformee_su_cnt;205u8 beamformer_su_cnt;206u32 beamformee_su_reg_maping;207u32 beamformer_su_reg_maping;208/*@For MU-MINO*/209u8 beamformee_mu_cnt;210u8 beamformer_mu_cnt;211u32 beamformee_mu_reg_maping;212u8 mu_ap_index;213boolean is_mu_sounding;214u8 first_mu_bfee_index;215boolean is_mu_sounding_in_progress;216boolean dbg_disable_mu_tx;217boolean apply_v_matrix;218boolean snding3ss;219#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)220void *source_adapter;221#endif222/* @Control register */223u32 reg_mu_tx_ctrl; /* @For USB/SDIO interfaces aync I/O */224u8 tx_bf_data_rate;225u8 last_usb_hub;226};227228void phydm_get_txbf_device_num(229void *dm_void,230u8 macid);231232struct _RT_NDPA_STA_INFO {233u16 aid : 12;234u16 feedback_type : 1;235u16 nc_index : 3;236};237238enum phydm_acting_type {239phydm_acting_as_ibss = 0,240phydm_acting_as_ap = 1241};242243enum beamforming_cap244phydm_beamforming_get_entry_beam_cap_by_mac_id(245void *dm_void,246u8 mac_id);247248struct _RT_BEAMFORMEE_ENTRY *249phydm_beamforming_get_bfee_entry_by_addr(250void *dm_void,251u8 *RA,252u8 *idx);253254struct _RT_BEAMFORMER_ENTRY *255phydm_beamforming_get_bfer_entry_by_addr(256void *dm_void,257u8 *TA,258u8 *idx);259260void phydm_beamforming_notify(261void *dm_void);262263boolean264phydm_acting_determine(265void *dm_void,266enum phydm_acting_type type);267268void beamforming_enter(void *dm_void, u16 sta_idx, u8 *my_mac_addr);269270void beamforming_leave(271void *dm_void,272u8 *RA);273274boolean275beamforming_start_fw(276void *dm_void,277u8 idx);278279void beamforming_check_sounding_success(280void *dm_void,281boolean status);282283void phydm_beamforming_end_sw(284void *dm_void,285boolean status);286287void beamforming_timer_callback(288void *dm_void);289290void phydm_beamforming_init(291void *dm_void);292293enum beamforming_cap294phydm_beamforming_get_beam_cap(295void *dm_void,296struct _RT_BEAMFORMING_INFO *beam_info);297298enum beamforming_cap299phydm_get_beamform_cap(300void *dm_void);301302boolean303beamforming_control_v1(304void *dm_void,305u8 *RA,306u8 AID,307u8 mode,308enum channel_width BW,309u8 rate);310311boolean312phydm_beamforming_control_v2(313void *dm_void,314u8 idx,315u8 mode,316enum channel_width BW,317u16 period);318319void phydm_beamforming_watchdog(320void *dm_void);321322void beamforming_sw_timer_callback(323#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)324struct phydm_timer_list *timer325#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)326void *function_context327#endif328);329330boolean331beamforming_send_ht_ndpa_packet(332void *dm_void,333u8 *RA,334enum channel_width BW,335u8 q_idx);336337boolean338beamforming_send_vht_ndpa_packet(339void *dm_void,340u8 *RA,341u16 AID,342enum channel_width BW,343u8 q_idx);344345#else346#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))347#define beamforming_gid_paid(adapter, tcb)348#define phydm_acting_determine(dm, type) false349#define beamforming_enter(dm, sta_idx, my_mac_addr)350#define beamforming_leave(dm, RA)351#define beamforming_end_fw(dm)352#define beamforming_control_v1(dm, RA, AID, mode, BW, rate) true353#define beamforming_control_v2(dm, idx, mode, BW, period) true354#define phydm_beamforming_end_sw(dm, _status)355#define beamforming_timer_callback(dm)356#define phydm_beamforming_init(dm)357#define phydm_beamforming_control_v2(dm, _idx, _mode, _BW, _period) false358#define beamforming_watchdog(dm)359#define phydm_beamforming_watchdog(dm)360#endif /*@(DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))*/361#endif /*@#ifdef PHYDM_BEAMFORMING_SUPPORT*/362#endif363364365