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nu11secur1ty
GitHub Repository: nu11secur1ty/Kali-Linux
Path: blob/master/ALFA-W1F1/RTL8814AU/hal/phydm/phydm_debug.c
1307 views
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <[email protected]>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <[email protected]>
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*
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*****************************************************************************/
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/*@************************************************************
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* include files
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************************************************************/
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
32
33
void phydm_init_debug_setting(struct dm_struct *dm)
34
{
35
dm->fw_debug_components = 0;
36
dm->debug_components =
37
38
#if DBG
39
/*@BB Functions*/
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/*@DBG_DIG |*/
41
/*@DBG_RA_MASK |*/
42
/*@DBG_DYN_TXPWR |*/
43
/*@DBG_FA_CNT |*/
44
/*@DBG_RSSI_MNTR |*/
45
/*@DBG_CCKPD |*/
46
/*@DBG_ANT_DIV |*/
47
/*@DBG_SMT_ANT |*/
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/*@DBG_PWR_TRAIN |*/
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/*@DBG_RA |*/
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/*@DBG_PATH_DIV |*/
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/*@DBG_DFS |*/
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/*@DBG_DYN_ARFR |*/
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/*@DBG_ADPTVTY |*/
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/*@DBG_CFO_TRK |*/
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/*@DBG_ENV_MNTR |*/
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/*@DBG_PRI_CCA |*/
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/*@DBG_ADPTV_SOML |*/
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/*@DBG_LNA_SAT_CHK |*/
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/*@DBG_PHY_STATUS |*/
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/*@DBG_TMP |*/
61
/*@DBG_FW_TRACE |*/
62
/*@DBG_TXBF |*/
63
/*@DBG_COMMON_FLOW |*/
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/*@ODM_PHY_CONFIG |*/
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/*@ODM_COMP_INIT |*/
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/*@DBG_CMN |*/
67
/*@ODM_COMP_API |*/
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#endif
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0;
70
71
dm->fw_buff_is_enpty = true;
72
dm->pre_c2h_seq = 0;
73
dm->c2h_cmd_start = 0;
74
dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
75
dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
76
phydm_reset_rx_rate_distribution(dm);
77
}
78
79
void phydm_bb_dbg_port_header_sel(void *dm_void, u32 header_idx)
80
{
81
struct dm_struct *dm = (struct dm_struct *)dm_void;
82
83
if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
84
odm_set_bb_reg(dm, R_0x8f8, 0x3c00000, header_idx);
85
86
/*@
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* header_idx:
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* (0:) '{ofdm_dbg[31:0]}'
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* (1:) '{cca,crc32_fail,dbg_ofdm[29:0]}'
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* (2:) '{vbon,crc32_fail,dbg_ofdm[29:0]}'
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* (3:) '{cca,crc32_ok,dbg_ofdm[29:0]}'
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* (4:) '{vbon,crc32_ok,dbg_ofdm[29:0]}'
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* (5:) '{dbg_iqk_anta}'
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* (6:) '{cca,ofdm_crc_ok,dbg_dp_anta[29:0]}'
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* (7:) '{dbg_iqk_antb}'
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* (8:) '{DBGOUT_RFC_b[31:0]}'
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* (9:) '{DBGOUT_RFC_a[31:0]}'
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* (a:) '{dbg_ofdm}'
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* (b:) '{dbg_cck}'
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*/
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}
102
}
103
104
void phydm_bb_dbg_port_clock_en(void *dm_void, u8 enable)
105
{
106
struct dm_struct *dm = (struct dm_struct *)dm_void;
107
u32 reg_value = 0;
108
109
if (dm->support_ic_type & ODM_IC_11AC_2_SERIES) {
110
/*@enable/disable debug port clock, for power saving*/
111
reg_value = enable ? 0x7 : 0;
112
odm_set_bb_reg(dm, R_0x198c, 0x7, reg_value);
113
}
114
}
115
116
u32 phydm_get_bb_dbg_port_idx(void *dm_void)
117
{
118
struct dm_struct *dm = (struct dm_struct *)dm_void;
119
u32 val = 0;
120
121
if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
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phydm_bb_dbg_port_clock_en(dm, true);
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val = odm_get_bb_reg(dm, R_0x8fc, MASKDWORD);
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} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
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val = odm_get_bb_reg(dm, R_0x1c3c, 0xfff00);
126
} else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
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val = odm_get_bb_reg(dm, R_0x908, MASKDWORD);
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}
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return val;
130
}
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u8 phydm_set_bb_dbg_port(void *dm_void, u8 curr_dbg_priority, u32 debug_port)
133
{
134
struct dm_struct *dm = (struct dm_struct *)dm_void;
135
u8 dbg_port_result = false;
136
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if (curr_dbg_priority > dm->pre_dbg_priority) {
138
if (dm->support_ic_type & ODM_IC_11AC_SERIES) {
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phydm_bb_dbg_port_clock_en(dm, true);
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odm_set_bb_reg(dm, R_0x8fc, MASKDWORD, debug_port);
142
} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
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odm_set_bb_reg(dm, R_0x1c3c, 0xfff00, debug_port);
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} else { /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
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odm_set_bb_reg(dm, R_0x908, MASKDWORD, debug_port);
147
}
148
PHYDM_DBG(dm, ODM_COMP_API,
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"DbgPort ((0x%x)) set success, Cur_priority=((%d)), Pre_priority=((%d))\n",
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debug_port, curr_dbg_priority, dm->pre_dbg_priority);
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dm->pre_dbg_priority = curr_dbg_priority;
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dbg_port_result = true;
153
}
154
155
return dbg_port_result;
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}
157
158
void phydm_release_bb_dbg_port(void *dm_void)
159
{
160
struct dm_struct *dm = (struct dm_struct *)dm_void;
161
162
phydm_bb_dbg_port_clock_en(dm, false);
163
phydm_bb_dbg_port_header_sel(dm, 0);
164
165
dm->pre_dbg_priority = DBGPORT_RELEASE;
166
PHYDM_DBG(dm, ODM_COMP_API, "Release BB dbg_port\n");
167
}
168
169
u32 phydm_get_bb_dbg_port_val(void *dm_void)
170
{
171
struct dm_struct *dm = (struct dm_struct *)dm_void;
172
u32 dbg_port_value = 0;
173
174
if (dm->support_ic_type & ODM_IC_11AC_SERIES)
175
dbg_port_value = odm_get_bb_reg(dm, R_0xfa0, MASKDWORD);
176
else if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
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dbg_port_value = odm_get_bb_reg(dm, R_0x2dbc, MASKDWORD);
178
else /*@if (dm->support_ic_type & ODM_IC_11N_SERIES)*/
179
dbg_port_value = odm_get_bb_reg(dm, R_0xdf4, MASKDWORD);
180
181
PHYDM_DBG(dm, ODM_COMP_API, "dbg_port_value = 0x%x\n", dbg_port_value);
182
return dbg_port_value;
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}
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185
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
186
#if (ODM_IC_11N_SERIES_SUPPORT)
187
void phydm_bb_hw_dbg_info_n(void *dm_void, u32 *_used, char *output,
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u32 *_out_len)
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{
190
struct dm_struct *dm = (struct dm_struct *)dm_void;
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u32 used = *_used;
192
u32 out_len = *_out_len;
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u32 value32 = 0, value32_1 = 0;
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u8 rf_gain_a = 0, rf_gain_b = 0, rf_gain_c = 0, rf_gain_d = 0;
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u8 rx_snr_a = 0, rx_snr_b = 0, rx_snr_c = 0, rx_snr_d = 0;
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s8 rxevm_0 = 0, rxevm_1 = 0;
197
#if 1
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struct phydm_cfo_rpt cfo;
199
u8 i = 0;
200
#else
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s32 short_cfo_a = 0, short_cfo_b = 0, long_cfo_a = 0, long_cfo_b = 0;
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s32 scfo_a = 0, scfo_b = 0, avg_cfo_a = 0, avg_cfo_b = 0;
203
s32 cfo_end_a = 0, cfo_end_b = 0, acq_cfo_a = 0, acq_cfo_b = 0;
204
#endif
205
206
PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
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"BB Report Info");
208
209
/*@AGC result*/
210
value32 = odm_get_bb_reg(dm, R_0xdd0, MASKDWORD);
211
rf_gain_a = (u8)(value32 & 0x3f);
212
rf_gain_a = rf_gain_a << 1;
213
214
rf_gain_b = (u8)((value32 >> 8) & 0x3f);
215
rf_gain_b = rf_gain_b << 1;
216
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rf_gain_c = (u8)((value32 >> 16) & 0x3f);
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rf_gain_c = rf_gain_c << 1;
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rf_gain_d = (u8)((value32 >> 24) & 0x3f);
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rf_gain_d = rf_gain_d << 1;
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223
PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
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rf_gain_a, rf_gain_b, rf_gain_c, rf_gain_d);
226
227
/*SNR report*/
228
value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
229
rx_snr_a = (u8)(value32 & 0xff);
230
rx_snr_a = rx_snr_a >> 1;
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232
rx_snr_b = (u8)((value32 >> 8) & 0xff);
233
rx_snr_b = rx_snr_b >> 1;
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rx_snr_c = (u8)((value32 >> 16) & 0xff);
236
rx_snr_c = rx_snr_c >> 1;
237
238
rx_snr_d = (u8)((value32 >> 24) & 0xff);
239
rx_snr_d = rx_snr_d >> 1;
240
241
PDM_SNPF(out_len, used, output + used, out_len - used,
242
"\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)",
243
rx_snr_a, rx_snr_b, rx_snr_c, rx_snr_d);
244
245
/* PostFFT related info*/
246
value32 = odm_get_bb_reg(dm, R_0xdd8, MASKDWORD);
247
248
rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
249
rxevm_0 /= 2;
250
if (rxevm_0 < -63)
251
rxevm_0 = 0;
252
253
rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
254
rxevm_1 /= 2;
255
if (rxevm_1 < -63)
256
rxevm_1 = 0;
257
258
PDM_SNPF(out_len, used, output + used, out_len - used,
259
"\r\n %-35s = %d / %d", "RXEVM (1ss/2ss)", rxevm_0, rxevm_1);
260
261
#if 1
262
phydm_get_cfo_info(dm, &cfo);
263
for (i = 0; i < dm->num_rf_path; i++) {
264
PDM_SNPF(out_len, used, output + used, out_len - used,
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"\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
266
"CFO", i, "{S, L, Sec, Acq, End}",
267
cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
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cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
269
}
270
#else
271
/*@CFO Report Info*/
272
odm_set_bb_reg(dm, R_0xd00, BIT(26), 1);
273
274
/*Short CFO*/
275
value32 = odm_get_bb_reg(dm, R_0xdac, MASKDWORD);
276
value32_1 = odm_get_bb_reg(dm, R_0xdb0, MASKDWORD);
277
278
short_cfo_b = (s32)(value32 & 0xfff); /*S(12,11)*/
279
short_cfo_a = (s32)((value32 & 0x0fff0000) >> 16);
280
281
long_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
282
long_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
283
284
/*SFO 2's to dec*/
285
if (short_cfo_a > 2047)
286
short_cfo_a = short_cfo_a - 4096;
287
if (short_cfo_b > 2047)
288
short_cfo_b = short_cfo_b - 4096;
289
290
short_cfo_a = (short_cfo_a * 312500) / 2048;
291
short_cfo_b = (short_cfo_b * 312500) / 2048;
292
293
/*@LFO 2's to dec*/
294
295
if (long_cfo_a > 4095)
296
long_cfo_a = long_cfo_a - 8192;
297
298
if (long_cfo_b > 4095)
299
long_cfo_b = long_cfo_b - 8192;
300
301
long_cfo_a = long_cfo_a * 312500 / 4096;
302
long_cfo_b = long_cfo_b * 312500 / 4096;
303
304
PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
305
"CFO Report Info");
306
PDM_SNPF(out_len, used, output + used, out_len - used,
307
"\r\n %-35s = %d / %d", "Short CFO(Hz) <A/B>", short_cfo_a,
308
short_cfo_b);
309
PDM_SNPF(out_len, used, output + used, out_len - used,
310
"\r\n %-35s = %d / %d", "Long CFO(Hz) <A/B>", long_cfo_a,
311
long_cfo_b);
312
313
/*SCFO*/
314
value32 = odm_get_bb_reg(dm, R_0xdb8, MASKDWORD);
315
value32_1 = odm_get_bb_reg(dm, R_0xdb4, MASKDWORD);
316
317
scfo_b = (s32)(value32 & 0x7ff); /*S(11,10)*/
318
scfo_a = (s32)((value32 & 0x07ff0000) >> 16);
319
320
if (scfo_a > 1023)
321
scfo_a = scfo_a - 2048;
322
323
if (scfo_b > 1023)
324
scfo_b = scfo_b - 2048;
325
326
scfo_a = scfo_a * 312500 / 1024;
327
scfo_b = scfo_b * 312500 / 1024;
328
329
avg_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
330
avg_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
331
332
if (avg_cfo_a > 4095)
333
avg_cfo_a = avg_cfo_a - 8192;
334
335
if (avg_cfo_b > 4095)
336
avg_cfo_b = avg_cfo_b - 8192;
337
338
avg_cfo_a = avg_cfo_a * 312500 / 4096;
339
avg_cfo_b = avg_cfo_b * 312500 / 4096;
340
341
PDM_SNPF(out_len, used, output + used, out_len - used,
342
"\r\n %-35s = %d / %d", "value SCFO(Hz) <A/B>", scfo_a,
343
scfo_b);
344
PDM_SNPF(out_len, used, output + used, out_len - used,
345
"\r\n %-35s = %d / %d", "Avg CFO(Hz) <A/B>", avg_cfo_a,
346
avg_cfo_b);
347
348
value32 = odm_get_bb_reg(dm, R_0xdbc, MASKDWORD);
349
value32_1 = odm_get_bb_reg(dm, R_0xde0, MASKDWORD);
350
351
cfo_end_b = (s32)(value32 & 0x1fff); /*S(13,12)*/
352
cfo_end_a = (s32)((value32 & 0x1fff0000) >> 16);
353
354
if (cfo_end_a > 4095)
355
cfo_end_a = cfo_end_a - 8192;
356
357
if (cfo_end_b > 4095)
358
cfo_end_b = cfo_end_b - 8192;
359
360
cfo_end_a = cfo_end_a * 312500 / 4096;
361
cfo_end_b = cfo_end_b * 312500 / 4096;
362
363
acq_cfo_b = (s32)(value32_1 & 0x1fff); /*S(13,12)*/
364
acq_cfo_a = (s32)((value32_1 & 0x1fff0000) >> 16);
365
366
if (acq_cfo_a > 4095)
367
acq_cfo_a = acq_cfo_a - 8192;
368
369
if (acq_cfo_b > 4095)
370
acq_cfo_b = acq_cfo_b - 8192;
371
372
acq_cfo_a = acq_cfo_a * 312500 / 4096;
373
acq_cfo_b = acq_cfo_b * 312500 / 4096;
374
375
PDM_SNPF(out_len, used, output + used, out_len - used,
376
"\r\n %-35s = %d / %d", "End CFO(Hz) <A/B>", cfo_end_a,
377
cfo_end_b);
378
PDM_SNPF(out_len, used, output + used, out_len - used,
379
"\r\n %-35s = %d / %d", "ACQ CFO(Hz) <A/B>", acq_cfo_a,
380
acq_cfo_b);
381
#endif
382
}
383
#endif
384
385
#if (ODM_IC_11AC_SERIES_SUPPORT)
386
#if (RTL8822B_SUPPORT)
387
void phydm_bb_hw_dbg_info_8822b(void *dm_void, u32 *_used, char *output,
388
u32 *_out_len)
389
{
390
struct dm_struct *dm = (struct dm_struct *)dm_void;
391
u32 used = *_used;
392
u32 out_len = *_out_len;
393
u32 condi_num = 0;
394
u8 i = 0;
395
396
if (!(dm->support_ic_type == ODM_RTL8822B))
397
return;
398
399
condi_num = phydm_get_condi_num_8822b(dm);
400
phydm_get_condi_num_acc_8822b(dm);
401
402
PDM_SNPF(out_len, used, output + used, out_len - used,
403
"\r\n %-35s = %d.%.4d", "condi_num",
404
condi_num >> 4, phydm_show_fraction_num(condi_num & 0xf, 4));
405
406
for (i = 0; i < CN_CNT_MAX; i++) {
407
PDM_SNPF(out_len, used, output + used, out_len - used,
408
"\r\n Tone_num[CN>%d]%-21s = %d",
409
i, " ", dm->phy_dbg_info.condi_num_cdf[i]);
410
}
411
412
*_used = used;
413
*_out_len = out_len;
414
}
415
#endif
416
417
void phydm_bb_hw_dbg_info_ac(void *dm_void, u32 *_used, char *output,
418
u32 *_out_len)
419
{
420
struct dm_struct *dm = (struct dm_struct *)dm_void;
421
u32 used = *_used;
422
u32 out_len = *_out_len;
423
char *tmp_string = NULL;
424
u8 rx_ht_bw, rx_vht_bw, rxsc, rx_ht, bw_idx = 0;
425
static u8 v_rx_bw;
426
u32 value32, value32_1, value32_2, value32_3;
427
struct phydm_cfo_rpt cfo;
428
u8 i = 0;
429
static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
430
static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
431
static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
432
static u16 h_length, htcrc8, length;
433
static u16 vpaid;
434
static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
435
static u8 hmcss, hrx_bw;
436
u8 pwdb;
437
s8 rxevm_0, rxevm_1, rxevm_2;
438
u8 rf_gain[4];
439
u8 rx_snr[4];
440
s32 sig_power;
441
442
PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
443
"BB Report Info");
444
445
/*@ [BW & Mode] =====================================================*/
446
447
value32 = odm_get_bb_reg(dm, R_0xf80, MASKDWORD);
448
rx_ht = (u8)((value32 & 0x180) >> 7);
449
450
if (rx_ht == AD_VHT_MODE) {
451
tmp_string = "VHT";
452
bw_idx = (u8)((value32 >> 1) & 0x3);
453
} else if (rx_ht == AD_HT_MODE) {
454
tmp_string = "HT";
455
bw_idx = (u8)(value32 & 0x1);
456
} else {
457
tmp_string = "Legacy";
458
bw_idx = 0;
459
}
460
PDM_SNPF(out_len, used, output + used, out_len - used,
461
"\r\n %-35s %s %dM", "mode", tmp_string, (20 << bw_idx));
462
463
if (rx_ht != AD_LEGACY_MODE) {
464
rxsc = (u8)(value32 & 0x78);
465
466
if (rxsc == 0)
467
tmp_string = "duplicate/full bw";
468
else if (rxsc == 1)
469
tmp_string = "usc20-1";
470
else if (rxsc == 2)
471
tmp_string = "lsc20-1";
472
else if (rxsc == 3)
473
tmp_string = "usc20-2";
474
else if (rxsc == 4)
475
tmp_string = "lsc20-2";
476
else if (rxsc == 9)
477
tmp_string = "usc40";
478
else if (rxsc == 10)
479
tmp_string = "lsc40";
480
481
PDM_SNPF(out_len, used, output + used, out_len - used,
482
" %-35s", tmp_string);
483
}
484
485
/*@ [RX signal power and AGC related info] ==========================*/
486
487
pwdb = (u8)odm_get_bb_reg(dm, R_0xf90, MASKBYTE1);
488
sig_power = -110 + (pwdb >> 1);
489
PDM_SNPF(out_len, used, output + used, out_len - used,
490
"\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power);
491
492
value32 = odm_get_bb_reg(dm, R_0xd14, MASKDWORD);
493
rx_snr[RF_PATH_A] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
494
rf_gain[RF_PATH_A] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
495
496
value32 = odm_get_bb_reg(dm, R_0xd54, MASKDWORD);
497
rx_snr[RF_PATH_B] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
498
rf_gain[RF_PATH_B] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
499
500
value32 = odm_get_bb_reg(dm, R_0xd94, MASKDWORD);
501
rx_snr[RF_PATH_C] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
502
rf_gain[RF_PATH_C] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
503
504
value32 = odm_get_bb_reg(dm, R_0xdd4, MASKDWORD);
505
rx_snr[RF_PATH_D] = (u8)(value32 & 0xFF) >> 1; /*@ S(8,1)*/
506
rf_gain[RF_PATH_D] = (s8)(((value32 & MASKBYTE1) >> 8) * 2);
507
508
PDM_SNPF(out_len, used, output + used, out_len - used,
509
"\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)",
510
rf_gain[RF_PATH_A], rf_gain[RF_PATH_B],
511
rf_gain[RF_PATH_C], rf_gain[RF_PATH_D]);
512
513
/*@ [RX counter Info] ===============================================*/
514
515
PDM_SNPF(out_len, used, output + used, out_len - used,
516
"\r\n %-35s = %d", "OFDM CCA cnt",
517
odm_get_bb_reg(dm, R_0xf08, 0xFFFF0000));
518
519
PDM_SNPF(out_len, used, output + used, out_len - used,
520
"\r\n %-35s = %d", "OFDM SBD Fail cnt",
521
odm_get_bb_reg(dm, R_0xfd0, 0xFFFF));
522
523
value32 = odm_get_bb_reg(dm, R_0xfc4, MASKDWORD);
524
PDM_SNPF(out_len, used, output + used, out_len - used,
525
"\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
526
value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
527
528
PDM_SNPF(out_len, used, output + used, out_len - used,
529
"\r\n %-35s = %d", "CCK CCA cnt",
530
odm_get_bb_reg(dm, R_0xfcc, 0xFFFF));
531
532
value32 = odm_get_bb_reg(dm, R_0xfbc, MASKDWORD);
533
PDM_SNPF(out_len, used, output + used, out_len - used,
534
"\r\n %-35s = %d / %d",
535
"LSIG (parity Fail/rate Illegal) cnt", value32 & 0xFFFF,
536
((value32 & 0xFFFF0000) >> 16));
537
538
PDM_SNPF(out_len, used, output + used, out_len - used,
539
"\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
540
odm_get_bb_reg(dm, R_0xfc0, (0xFFFF0000 >> 16)),
541
odm_get_bb_reg(dm, R_0xfc8, 0xFFFF));
542
543
/*@ [PostFFT Info] =================================================*/
544
value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
545
rxevm_0 = (s8)((value32 & MASKBYTE2) >> 16);
546
rxevm_0 /= 2;
547
if (rxevm_0 < -63)
548
rxevm_0 = 0;
549
550
rxevm_1 = (s8)((value32 & MASKBYTE3) >> 24);
551
rxevm_1 /= 2;
552
value32 = odm_get_bb_reg(dm, R_0xf88, MASKDWORD);
553
rxevm_2 = (s8)((value32 & MASKBYTE2) >> 16);
554
rxevm_2 /= 2;
555
556
if (rxevm_1 < -63)
557
rxevm_1 = 0;
558
if (rxevm_2 < -63)
559
rxevm_2 = 0;
560
561
PDM_SNPF(out_len, used, output + used, out_len - used,
562
"\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", rxevm_0,
563
rxevm_1, rxevm_2);
564
PDM_SNPF(out_len, used, output + used, out_len - used,
565
"\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D dB)",
566
rx_snr[RF_PATH_A], rx_snr[RF_PATH_B],
567
rx_snr[RF_PATH_C], rx_snr[RF_PATH_D]);
568
569
value32 = odm_get_bb_reg(dm, R_0xf8c, MASKDWORD);
570
PDM_SNPF(out_len, used, output + used, out_len - used,
571
"\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32 & 0xFFFF,
572
((value32 & 0xFFFF0000) >> 16));
573
574
/*@ [CFO Report Info] ===============================================*/
575
phydm_get_cfo_info(dm, &cfo);
576
for (i = 0; i < dm->num_rf_path; i++) {
577
PDM_SNPF(out_len, used, output + used, out_len - used,
578
"\r\n %s[%d] %-28s = {%d, %d, %d, %d, %d}",
579
"CFO", i, "{S, L, Sec, Acq, End}",
580
cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i], cfo.cfo_rpt_sec[i],
581
cfo.cfo_rpt_acq[i], cfo.cfo_rpt_end[i]);
582
}
583
584
/*@ [L-SIG Content] =================================================*/
585
value32 = odm_get_bb_reg(dm, R_0xf20, MASKDWORD);
586
587
tail = (u8)((value32 & 0xfc0000) >> 18);/*@[23:18]*/
588
parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
589
length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
590
rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
591
592
PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
593
"L-SIG");
594
PDM_SNPF(out_len, used, output + used, out_len - used,
595
"\r\n %-35s = %d M", "rate",
596
phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
597
598
PDM_SNPF(out_len, used, output + used, out_len - used,
599
"\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
600
parity);
601
602
if (rx_ht == AD_HT_MODE) {
603
/*@ [HT SIG 1] ======================================================*/
604
value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
605
606
hmcss = (u8)(value32 & 0x7F);
607
hrx_bw = (u8)((value32 & 0x80) >> 7);
608
h_length = (u16)((value32 & 0x0fff00) >> 8);
609
610
PDM_SNPF(out_len, used, output + used, out_len - used,
611
"\r\n %-35s", "HT-SIG1");
612
PDM_SNPF(out_len, used, output + used, out_len - used,
613
"\r\n %-35s = %d / %d / %d", "MCS/BW/length",
614
hmcss, hrx_bw, h_length);
615
/*@ [HT SIG 2] ======================================================*/
616
value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
617
smooth = (u8)(value32 & 0x01);
618
htsound = (u8)((value32 & 0x02) >> 1);
619
rsv = (u8)((value32 & 0x04) >> 2);
620
agg = (u8)((value32 & 0x08) >> 3);
621
stbc = (u8)((value32 & 0x30) >> 4);
622
fec = (u8)((value32 & 0x40) >> 6);
623
sgi = (u8)((value32 & 0x80) >> 7);
624
htltf = (u8)((value32 & 0x300) >> 8);
625
htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
626
tail = (u8)((value32 & 0xfc0000) >> 18);
627
628
PDM_SNPF(out_len, used, output + used, out_len - used,
629
"\r\n %-35s",
630
"HT-SIG2");
631
PDM_SNPF(out_len, used, output + used, out_len - used,
632
"\r\n %-35s = %x / %x / %x / %x / %x / %x",
633
"Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
634
smooth, htsound, rsv, agg, stbc, fec);
635
PDM_SNPF(out_len, used, output + used, out_len - used,
636
"\r\n %-35s = %x / %x / %x / %x",
637
"SGI/E-HT-LTFs/CRC/tail",
638
sgi, htltf, htcrc8, tail);
639
} else if (rx_ht == AD_VHT_MODE) {
640
/*@ [VHT SIG A1] ====================================================*/
641
value32 = odm_get_bb_reg(dm, R_0xf2c, MASKDWORD);
642
643
v_rx_bw = (u8)(value32 & 0x03);
644
vrsv = (u8)((value32 & 0x04) >> 2);
645
vstbc = (u8)((value32 & 0x08) >> 3);
646
vgid = (u8)((value32 & 0x3f0) >> 4);
647
v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
648
vpaid = (u16)((value32 & 0x3fe000) >> 13);
649
vtxops = (u8)((value32 & 0x400000) >> 22);
650
vrsv2 = (u8)((value32 & 0x800000) >> 23);
651
652
PDM_SNPF(out_len, used, output + used, out_len - used,
653
"\r\n %-35s",
654
"VHT-SIG-A1");
655
PDM_SNPF(out_len, used, output + used, out_len - used,
656
"\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
657
"BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
658
vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
659
660
/*@ [VHT SIG A2] ====================================================*/
661
value32 = odm_get_bb_reg(dm, R_0xf30, MASKDWORD);
662
663
/* @sgi=(u8)(value32&0x01); */
664
sgiext = (u8)(value32 & 0x03);
665
/* @fec = (u8)(value32&0x04); */
666
fecext = (u8)((value32 & 0x0C) >> 2);
667
668
v_mcss = (u8)((value32 & 0xf0) >> 4);
669
bf = (u8)((value32 & 0x100) >> 8);
670
vrsv = (u8)((value32 & 0x200) >> 9);
671
vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
672
v_tail = (u8)((value32 & 0xfc0000) >> 18);
673
674
PDM_SNPF(out_len, used, output + used, out_len - used,
675
"\r\n %-35s", "VHT-SIG-A2");
676
PDM_SNPF(out_len, used, output + used, out_len - used,
677
"\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
678
"SGI/FEC/MCS/BF/Rsv/CRC/tail",
679
sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
680
681
/*@ [VHT SIG B] ====================================================*/
682
value32 = odm_get_bb_reg(dm, R_0xf34, MASKDWORD);
683
684
#if 0
685
v_length = (u16)(value32 & 0x1fffff);
686
vbrsv = (u8)((value32 & 0x600000) >> 21);
687
vb_tail = (u16)((value32 & 0x1f800000) >> 23);
688
vbcrc = (u8)((value32 & 0x80000000) >> 31);
689
#endif
690
691
PDM_SNPF(out_len, used, output + used, out_len - used,
692
"\r\n %-35s", "VHT-SIG-B");
693
PDM_SNPF(out_len, used, output + used, out_len - used,
694
"\r\n %-35s = %x",
695
"Codeword", value32);
696
697
#if 0
698
PDM_SNPF(out_len, used, output + used, out_len - used,
699
"\r\n %-35s = %x / %x / %x / %x",
700
"length/Rsv/tail/CRC",
701
v_length, vbrsv, vb_tail, vbcrc);
702
#endif
703
}
704
705
*_used = used;
706
*_out_len = out_len;
707
}
708
#endif
709
710
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
711
void phydm_bb_hw_dbg_info_jgr3(void *dm_void, u32 *_used, char *output,
712
u32 *_out_len)
713
{
714
struct dm_struct *dm = (struct dm_struct *)dm_void;
715
u32 used = *_used;
716
u32 out_len = *_out_len;
717
char *tmp_string = NULL;
718
u8 rx_ht_bw = 0, rx_vht_bw = 0, rx_ht = 0;
719
static u8 v_rx_bw;
720
u32 value32 = 0;
721
u8 i = 0;
722
static u8 tail, parity, rsv, vrsv, smooth, htsound, agg;
723
static u8 stbc, vstbc, fec, fecext, sgi, sgiext, htltf, vgid, v_nsts;
724
static u8 vtxops, vrsv2, vbrsv, bf, vbcrc;
725
static u16 h_length, htcrc8, length;
726
static u16 vpaid;
727
static u16 v_length, vhtcrc8, v_mcss, v_tail, vb_tail;
728
static u8 hmcss, hrx_bw;
729
730
PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s\n",
731
"BB Report Info");
732
733
/*@ [Mode] =====================================================*/
734
735
value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
736
rx_ht = (u8)((value32 & 0xC0000) >> 18);
737
if (rx_ht == AD_VHT_MODE)
738
tmp_string = "VHT";
739
else if (rx_ht == AD_HT_MODE)
740
tmp_string = "HT";
741
else
742
tmp_string = "Legacy";
743
744
PDM_SNPF(out_len, used, output + used, out_len - used,
745
"\r\n %-35s %s", "mode", tmp_string);
746
/*@ [RX counter Info] ===============================================*/
747
748
PDM_SNPF(out_len, used, output + used, out_len - used,
749
"\r\n %-35s = %d", "CCK CCA cnt",
750
odm_get_bb_reg(dm, R_0x2c08, 0xFFFF));
751
752
PDM_SNPF(out_len, used, output + used, out_len - used,
753
"\r\n %-35s = %d", "OFDM CCA cnt",
754
odm_get_bb_reg(dm, R_0x2c08, 0xFFFF0000));
755
756
PDM_SNPF(out_len, used, output + used, out_len - used,
757
"\r\n %-35s = %d", "OFDM SBD Fail cnt",
758
odm_get_bb_reg(dm, R_0x2d20, 0xFFFF0000));
759
760
PDM_SNPF(out_len, used, output + used, out_len - used,
761
"\r\n %-35s = %d / %d",
762
"LSIG (parity Fail/rate Illegal) cnt",
763
odm_get_bb_reg(dm, R_0x2d04, 0xFFFF0000),
764
odm_get_bb_reg(dm, R_0x2d08, 0xFFFF));
765
766
value32 = odm_get_bb_reg(dm, R_0x2d10, MASKDWORD);
767
PDM_SNPF(out_len, used, output + used, out_len - used,
768
"\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT cnt",
769
value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
770
771
value32 = odm_get_bb_reg(dm, R_0x2d0c, MASKDWORD);
772
PDM_SNPF(out_len, used, output + used, out_len - used,
773
"\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail cnt",
774
value32 & 0xFFFF, ((value32 & 0xFFFF0000) >> 16));
775
/*@ [L-SIG Content] =================================================*/
776
value32 = odm_get_bb_reg(dm, R_0x2c20, MASKDWORD);
777
778
parity = (u8)((value32 & 0x20000) >> 17);/*@[17]*/
779
length = (u16)((value32 & 0x1ffe0) >> 5);/*@[16:5]*/
780
rsv = (u8)((value32 & 0x10) >> 4);/*@[4]*/
781
782
PDM_SNPF(out_len, used, output + used, out_len - used, "\r\n %-35s",
783
"L-SIG");
784
PDM_SNPF(out_len, used, output + used, out_len - used,
785
"\r\n %-35s = %d M", "rate",
786
phydm_get_l_sig_rate(dm, (u8)(value32 & 0x0f)));
787
788
PDM_SNPF(out_len, used, output + used, out_len - used,
789
"\r\n %-35s = %x / %d / %d", "Rsv/length/parity", rsv, length,
790
parity);
791
792
if (rx_ht == AD_HT_MODE) {
793
/*@ [HT SIG 1] ======================================================*/
794
value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
795
796
hmcss = (u8)(value32 & 0x7F);
797
hrx_bw = (u8)((value32 & 0x80) >> 7);
798
h_length = (u16)((value32 & 0x0fff00) >> 8);
799
800
PDM_SNPF(out_len, used, output + used, out_len - used,
801
"\r\n %-35s", "HT-SIG1");
802
PDM_SNPF(out_len, used, output + used, out_len - used,
803
"\r\n %-35s = %d / %d / %d", "MCS/BW/length",
804
hmcss, hrx_bw, h_length);
805
/*@ [HT SIG 2] ======================================================*/
806
value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
807
smooth = (u8)(value32 & 0x01);
808
htsound = (u8)((value32 & 0x02) >> 1);
809
rsv = (u8)((value32 & 0x04) >> 2);
810
agg = (u8)((value32 & 0x08) >> 3);
811
stbc = (u8)((value32 & 0x30) >> 4);
812
fec = (u8)((value32 & 0x40) >> 6);
813
sgi = (u8)((value32 & 0x80) >> 7);
814
htltf = (u8)((value32 & 0x300) >> 8);
815
htcrc8 = (u16)((value32 & 0x3fc00) >> 10);
816
tail = (u8)((value32 & 0xfc0000) >> 18);
817
818
PDM_SNPF(out_len, used, output + used, out_len - used,
819
"\r\n %-35s",
820
"HT-SIG2");
821
PDM_SNPF(out_len, used, output + used, out_len - used,
822
"\r\n %-35s = %x / %x / %x / %x / %x / %x",
823
"Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",
824
smooth, htsound, rsv, agg, stbc, fec);
825
PDM_SNPF(out_len, used, output + used, out_len - used,
826
"\r\n %-35s = %x / %x / %x / %x",
827
"SGI/E-HT-LTFs/CRC/tail",
828
sgi, htltf, htcrc8, tail);
829
} else if (rx_ht == AD_VHT_MODE) {
830
/*@ [VHT SIG A1] ====================================================*/
831
value32 = odm_get_bb_reg(dm, R_0x2c2c, MASKDWORD);
832
833
v_rx_bw = (u8)(value32 & 0x03);
834
vrsv = (u8)((value32 & 0x04) >> 2);
835
vstbc = (u8)((value32 & 0x08) >> 3);
836
vgid = (u8)((value32 & 0x3f0) >> 4);
837
v_nsts = (u8)(((value32 & 0x1c00) >> 10) + 1);
838
vpaid = (u16)((value32 & 0x3fe000) >> 13);
839
vtxops = (u8)((value32 & 0x400000) >> 22);
840
vrsv2 = (u8)((value32 & 0x800000) >> 23);
841
842
PDM_SNPF(out_len, used, output + used, out_len - used,
843
"\r\n %-35s",
844
"VHT-SIG-A1");
845
PDM_SNPF(out_len, used, output + used, out_len - used,
846
"\r\n %-35s = %x / %x / %x / %x / %x / %x / %x / %x",
847
"BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2", v_rx_bw,
848
vrsv, vstbc, vgid, v_nsts, vpaid, vtxops, vrsv2);
849
850
/*@ [VHT SIG A2] ====================================================*/
851
value32 = odm_get_bb_reg(dm, R_0x2c30, MASKDWORD);
852
853
/* @sgi=(u8)(value32&0x01); */
854
sgiext = (u8)(value32 & 0x03);
855
/* @fec = (u8)(value32&0x04); */
856
fecext = (u8)((value32 & 0x0C) >> 2);
857
858
v_mcss = (u8)((value32 & 0xf0) >> 4);
859
bf = (u8)((value32 & 0x100) >> 8);
860
vrsv = (u8)((value32 & 0x200) >> 9);
861
vhtcrc8 = (u16)((value32 & 0x3fc00) >> 10);
862
v_tail = (u8)((value32 & 0xfc0000) >> 18);
863
864
PDM_SNPF(out_len, used, output + used, out_len - used,
865
"\r\n %-35s", "VHT-SIG-A2");
866
PDM_SNPF(out_len, used, output + used, out_len - used,
867
"\r\n %-35s = %x / %x / %x / %x / %x / %x / %x",
868
"SGI/FEC/MCS/BF/Rsv/CRC/tail",
869
sgiext, fecext, v_mcss, bf, vrsv, vhtcrc8, v_tail);
870
871
/*@ [VHT SIG B] ====================================================*/
872
value32 = odm_get_bb_reg(dm, R_0x2c34, MASKDWORD);
873
874
PDM_SNPF(out_len, used, output + used, out_len - used,
875
"\r\n %-35s", "VHT-SIG-B");
876
PDM_SNPF(out_len, used, output + used, out_len - used,
877
"\r\n %-35s = %x",
878
"Codeword", value32);
879
880
if (v_rx_bw == 0) {
881
v_length = (u16)(value32 & 0x1ffff);
882
vbrsv = (u8)((value32 & 0xE0000) >> 17);
883
vb_tail = (u16)((value32 & 0x03F00000) >> 20);
884
} else if (v_rx_bw == 1) {
885
v_length = (u16)(value32 & 0x7FFFF);
886
vbrsv = (u8)((value32 & 0x180000) >> 19);
887
vb_tail = (u16)((value32 & 0x07E00000) >> 21);
888
} else if (v_rx_bw == 2) {
889
v_length = (u16)(value32 & 0x1fffff);
890
vbrsv = (u8)((value32 & 0x600000) >> 21);
891
vb_tail = (u16)((value32 & 0x1f800000) >> 23);
892
}
893
vbcrc = (u8)((value32 & 0x80000000) >> 31);
894
895
PDM_SNPF(out_len, used, output + used, out_len - used,
896
"\r\n %-35s = %x / %x / %x / %x",
897
"length/Rsv/tail/CRC",
898
v_length, vbrsv, vb_tail, vbcrc);
899
}
900
901
*_used = used;
902
*_out_len = out_len;
903
}
904
#endif
905
906
u8 phydm_get_l_sig_rate(void *dm_void, u8 rate_idx_l_sig)
907
{
908
u8 rate_idx = 0xff;
909
910
switch (rate_idx_l_sig) {
911
case 0x0b:
912
rate_idx = 6;
913
break;
914
case 0x0f:
915
rate_idx = 9;
916
break;
917
case 0x0a:
918
rate_idx = 12;
919
break;
920
case 0x0e:
921
rate_idx = 18;
922
break;
923
case 0x09:
924
rate_idx = 24;
925
break;
926
case 0x0d:
927
rate_idx = 36;
928
break;
929
case 0x08:
930
rate_idx = 48;
931
break;
932
case 0x0c:
933
rate_idx = 54;
934
break;
935
default:
936
rate_idx = 0xff;
937
break;
938
}
939
940
return rate_idx;
941
}
942
943
void phydm_bb_hw_dbg_info(void *dm_void, char input[][16], u32 *_used,
944
char *output, u32 *_out_len)
945
{
946
struct dm_struct *dm = (struct dm_struct *)dm_void;
947
u32 used = *_used;
948
u32 out_len = *_out_len;
949
950
switch (dm->ic_ip_series) {
951
#if (ODM_IC_11N_SERIES_SUPPORT)
952
case PHYDM_IC_N:
953
phydm_bb_hw_dbg_info_n(dm, &used, output, &out_len);
954
break;
955
#endif
956
957
#if (ODM_IC_11AC_SERIES_SUPPORT)
958
case PHYDM_IC_AC:
959
phydm_bb_hw_dbg_info_ac(dm, &used, output, &out_len);
960
phydm_reset_bb_hw_cnt(dm);
961
#if (RTL8822B_SUPPORT)
962
phydm_bb_hw_dbg_info_8822b(dm, &used, output, &out_len);
963
#endif
964
break;
965
#endif
966
967
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
968
case PHYDM_IC_JGR3:
969
phydm_bb_hw_dbg_info_jgr3(dm, &used, output, &out_len);
970
phydm_reset_bb_hw_cnt(dm);
971
break;
972
#endif
973
default:
974
break;
975
}
976
977
*_used = used;
978
*_out_len = out_len;
979
}
980
981
#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
982
983
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
984
985
void phydm_dm_summary_cli_win(void *dm_void, char *buf, u8 macid)
986
{
987
struct dm_struct *dm = (struct dm_struct *)dm_void;
988
struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
989
struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
990
struct cmn_sta_info *sta = NULL;
991
struct ra_sta_info *ra = NULL;
992
struct dtp_info *dtp = NULL;
993
u64 comp = dm->support_ability;
994
u64 pause_comp = dm->pause_ability;
995
996
if (!dm->is_linked) {
997
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "[%s]No Link !!!\n", __func__);
998
RT_PRINT(buf);
999
return;
1000
}
1001
1002
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
1003
((comp & ODM_BB_DIG) ?
1004
((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
1005
"DIG",
1006
dig_t->cur_ig_value,
1007
dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
1008
dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
1009
RT_PRINT(buf);
1010
1011
sta = dm->phydm_sta_info[macid];
1012
if (is_sta_active(sta)) {
1013
RT_PRINT(buf);
1014
1015
ra = &sta->ra_info;
1016
dtp = &sta->dtp_stat;
1017
1018
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
1019
((comp & ODM_BB_RA_MASK) ?
1020
((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
1021
"RaMask",
1022
ra->rssi_level, ra->ramask);
1023
RT_PRINT(buf);
1024
1025
#ifdef CONFIG_DYNAMIC_TX_TWR
1026
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "02.(%s) %-12s: pwr_lv=%d\n",
1027
((comp & ODM_BB_DYNAMIC_TXPWR) ?
1028
((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
1029
"DynTxPwr",
1030
dtp->sta_tx_high_power_lvl);
1031
RT_PRINT(buf);
1032
#endif
1033
}
1034
1035
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "05.(%s) %-12s: cck_pd_lv=%d\n",
1036
((comp & ODM_BB_CCK_PD) ?
1037
((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
1038
"CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
1039
RT_PRINT(buf);
1040
1041
#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
1042
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
1043
((comp & ODM_BB_ANT_DIV) ?
1044
((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
1045
"ANT_DIV",
1046
dm->ant_div_type,
1047
(dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
1048
RT_PRINT(buf);
1049
#endif
1050
1051
#ifdef PHYDM_POWER_TRAINING_SUPPORT
1052
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
1053
((comp & ODM_BB_PWR_TRAIN) ?
1054
((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
1055
"PwrTrain",
1056
dm->pow_train_table.pow_train_score,
1057
dm->is_disable_power_training);
1058
RT_PRINT(buf);
1059
#endif
1060
1061
#ifdef CONFIG_PHYDM_DFS_MASTER
1062
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
1063
((comp & ODM_BB_DFS) ?
1064
((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
1065
"DFS",
1066
dm->dfs.dbg_mode, dm->dfs_region_domain);
1067
RT_PRINT(buf);
1068
#endif
1069
#ifdef PHYDM_SUPPORT_ADAPTIVITY
1070
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
1071
((comp & ODM_BB_ADAPTIVITY) ?
1072
((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
1073
"Adaptivity",
1074
dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
1075
dm->false_alm_cnt.edcca_flag);
1076
RT_PRINT(buf);
1077
#endif
1078
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
1079
((comp & ODM_BB_CFO_TRACKING) ?
1080
((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
1081
"CfoTrack",
1082
cfo_t->CFO_ave_pre,
1083
((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1084
DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1085
RT_PRINT(buf);
1086
1087
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
1088
((comp & ODM_BB_ENV_MONITOR) ?
1089
((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
1090
"EnvMntr",
1091
dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
1092
RT_PRINT(buf);
1093
#ifdef PHYDM_PRIMARY_CCA
1094
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "16.(%s) %-12s: CCA @ (%s SB)\n",
1095
((comp & ODM_BB_PRIMARY_CCA) ?
1096
((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
1097
"PriCCA",
1098
((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
1099
((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
1100
RT_PRINT(buf);
1101
#endif
1102
#ifdef CONFIG_ADAPTIVE_SOML
1103
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "17.(%s) %-12s: soml_en = %s\n",
1104
((comp & ODM_BB_ADAPTIVE_SOML) ?
1105
((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
1106
"A-SOML",
1107
(dm->dm_soml_table.soml_last_state == SOML_ON) ?
1108
"ON" : "OFF");
1109
RT_PRINT(buf);
1110
#endif
1111
#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
1112
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "18.(%s) %-12s:\n",
1113
((comp & ODM_BB_LNA_SAT_CHK) ?
1114
((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
1115
"LNA_SAT_CHK");
1116
RT_PRINT(buf);
1117
#endif
1118
}
1119
1120
void phydm_basic_dbg_msg_cli_win(void *dm_void, char *buf)
1121
{
1122
struct dm_struct *dm = (struct dm_struct *)dm_void;
1123
struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
1124
struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
1125
struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1126
struct phydm_phystatus_statistic *dbg_s = &dbg->physts_statistic_info;
1127
struct phydm_phystatus_avg *dbg_avg = &dbg->phystatus_statistic_avg;
1128
char *rate_type = NULL;
1129
u8 tmp_rssi_avg[4];
1130
u8 tmp_snr_avg[4];
1131
u8 tmp_evm_avg[4];
1132
u32 tmp_cnt = 0;
1133
u8 macid, target_macid = 0;
1134
u8 i = 0;
1135
u8 rate_num = dm->num_rf_path;
1136
u8 ss_ofst = 0;
1137
struct cmn_sta_info *entry = NULL;
1138
char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
1139
1140
if (dm->debug_components & DBG_CMN)
1141
return;
1142
1143
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n PHYDM Common Dbg Msg --------->");
1144
RT_PRINT(buf);
1145
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n System up time=%d", dm->phydm_sys_up_time);
1146
RT_PRINT(buf);
1147
1148
if (dm->is_linked) {
1149
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n ID=((%d)), BW=((%d)), fc=((CH-%d))",
1150
dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
1151
RT_PRINT(buf);
1152
1153
if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
1154
(dm->support_ic_type & ODM_IC_11N_SERIES)) {
1155
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Primary CCA at ((%s SB))",
1156
(*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" : "L");
1157
RT_PRINT(buf);
1158
}
1159
1160
if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
1161
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}",
1162
dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
1163
dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
1164
RT_PRINT(buf);
1165
} else {
1166
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}",
1167
dm->cck_lna_idx, dm->cck_vga_idx);
1168
RT_PRINT(buf);
1169
}
1170
1171
phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1172
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)",
1173
(dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
1174
(dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
1175
(dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
1176
(dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
1177
dbg_buf, dm->rx_rate);
1178
RT_PRINT(buf);
1179
1180
phydm_print_rate_2_buff(dm, dm->phy_dbg_info.beacon_phy_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1181
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Beacon_cnt=%d, rate_idx:%s (0x%x)",
1182
dm->phy_dbg_info.beacon_cnt_in_period,
1183
dbg_buf,
1184
dm->phy_dbg_info.beacon_phy_rate);
1185
RT_PRINT(buf);
1186
1187
/*Show phydm_rx_rate_distribution;*/
1188
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [RxRate Cnt] =============>");
1189
RT_PRINT(buf);
1190
1191
/*@======CCK=================================================*/
1192
if (*dm->channel <= 14) {
1193
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * CCK = {%d, %d, %d, %d}",
1194
dbg->num_qry_legacy_pkt[0], dbg->num_qry_legacy_pkt[1],
1195
dbg->num_qry_legacy_pkt[2], dbg->num_qry_legacy_pkt[3]);
1196
RT_PRINT(buf);
1197
}
1198
/*@======OFDM================================================*/
1199
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}",
1200
dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1201
dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1202
dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1203
dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1204
RT_PRINT(buf);
1205
1206
/*@======HT==================================================*/
1207
if (dbg->ht_pkt_not_zero) {
1208
for (i = 0; i < rate_num; i++) {
1209
ss_ofst = (i << 3);
1210
1211
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1212
(ss_ofst), (ss_ofst + 7),
1213
dbg->num_qry_ht_pkt[ss_ofst + 0], dbg->num_qry_ht_pkt[ss_ofst + 1],
1214
dbg->num_qry_ht_pkt[ss_ofst + 2], dbg->num_qry_ht_pkt[ss_ofst + 3],
1215
dbg->num_qry_ht_pkt[ss_ofst + 4], dbg->num_qry_ht_pkt[ss_ofst + 5],
1216
dbg->num_qry_ht_pkt[ss_ofst + 6], dbg->num_qry_ht_pkt[ss_ofst + 7]);
1217
RT_PRINT(buf);
1218
}
1219
1220
if (dbg->low_bw_20_occur) {
1221
for (i = 0; i < rate_num; i++) {
1222
ss_ofst = (i << 3);
1223
1224
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}",
1225
(ss_ofst), (ss_ofst + 7),
1226
dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1227
dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1228
dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1229
dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1230
RT_PRINT(buf);
1231
}
1232
}
1233
}
1234
1235
#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1236
/*@======VHT=================================================*/
1237
if (dbg->vht_pkt_not_zero) {
1238
for (i = 0; i < rate_num; i++) {
1239
ss_ofst = 10 * i;
1240
1241
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1242
(i + 1),
1243
dbg->num_qry_vht_pkt[ss_ofst + 0], dbg->num_qry_vht_pkt[ss_ofst + 1],
1244
dbg->num_qry_vht_pkt[ss_ofst + 2], dbg->num_qry_vht_pkt[ss_ofst + 3],
1245
dbg->num_qry_vht_pkt[ss_ofst + 4], dbg->num_qry_vht_pkt[ss_ofst + 5],
1246
dbg->num_qry_vht_pkt[ss_ofst + 6], dbg->num_qry_vht_pkt[ss_ofst + 7],
1247
dbg->num_qry_vht_pkt[ss_ofst + 8], dbg->num_qry_vht_pkt[ss_ofst + 9]);
1248
RT_PRINT(buf);
1249
}
1250
1251
if (dbg->low_bw_20_occur) {
1252
for (i = 0; i < rate_num; i++) {
1253
ss_ofst = 10 * i;
1254
1255
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1256
(i + 1),
1257
dbg->num_qry_pkt_sc_20m[ss_ofst + 0], dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1258
dbg->num_qry_pkt_sc_20m[ss_ofst + 2], dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1259
dbg->num_qry_pkt_sc_20m[ss_ofst + 4], dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1260
dbg->num_qry_pkt_sc_20m[ss_ofst + 6], dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1261
dbg->num_qry_pkt_sc_20m[ss_ofst + 8], dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1262
RT_PRINT(buf);
1263
}
1264
}
1265
1266
if (dbg->low_bw_40_occur) {
1267
for (i = 0; i < rate_num; i++) {
1268
ss_ofst = 10 * i;
1269
1270
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n *[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}",
1271
(i + 1),
1272
dbg->num_qry_pkt_sc_40m[ss_ofst + 0], dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1273
dbg->num_qry_pkt_sc_40m[ss_ofst + 2], dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1274
dbg->num_qry_pkt_sc_40m[ss_ofst + 4], dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1275
dbg->num_qry_pkt_sc_40m[ss_ofst + 6], dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1276
dbg->num_qry_pkt_sc_40m[ss_ofst + 8], dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1277
RT_PRINT(buf);
1278
}
1279
}
1280
}
1281
#endif
1282
1283
phydm_reset_rx_rate_distribution(dm);
1284
1285
//1 Show phydm_avg_phystatus_val
1286
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1287
"\r\n [Avg PHY Statistic] ==============>\n");
1288
RT_PRINT(buf);
1289
#if 1
1290
phydm_get_avg_phystatus_val(dm);
1291
1292
switch (dm->num_rf_path) {
1293
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
1294
case 4:
1295
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1296
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1297
"[Beacon]", dbg_s->rssi_beacon_cnt,
1298
dbg_avg->rssi_beacon_avg[0],
1299
dbg_avg->rssi_beacon_avg[1],
1300
dbg_avg->rssi_beacon_avg[2],
1301
dbg_avg->rssi_beacon_avg[3]);
1302
break;
1303
#endif
1304
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
1305
case 3:
1306
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1307
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1308
"[Beacon]", dbg_s->rssi_beacon_cnt,
1309
dbg_avg->rssi_beacon_avg[0],
1310
dbg_avg->rssi_beacon_avg[1],
1311
dbg_avg->rssi_beacon_avg[2]);
1312
break;
1313
#endif
1314
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
1315
case 2:
1316
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1317
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1318
"[Beacon]", dbg_s->rssi_beacon_cnt,
1319
dbg_avg->rssi_beacon_avg[0],
1320
dbg_avg->rssi_beacon_avg[1]);
1321
break;
1322
#endif
1323
default:
1324
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1325
"* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1326
"[Beacon]", dbg_s->rssi_beacon_cnt,
1327
dbg_avg->rssi_beacon_avg[0]);
1328
break;
1329
}
1330
RT_PRINT(buf);
1331
1332
switch (dm->num_rf_path) {
1333
#ifdef PHYSTS_3RD_TYPE_SUPPORT
1334
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
1335
case 4:
1336
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1337
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
1338
"[CCK]", dbg_s->rssi_cck_cnt,
1339
dbg_avg->rssi_cck_avg,
1340
dbg_avg->rssi_cck_avg_abv_2ss[0],
1341
dbg_avg->rssi_cck_avg_abv_2ss[1],
1342
dbg_avg->rssi_cck_avg_abv_2ss[2]);
1343
break;
1344
#endif
1345
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
1346
case 3:
1347
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1348
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
1349
"[CCK]", dbg_s->rssi_cck_cnt,
1350
dbg_avg->rssi_cck_avg,
1351
dbg_avg->rssi_cck_avg_abv_2ss[0],
1352
dbg_avg->rssi_cck_avg_abv_2ss[1]);
1353
break;
1354
#endif
1355
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
1356
case 2:
1357
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1358
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
1359
"[CCK]", dbg_s->rssi_cck_cnt,
1360
dbg_avg->rssi_cck_avg,
1361
dbg_avg->rssi_cck_avg_abv_2ss[0]);
1362
break;
1363
#endif
1364
#endif
1365
default:
1366
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1367
"* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
1368
"[CCK]", dbg_s->rssi_cck_cnt,
1369
dbg_avg->rssi_cck_avg);
1370
break;
1371
}
1372
RT_PRINT(buf);
1373
1374
for (i = 0; i <= 4; i++) {
1375
if (i > dm->num_rf_path)
1376
break;
1377
1378
odm_memory_set(dm, tmp_rssi_avg, 0, 4);
1379
odm_memory_set(dm, tmp_snr_avg, 0, 4);
1380
odm_memory_set(dm, tmp_evm_avg, 0, 4);
1381
1382
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
1383
if (i == 4) {
1384
rate_type = "[4-SS]";
1385
tmp_cnt = dbg_s->rssi_4ss_cnt;
1386
odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_4ss_avg, dm->num_rf_path);
1387
odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_4ss_avg, dm->num_rf_path);
1388
odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg, 4);
1389
} else
1390
#endif
1391
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
1392
if (i == 3) {
1393
rate_type = "[3-SS]";
1394
tmp_cnt = dbg_s->rssi_3ss_cnt;
1395
odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_3ss_avg, dm->num_rf_path);
1396
odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_3ss_avg, dm->num_rf_path);
1397
odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_3ss_avg, 3);
1398
} else
1399
#endif
1400
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
1401
if (i == 2) {
1402
rate_type = "[2-SS]";
1403
tmp_cnt = dbg_s->rssi_2ss_cnt;
1404
odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_2ss_avg, dm->num_rf_path);
1405
odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg, dm->num_rf_path);
1406
odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_2ss_avg, 2);
1407
} else
1408
#endif
1409
if (i == 1) {
1410
rate_type = "[1-SS]";
1411
tmp_cnt = dbg_s->rssi_1ss_cnt;
1412
odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_1ss_avg, dm->num_rf_path);
1413
odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_1ss_avg, dm->num_rf_path);
1414
odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_1ss_avg, 1);
1415
} else {
1416
rate_type = "[L-OFDM]";
1417
tmp_cnt = dbg_s->rssi_ofdm_cnt;
1418
odm_move_memory(dm, tmp_rssi_avg, dbg_avg->rssi_ofdm_avg, dm->num_rf_path);
1419
odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_ofdm_avg, dm->num_rf_path);
1420
odm_move_memory(dm, tmp_evm_avg, &dbg_avg->evm_ofdm_avg, 1);
1421
}
1422
1423
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1424
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
1425
rate_type, tmp_cnt,
1426
tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2], tmp_rssi_avg[3],
1427
tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2], tmp_snr_avg[3],
1428
tmp_evm_avg[0], tmp_evm_avg[1], tmp_evm_avg[2], tmp_evm_avg[3]);
1429
RT_PRINT(buf);
1430
}
1431
#else
1432
phydm_reset_phystatus_avg(dm);
1433
1434
/*@CCK*/
1435
dbg_avg->rssi_cck_avg = (u8)((dbg_s->rssi_cck_cnt != 0) ? (dbg_s->rssi_cck_sum / dbg_s->rssi_cck_cnt) : 0);
1436
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * cck Cnt= ((%d)) RSSI:{%d}",
1437
dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
1438
RT_PRINT(buf);
1439
1440
/*OFDM*/
1441
if (dbg_s->rssi_ofdm_cnt != 0) {
1442
dbg_avg->rssi_ofdm_avg = (u8)(dbg_s->rssi_ofdm_sum / dbg_s->rssi_ofdm_cnt);
1443
dbg_avg->evm_ofdm_avg = (u8)(dbg_s->evm_ofdm_sum / dbg_s->rssi_ofdm_cnt);
1444
dbg_avg->snr_ofdm_avg = (u8)(dbg_s->snr_ofdm_sum / dbg_s->rssi_ofdm_cnt);
1445
}
1446
1447
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * ofdm Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}",
1448
dbg_s->rssi_ofdm_cnt, dbg_avg->rssi_ofdm_avg,
1449
dbg_avg->evm_ofdm_avg, dbg_avg->snr_ofdm_avg);
1450
RT_PRINT(buf);
1451
1452
if (dbg_s->rssi_1ss_cnt != 0) {
1453
dbg_avg->rssi_1ss_avg = (u8)(dbg_s->rssi_1ss_sum / dbg_s->rssi_1ss_cnt);
1454
dbg_avg->evm_1ss_avg = (u8)(dbg_s->evm_1ss_sum / dbg_s->rssi_1ss_cnt);
1455
dbg_avg->snr_1ss_avg = (u8)(dbg_s->snr_1ss_sum / dbg_s->rssi_1ss_cnt);
1456
}
1457
1458
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 1-ss Cnt= ((%d)) RSSI:{%d} EVM:{%d} SNR:{%d}",
1459
dbg_s->rssi_1ss_cnt, dbg_avg->rssi_1ss_avg,
1460
dbg_avg->evm_1ss_avg, dbg_avg->snr_1ss_avg);
1461
RT_PRINT(buf);
1462
1463
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
1464
if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
1465
if (dbg_s->rssi_2ss_cnt != 0) {
1466
dbg_avg->rssi_2ss_avg[0] = (u8)(dbg_s->rssi_2ss_sum[0] / dbg_s->rssi_2ss_cnt);
1467
dbg_avg->rssi_2ss_avg[1] = (u8)(dbg_s->rssi_2ss_sum[1] / dbg_s->rssi_2ss_cnt);
1468
1469
dbg_avg->evm_2ss_avg[0] = (u8)(dbg_s->evm_2ss_sum[0] / dbg_s->rssi_2ss_cnt);
1470
dbg_avg->evm_2ss_avg[1] = (u8)(dbg_s->evm_2ss_sum[1] / dbg_s->rssi_2ss_cnt);
1471
1472
dbg_avg->snr_2ss_avg[0] = (u8)(dbg_s->snr_2ss_sum[0] / dbg_s->rssi_2ss_cnt);
1473
dbg_avg->snr_2ss_avg[1] = (u8)(dbg_s->snr_2ss_sum[1] / dbg_s->rssi_2ss_cnt);
1474
}
1475
1476
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 2-ss Cnt= ((%d)) RSSI:{%d, %d}, EVM:{%d, %d}, SNR:{%d, %d}",
1477
dbg_s->rssi_2ss_cnt, dbg_avg->rssi_2ss_avg[0],
1478
dbg_avg->rssi_2ss_avg[1], dbg_avg->evm_2ss_avg[0],
1479
dbg_avg->evm_2ss_avg[1], dbg_avg->snr_2ss_avg[0],
1480
dbg_avg->snr_2ss_avg[1]);
1481
RT_PRINT(buf);
1482
}
1483
#endif
1484
1485
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
1486
if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS)) {
1487
if (dbg_s->rssi_3ss_cnt != 0) {
1488
dbg_avg->rssi_3ss_avg[0] = (u8)(dbg_s->rssi_3ss_sum[0] / dbg_s->rssi_3ss_cnt);
1489
dbg_avg->rssi_3ss_avg[1] = (u8)(dbg_s->rssi_3ss_sum[1] / dbg_s->rssi_3ss_cnt);
1490
dbg_avg->rssi_3ss_avg[2] = (u8)(dbg_s->rssi_3ss_sum[2] / dbg_s->rssi_3ss_cnt);
1491
1492
dbg_avg->evm_3ss_avg[0] = (u8)(dbg_s->evm_3ss_sum[0] / dbg_s->rssi_3ss_cnt);
1493
dbg_avg->evm_3ss_avg[1] = (u8)(dbg_s->evm_3ss_sum[1] / dbg_s->rssi_3ss_cnt);
1494
dbg_avg->evm_3ss_avg[2] = (u8)(dbg_s->evm_3ss_sum[2] / dbg_s->rssi_3ss_cnt);
1495
1496
dbg_avg->snr_3ss_avg[0] = (u8)(dbg_s->snr_3ss_sum[0] / dbg_s->rssi_3ss_cnt);
1497
dbg_avg->snr_3ss_avg[1] = (u8)(dbg_s->snr_3ss_sum[1] / dbg_s->rssi_3ss_cnt);
1498
dbg_avg->snr_3ss_avg[2] = (u8)(dbg_s->snr_3ss_sum[2] / dbg_s->rssi_3ss_cnt);
1499
}
1500
1501
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 3-ss Cnt= ((%d)) RSSI:{%d, %d, %d} EVM:{%d, %d, %d} SNR:{%d, %d, %d}",
1502
dbg_s->rssi_3ss_cnt, dbg_avg->rssi_3ss_avg[0],
1503
dbg_avg->rssi_3ss_avg[1], dbg_avg->rssi_3ss_avg[2],
1504
dbg_avg->evm_3ss_avg[0], dbg_avg->evm_3ss_avg[1],
1505
dbg_avg->evm_3ss_avg[2], dbg_avg->snr_3ss_avg[0],
1506
dbg_avg->snr_3ss_avg[1], dbg_avg->snr_3ss_avg[2]);
1507
RT_PRINT(buf);
1508
}
1509
#endif
1510
1511
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
1512
if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
1513
if (dbg_s->rssi_4ss_cnt != 0) {
1514
dbg_avg->rssi_4ss_avg[0] = (u8)(dbg_s->rssi_4ss_sum[0] / dbg_s->rssi_4ss_cnt);
1515
dbg_avg->rssi_4ss_avg[1] = (u8)(dbg_s->rssi_4ss_sum[1] / dbg_s->rssi_4ss_cnt);
1516
dbg_avg->rssi_4ss_avg[2] = (u8)(dbg_s->rssi_4ss_sum[2] / dbg_s->rssi_4ss_cnt);
1517
dbg_avg->rssi_4ss_avg[3] = (u8)(dbg_s->rssi_4ss_sum[3] / dbg_s->rssi_4ss_cnt);
1518
1519
dbg_avg->evm_4ss_avg[0] = (u8)(dbg_s->evm_4ss_sum[0] / dbg_s->rssi_4ss_cnt);
1520
dbg_avg->evm_4ss_avg[1] = (u8)(dbg_s->evm_4ss_sum[1] / dbg_s->rssi_4ss_cnt);
1521
dbg_avg->evm_4ss_avg[2] = (u8)(dbg_s->evm_4ss_sum[2] / dbg_s->rssi_4ss_cnt);
1522
dbg_avg->evm_4ss_avg[3] = (u8)(dbg_s->evm_4ss_sum[3] / dbg_s->rssi_4ss_cnt);
1523
1524
dbg_avg->snr_4ss_avg[0] = (u8)(dbg_s->snr_4ss_sum[0] / dbg_s->rssi_4ss_cnt);
1525
dbg_avg->snr_4ss_avg[1] = (u8)(dbg_s->snr_4ss_sum[1] / dbg_s->rssi_4ss_cnt);
1526
dbg_avg->snr_4ss_avg[2] = (u8)(dbg_s->snr_4ss_sum[2] / dbg_s->rssi_4ss_cnt);
1527
dbg_avg->snr_4ss_avg[3] = (u8)(dbg_s->snr_4ss_sum[3] / dbg_s->rssi_4ss_cnt);
1528
}
1529
1530
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n * 4-ss Cnt= ((%d)) RSSI:{%d, %d, %d, %d} EVM:{%d, %d, %d, %d} SNR:{%d, %d, %d, %d}",
1531
dbg_s->rssi_4ss_cnt, dbg_avg->rssi_4ss_avg[0],
1532
dbg_avg->rssi_4ss_avg[1], dbg_avg->rssi_4ss_avg[2],
1533
dbg_avg->rssi_4ss_avg[3], dbg_avg->evm_4ss_avg[0],
1534
dbg_avg->evm_4ss_avg[1], dbg_avg->evm_4ss_avg[2],
1535
dbg_avg->evm_4ss_avg[3], dbg_avg->snr_4ss_avg[0],
1536
dbg_avg->snr_4ss_avg[1], dbg_avg->snr_4ss_avg[2],
1537
dbg_avg->snr_4ss_avg[3]);
1538
RT_PRINT(buf);
1539
}
1540
#endif
1541
#endif
1542
phydm_reset_phystatus_statistic(dm);
1543
/*@----------------------------------------------------------*/
1544
1545
/*Print TX rate*/
1546
for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
1547
entry = dm->phydm_sta_info[macid];
1548
1549
if (is_sta_active(entry)) {
1550
phydm_print_rate_2_buff(dm, entry->ra_info.curr_tx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
1551
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n TxRate[%d]=%s (0x%x)", macid, dbg_buf, entry->ra_info.curr_tx_rate);
1552
RT_PRINT(buf);
1553
target_macid = macid;
1554
break;
1555
}
1556
}
1557
1558
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1559
"\r\n TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))",
1560
dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
1561
RT_PRINT(buf);
1562
1563
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n CFO_avg=((%d kHz)), CFO_traking = ((%s%d))",
1564
cfo_t->CFO_ave_pre,
1565
((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
1566
DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
1567
RT_PRINT(buf);
1568
1569
/* @Condition number */
1570
#if (RTL8822B_SUPPORT)
1571
if (dm->support_ic_type == ODM_RTL8822B) {
1572
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Condi_Num=((%d.%.4d))",
1573
dm->phy_dbg_info.condi_num >> 4,
1574
phydm_show_fraction_num(dm->phy_dbg_info.condi_num & 0xf, 4));
1575
RT_PRINT(buf);
1576
}
1577
#endif
1578
1579
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
1580
/*STBC or LDPC pkt*/
1581
if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC |
1582
PHYSTS_3RD_TYPE_IC))
1583
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n Coding: LDPC=((%s)), STBC=((%s))",
1584
(dm->phy_dbg_info.is_ldpc_pkt) ? "Y" : "N",
1585
(dm->phy_dbg_info.is_stbc_pkt) ? "Y" : "N");
1586
RT_PRINT(buf);
1587
#endif
1588
1589
} else {
1590
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n No Link !!!");
1591
RT_PRINT(buf);
1592
}
1593
1594
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1595
fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
1596
RT_PRINT(buf);
1597
1598
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE, "\r\n [FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}",
1599
fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
1600
RT_PRINT(buf);
1601
1602
#if (ODM_IC_11N_SERIES_SUPPORT)
1603
if (dm->support_ic_type & ODM_IC_11N_SERIES) {
1604
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1605
"\r\n [OFDM FA Detail] Parity_Fail=%d, Rate_Illegal=%d, CRC8=%d, MCS_fail=%d, Fast_sync=%d, SB_Search_fail=%d",
1606
fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
1607
fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail,
1608
fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
1609
RT_PRINT(buf);
1610
}
1611
#endif
1612
RT_SPRINTF(buf, DBGM_CLI_BUF_SIZE,
1613
"\r\n is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
1614
dm->is_linked, dm->number_linked_client, dm->rssi_min,
1615
dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
1616
RT_PRINT(buf);
1617
1618
phydm_dm_summary_cli_win(dm, buf, target_macid);
1619
}
1620
1621
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1622
void phydm_sbd_check(
1623
struct dm_struct *dm)
1624
{
1625
static u32 pkt_cnt;
1626
static boolean sbd_state;
1627
u32 sym_count, count, value32;
1628
1629
if (sbd_state == 0) {
1630
pkt_cnt++;
1631
/*read SBD conter once every 5 packets*/
1632
if (pkt_cnt % 5 == 0) {
1633
odm_set_timer(dm, &dm->sbdcnt_timer, 0); /*@ms*/
1634
sbd_state = 1;
1635
}
1636
} else { /*read counter*/
1637
value32 = odm_get_bb_reg(dm, R_0xf98, MASKDWORD);
1638
sym_count = (value32 & 0x7C000000) >> 26;
1639
count = (value32 & 0x3F00000) >> 20;
1640
pr_debug("#SBD# sym_count %d count %d\n", sym_count, count);
1641
sbd_state = 0;
1642
}
1643
}
1644
#endif
1645
1646
void phydm_sbd_callback(
1647
struct phydm_timer_list *timer)
1648
{
1649
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1650
void *adapter = timer->Adapter;
1651
HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1652
struct dm_struct *dm = &hal_data->DM_OutSrc;
1653
1654
#if USE_WORKITEM
1655
odm_schedule_work_item(&dm->sbdcnt_workitem);
1656
#else
1657
phydm_sbd_check(dm);
1658
#endif
1659
#endif
1660
}
1661
1662
void phydm_sbd_workitem_callback(
1663
void *context)
1664
{
1665
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
1666
void *adapter = (void *)context;
1667
HAL_DATA_TYPE *hal_data = GET_HAL_DATA((PADAPTER)adapter);
1668
struct dm_struct *dm = &hal_data->DM_OutSrc;
1669
1670
phydm_sbd_check(dm);
1671
#endif
1672
}
1673
#endif
1674
1675
void phydm_reset_rx_rate_distribution(struct dm_struct *dm)
1676
{
1677
struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1678
1679
odm_memory_set(dm, &dbg->num_qry_legacy_pkt[0], 0,
1680
(LEGACY_RATE_NUM * 2));
1681
odm_memory_set(dm, &dbg->num_qry_ht_pkt[0], 0,
1682
(HT_RATE_NUM * 2));
1683
odm_memory_set(dm, &dbg->num_qry_pkt_sc_20m[0], 0,
1684
(LOW_BW_RATE_NUM * 2));
1685
1686
dbg->ht_pkt_not_zero = false;
1687
dbg->low_bw_20_occur = false;
1688
1689
#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1690
odm_memory_set(dm, &dbg->num_qry_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1691
odm_memory_set(dm, &dbg->num_qry_pkt_sc_40m[0], 0, LOW_BW_RATE_NUM * 2);
1692
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT == 1) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
1693
odm_memory_set(dm, &dbg->num_mu_vht_pkt[0], 0, VHT_RATE_NUM * 2);
1694
#endif
1695
dbg->vht_pkt_not_zero = false;
1696
dbg->low_bw_40_occur = false;
1697
#endif
1698
}
1699
1700
void phydm_rx_rate_distribution(void *dm_void)
1701
{
1702
struct dm_struct *dm = (struct dm_struct *)dm_void;
1703
struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1704
u8 i = 0;
1705
u8 rate_num = dm->num_rf_path, ss_ofst = 0;
1706
1707
PHYDM_DBG(dm, DBG_CMN, "[RxRate Cnt] =============>\n");
1708
1709
/*@======CCK=========================================================*/
1710
if (*dm->channel <= 14) {
1711
PHYDM_DBG(dm, DBG_CMN, "* CCK = {%d, %d, %d, %d}\n",
1712
dbg->num_qry_legacy_pkt[0],
1713
dbg->num_qry_legacy_pkt[1],
1714
dbg->num_qry_legacy_pkt[2],
1715
dbg->num_qry_legacy_pkt[3]);
1716
}
1717
/*@======OFDM========================================================*/
1718
PHYDM_DBG(dm, DBG_CMN, "* OFDM = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1719
dbg->num_qry_legacy_pkt[4], dbg->num_qry_legacy_pkt[5],
1720
dbg->num_qry_legacy_pkt[6], dbg->num_qry_legacy_pkt[7],
1721
dbg->num_qry_legacy_pkt[8], dbg->num_qry_legacy_pkt[9],
1722
dbg->num_qry_legacy_pkt[10], dbg->num_qry_legacy_pkt[11]);
1723
1724
/*@======HT==========================================================*/
1725
if (dbg->ht_pkt_not_zero) {
1726
for (i = 0; i < rate_num; i++) {
1727
ss_ofst = (i << 3);
1728
1729
PHYDM_DBG(dm, DBG_CMN,
1730
"* HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1731
(ss_ofst), (ss_ofst + 7),
1732
dbg->num_qry_ht_pkt[ss_ofst + 0],
1733
dbg->num_qry_ht_pkt[ss_ofst + 1],
1734
dbg->num_qry_ht_pkt[ss_ofst + 2],
1735
dbg->num_qry_ht_pkt[ss_ofst + 3],
1736
dbg->num_qry_ht_pkt[ss_ofst + 4],
1737
dbg->num_qry_ht_pkt[ss_ofst + 5],
1738
dbg->num_qry_ht_pkt[ss_ofst + 6],
1739
dbg->num_qry_ht_pkt[ss_ofst + 7]);
1740
}
1741
1742
if (dbg->low_bw_20_occur) {
1743
for (i = 0; i < rate_num; i++) {
1744
ss_ofst = (i << 3);
1745
1746
PHYDM_DBG(dm, DBG_CMN,
1747
"* [Low BW 20M] HT MCS[%d :%d ] = {%d, %d, %d, %d, %d, %d, %d, %d}\n",
1748
(ss_ofst), (ss_ofst + 7),
1749
dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1750
dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1751
dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1752
dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1753
dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1754
dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1755
dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1756
dbg->num_qry_pkt_sc_20m[ss_ofst + 7]);
1757
}
1758
}
1759
}
1760
1761
#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1762
/*@======VHT==========================================================*/
1763
if (dbg->vht_pkt_not_zero) {
1764
for (i = 0; i < rate_num; i++) {
1765
ss_ofst = 10 * i;
1766
1767
PHYDM_DBG(dm, DBG_CMN,
1768
"* VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1769
(i + 1),
1770
dbg->num_qry_vht_pkt[ss_ofst + 0],
1771
dbg->num_qry_vht_pkt[ss_ofst + 1],
1772
dbg->num_qry_vht_pkt[ss_ofst + 2],
1773
dbg->num_qry_vht_pkt[ss_ofst + 3],
1774
dbg->num_qry_vht_pkt[ss_ofst + 4],
1775
dbg->num_qry_vht_pkt[ss_ofst + 5],
1776
dbg->num_qry_vht_pkt[ss_ofst + 6],
1777
dbg->num_qry_vht_pkt[ss_ofst + 7],
1778
dbg->num_qry_vht_pkt[ss_ofst + 8],
1779
dbg->num_qry_vht_pkt[ss_ofst + 9]);
1780
}
1781
1782
if (dbg->low_bw_20_occur) {
1783
for (i = 0; i < rate_num; i++) {
1784
ss_ofst = 10 * i;
1785
1786
PHYDM_DBG(dm, DBG_CMN,
1787
"*[Low BW 20M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1788
(i + 1),
1789
dbg->num_qry_pkt_sc_20m[ss_ofst + 0],
1790
dbg->num_qry_pkt_sc_20m[ss_ofst + 1],
1791
dbg->num_qry_pkt_sc_20m[ss_ofst + 2],
1792
dbg->num_qry_pkt_sc_20m[ss_ofst + 3],
1793
dbg->num_qry_pkt_sc_20m[ss_ofst + 4],
1794
dbg->num_qry_pkt_sc_20m[ss_ofst + 5],
1795
dbg->num_qry_pkt_sc_20m[ss_ofst + 6],
1796
dbg->num_qry_pkt_sc_20m[ss_ofst + 7],
1797
dbg->num_qry_pkt_sc_20m[ss_ofst + 8],
1798
dbg->num_qry_pkt_sc_20m[ss_ofst + 9]);
1799
}
1800
}
1801
1802
if (dbg->low_bw_40_occur) {
1803
for (i = 0; i < rate_num; i++) {
1804
ss_ofst = 10 * i;
1805
1806
PHYDM_DBG(dm, DBG_CMN,
1807
"*[Low BW 40M] VHT-%d ss MCS[0:9] = {%d, %d, %d, %d, %d, %d, %d, %d, %d, %d}\n",
1808
(i + 1),
1809
dbg->num_qry_pkt_sc_40m[ss_ofst + 0],
1810
dbg->num_qry_pkt_sc_40m[ss_ofst + 1],
1811
dbg->num_qry_pkt_sc_40m[ss_ofst + 2],
1812
dbg->num_qry_pkt_sc_40m[ss_ofst + 3],
1813
dbg->num_qry_pkt_sc_40m[ss_ofst + 4],
1814
dbg->num_qry_pkt_sc_40m[ss_ofst + 5],
1815
dbg->num_qry_pkt_sc_40m[ss_ofst + 6],
1816
dbg->num_qry_pkt_sc_40m[ss_ofst + 7],
1817
dbg->num_qry_pkt_sc_40m[ss_ofst + 8],
1818
dbg->num_qry_pkt_sc_40m[ss_ofst + 9]);
1819
}
1820
}
1821
}
1822
#endif
1823
}
1824
1825
u16 phydm_rx_utility(void *dm_void, u16 avg_phy_rate, u8 rx_max_ss,
1826
enum channel_width bw)
1827
{
1828
struct dm_struct *dm = (struct dm_struct *)dm_void;
1829
struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1830
u16 utility_primitive = 0, utility = 0;
1831
1832
if (dbg->ht_pkt_not_zero) {
1833
/*@ MCS7 20M: tp = 65, 1000/65 = 15.38, 65*15.5 = 1007*/
1834
utility_primitive = avg_phy_rate * 15 + (avg_phy_rate >> 1);
1835
}
1836
#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1837
else if (dbg->vht_pkt_not_zero) {
1838
/*@ VHT 1SS MCS9(fake) 20M: tp = 90, 1000/90 = 11.11, 65*11.125 = 1001*/
1839
utility_primitive = avg_phy_rate * 11 + (avg_phy_rate >> 3);
1840
}
1841
#endif
1842
else {
1843
/*@ 54M, 1000/54 = 18.5, 54*18.5 = 999*/
1844
utility_primitive = avg_phy_rate * 18 + (avg_phy_rate >> 1);
1845
}
1846
1847
utility = (utility_primitive / rx_max_ss) >> bw;
1848
1849
if (utility > 1000)
1850
utility = 1000;
1851
1852
return utility;
1853
}
1854
1855
u16 phydm_rx_avg_phy_rate(void *dm_void)
1856
{
1857
struct dm_struct *dm = (struct dm_struct *)dm_void;
1858
struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
1859
u8 i = 0, rate_num = 0, rate_base = 0;
1860
u16 rate = 0, avg_phy_rate = 0;
1861
u32 pkt_cnt = 0, phy_rate_sum = 0;
1862
1863
if (dbg->ht_pkt_not_zero) {
1864
rate_num = HT_RATE_NUM;
1865
rate_base = ODM_RATEMCS0;
1866
for (i = 0; i < rate_num; i++) {
1867
rate = phy_rate_table[i + rate_base] << *dm->band_width;
1868
phy_rate_sum += dbg->num_qry_ht_pkt[i] * rate;
1869
pkt_cnt += dbg->num_qry_ht_pkt[i];
1870
}
1871
}
1872
#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1873
else if (dbg->vht_pkt_not_zero) {
1874
rate_num = VHT_RATE_NUM;
1875
rate_base = ODM_RATEVHTSS1MCS0;
1876
for (i = 0; i < rate_num; i++) {
1877
rate = phy_rate_table[i + rate_base] << *dm->band_width;
1878
phy_rate_sum += dbg->num_qry_vht_pkt[i] * rate;
1879
pkt_cnt += dbg->num_qry_vht_pkt[i];
1880
}
1881
}
1882
#endif
1883
else {
1884
for (i = ODM_RATE1M; i <= ODM_RATE54M; i++) {
1885
/*SKIP 1M & 6M for beacon case*/
1886
if (*dm->channel < 36 && i == ODM_RATE1M)
1887
continue;
1888
1889
if (*dm->channel >= 36 && i == ODM_RATE6M)
1890
continue;
1891
1892
rate = phy_rate_table[i];
1893
phy_rate_sum += dbg->num_qry_legacy_pkt[i] * rate;
1894
pkt_cnt += dbg->num_qry_legacy_pkt[i];
1895
}
1896
}
1897
1898
#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
1899
if (dbg->low_bw_40_occur) {
1900
for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1901
rate = phy_rate_table[i + rate_base]
1902
<< CHANNEL_WIDTH_40;
1903
phy_rate_sum += dbg->num_qry_pkt_sc_40m[i] * rate;
1904
pkt_cnt += dbg->num_qry_pkt_sc_40m[i];
1905
}
1906
}
1907
#endif
1908
1909
if (dbg->low_bw_20_occur) {
1910
for (i = 0; i < LOW_BW_RATE_NUM; i++) {
1911
rate = phy_rate_table[i + rate_base];
1912
phy_rate_sum += dbg->num_qry_pkt_sc_20m[i] * rate;
1913
pkt_cnt += dbg->num_qry_pkt_sc_20m[i];
1914
}
1915
}
1916
1917
avg_phy_rate = (pkt_cnt == 0) ? 0 : (u16)(phy_rate_sum / pkt_cnt);
1918
1919
return avg_phy_rate;
1920
}
1921
1922
void phydm_print_hist_2_buf(void *dm_void, u16 *val, u16 len, char *buf,
1923
u16 buf_size)
1924
{
1925
struct dm_struct *dm = (struct dm_struct *)dm_void;
1926
1927
if (len == PHY_HIST_SIZE) {
1928
PHYDM_SNPRINTF(buf, buf_size,
1929
"[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1930
val[0], val[1], val[2], val[3], val[4],
1931
val[5], val[6], val[7], val[8], val[9],
1932
val[10], val[11]);
1933
} else if (len == (PHY_HIST_SIZE - 1)) {
1934
PHYDM_SNPRINTF(buf, buf_size,
1935
"[%.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d, %.2d]",
1936
val[0], val[1], val[2], val[3], val[4],
1937
val[5], val[6], val[7], val[8], val[9],
1938
val[10]);
1939
}
1940
}
1941
1942
void phydm_nss_hitogram(void *dm_void, enum PDM_RATE_TYPE rate_type)
1943
{
1944
struct dm_struct *dm = (struct dm_struct *)dm_void;
1945
struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1946
struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1947
char buf[PHYDM_SNPRINT_SIZE] = {0};
1948
u16 buf_size = PHYDM_SNPRINT_SIZE;
1949
u16 h_size = PHY_HIST_SIZE;
1950
u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
1951
u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
1952
u8 i = 0;
1953
u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
1954
1955
for (i = 0; i < ss; i++) {
1956
if (rate_type == PDM_1SS) {
1957
evm_hist = &dbg_s->evm_1ss_hist[0];
1958
snr_hist = &dbg_s->snr_1ss_hist[0];
1959
} else if (rate_type == PDM_2SS) {
1960
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
1961
evm_hist = &dbg_s->evm_2ss_hist[i][0];
1962
snr_hist = &dbg_s->snr_2ss_hist[i][0];
1963
#endif
1964
} else if (rate_type == PDM_3SS) {
1965
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
1966
evm_hist = &dbg_s->evm_3ss_hist[i][0];
1967
snr_hist = &dbg_s->snr_3ss_hist[i][0];
1968
#endif
1969
} else if (rate_type == PDM_4SS) {
1970
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
1971
evm_hist = &dbg_s->evm_4ss_hist[i][0];
1972
snr_hist = &dbg_s->snr_4ss_hist[i][0];
1973
#endif
1974
}
1975
1976
phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
1977
PHYDM_DBG(dm, DBG_CMN, "[%d-SS][EVM][%d]=%s\n", ss, i, buf);
1978
phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
1979
PHYDM_DBG(dm, DBG_CMN, "[%d-SS][SNR][%d]=%s\n", ss, i, buf);
1980
}
1981
}
1982
1983
#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
1984
void phydm_show_cn_hitogram(void *dm_void)
1985
{
1986
struct dm_struct *dm = (struct dm_struct *)dm_void;
1987
struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
1988
struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
1989
u16 th_tmp[PHY_HIST_TH_SIZE];
1990
char buf[PHYDM_SNPRINT_SIZE] = {0};
1991
u8 i = 0;
1992
u16 *cn_hist = NULL;
1993
u32 cn_avg = 0;
1994
1995
if (!dm->pkt_proc_struct.physts_auto_swch_en)
1996
return;
1997
1998
if (dm->num_rf_path == 1)
1999
return;
2000
2001
PHYDM_DBG(dm, DBG_CMN, "[Condition number Histogram] ========>\n");
2002
/*@===[Threshold]=============================================================*/
2003
for (i = 0; i < PHY_HIST_TH_SIZE; i++)
2004
th_tmp[i] = dbg_i->cn_hist_th[i] >> 1;
2005
2006
phydm_print_hist_2_buf(dm, th_tmp,
2007
PHY_HIST_TH_SIZE, buf, PHYDM_SNPRINT_SIZE);
2008
PHYDM_DBG(dm, DBG_CMN, "%-22s=%s\n", "[CN_TH]", buf);
2009
2010
/*@===[Histogram]=============================================================*/
2011
2012
for (i = 1; i <= dm->num_rf_path; i++) {
2013
if (dbg_s->p4_cnt[i] == 0)
2014
continue;
2015
2016
cn_avg = PHYDM_DIV((dbg_s->cn_sum[i] + (dbg_s->p4_cnt[i] >> 1)),
2017
dbg_s->p4_cnt[i]);
2018
cn_hist = &dbg_s->cn_hist[i][0];
2019
phydm_print_hist_2_buf(dm, cn_hist,
2020
PHY_HIST_SIZE, buf, PHYDM_SNPRINT_SIZE);
2021
PHYDM_DBG(dm, DBG_CMN, "[%d-SS]%s=(avg:%d.%d)%s\n",
2022
i + 1, "[CN]", cn_avg >> 1, (cn_avg & 0x1) * 5, buf);
2023
}
2024
}
2025
#endif
2026
2027
void phydm_show_phy_hitogram(void *dm_void)
2028
{
2029
struct dm_struct *dm = (struct dm_struct *)dm_void;
2030
struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2031
struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2032
char buf[PHYDM_SNPRINT_SIZE] = {0};
2033
u16 buf_size = PHYDM_SNPRINT_SIZE;
2034
u16 th_size = PHY_HIST_SIZE - 1;
2035
u8 i = 0;
2036
2037
PHYDM_DBG(dm, DBG_CMN, "[PHY Histogram] ==============>\n");
2038
/*@===[Threshold]=============================================================*/
2039
phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
2040
PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[EVM_TH]", buf);
2041
2042
phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
2043
PHYDM_DBG(dm, DBG_CMN, "%-16s=%s\n", "[SNR_TH]", buf);
2044
/*@===[OFDM]==================================================================*/
2045
if (dbg_s->rssi_ofdm_cnt) {
2046
phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
2047
buf, buf_size);
2048
PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][EVM]", buf);
2049
2050
phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
2051
buf, buf_size);
2052
PHYDM_DBG(dm, DBG_CMN, "%-14s=%s\n", "[OFDM][SNR]", buf);
2053
}
2054
/*@===[1-SS]==================================================================*/
2055
if (dbg_s->rssi_1ss_cnt)
2056
phydm_nss_hitogram(dm, PDM_1SS);
2057
/*@===[2-SS]==================================================================*/
2058
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
2059
if ((dm->support_ic_type & PHYDM_IC_ABOVE_2SS) && dbg_s->rssi_2ss_cnt)
2060
phydm_nss_hitogram(dm, PDM_2SS);
2061
#endif
2062
/*@===[3-SS]==================================================================*/
2063
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
2064
if ((dm->support_ic_type & PHYDM_IC_ABOVE_3SS) && dbg_s->rssi_3ss_cnt)
2065
phydm_nss_hitogram(dm, PDM_3SS);
2066
#endif
2067
/*@===[4-SS]==================================================================*/
2068
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
2069
if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS && dbg_s->rssi_4ss_cnt)
2070
phydm_nss_hitogram(dm, PDM_4SS);
2071
#endif
2072
}
2073
2074
void phydm_avg_phy_val_nss(void *dm_void, u8 nss)
2075
{
2076
struct dm_struct *dm = (struct dm_struct *)dm_void;
2077
struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2078
struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2079
struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2080
char *rate_type = NULL;
2081
u32 *tmp_cnt = NULL;
2082
u8 *tmp_rssi_avg = NULL;
2083
u32 *tmp_rssi_sum = NULL;
2084
u8 *tmp_snr_avg = NULL;
2085
u32 *tmp_snr_sum = NULL;
2086
u8 *tmp_evm_avg = NULL;
2087
u32 *tmp_evm_sum = NULL;
2088
u8 evm_rpt_show[RF_PATH_MEM_SIZE];
2089
u8 i = 0;
2090
2091
odm_memory_set(dm, &evm_rpt_show[0], 0, RF_PATH_MEM_SIZE);
2092
2093
switch (nss) {
2094
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
2095
case 4:
2096
rate_type = "[4-SS]";
2097
tmp_cnt = &dbg_s->rssi_4ss_cnt;
2098
tmp_rssi_avg = &dbg_avg->rssi_4ss_avg[0];
2099
tmp_snr_avg = &dbg_avg->snr_4ss_avg[0];
2100
tmp_rssi_sum = &dbg_s->rssi_4ss_sum[0];
2101
tmp_snr_sum = &dbg_s->snr_4ss_sum[0];
2102
tmp_evm_avg = &dbg_avg->evm_4ss_avg[0];
2103
tmp_evm_sum = &dbg_s->evm_4ss_sum[0];
2104
break;
2105
#endif
2106
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
2107
case 3:
2108
rate_type = "[3-SS]";
2109
tmp_cnt = &dbg_s->rssi_3ss_cnt;
2110
tmp_rssi_avg = &dbg_avg->rssi_3ss_avg[0];
2111
tmp_snr_avg = &dbg_avg->snr_3ss_avg[0];
2112
tmp_rssi_sum = &dbg_s->rssi_3ss_sum[0];
2113
tmp_snr_sum = &dbg_s->snr_3ss_sum[0];
2114
tmp_evm_avg = &dbg_avg->evm_3ss_avg[0];
2115
tmp_evm_sum = &dbg_s->evm_3ss_sum[0];
2116
break;
2117
#endif
2118
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
2119
case 2:
2120
rate_type = "[2-SS]";
2121
tmp_cnt = &dbg_s->rssi_2ss_cnt;
2122
tmp_rssi_avg = &dbg_avg->rssi_2ss_avg[0];
2123
tmp_snr_avg = &dbg_avg->snr_2ss_avg[0];
2124
tmp_rssi_sum = &dbg_s->rssi_2ss_sum[0];
2125
tmp_snr_sum = &dbg_s->snr_2ss_sum[0];
2126
tmp_evm_avg = &dbg_avg->evm_2ss_avg[0];
2127
tmp_evm_sum = &dbg_s->evm_2ss_sum[0];
2128
break;
2129
#endif
2130
case 1:
2131
rate_type = "[1-SS]";
2132
tmp_cnt = &dbg_s->rssi_1ss_cnt;
2133
tmp_rssi_avg = &dbg_avg->rssi_1ss_avg[0];
2134
tmp_snr_avg = &dbg_avg->snr_1ss_avg[0];
2135
tmp_rssi_sum = &dbg_s->rssi_1ss_sum[0];
2136
tmp_snr_sum = &dbg_s->snr_1ss_sum[0];
2137
tmp_evm_avg = &dbg_avg->evm_1ss_avg;
2138
tmp_evm_sum = &dbg_s->evm_1ss_sum;
2139
break;
2140
case 0:
2141
rate_type = "[L-OFDM]";
2142
tmp_cnt = &dbg_s->rssi_ofdm_cnt;
2143
tmp_rssi_avg = &dbg_avg->rssi_ofdm_avg[0];
2144
tmp_snr_avg = &dbg_avg->snr_ofdm_avg[0];
2145
tmp_rssi_sum = &dbg_s->rssi_ofdm_sum[0];
2146
tmp_snr_sum = &dbg_s->snr_ofdm_sum[0];
2147
tmp_evm_avg = &dbg_avg->evm_ofdm_avg;
2148
tmp_evm_sum = &dbg_s->evm_ofdm_sum;
2149
break;
2150
default:
2151
PHYDM_DBG(dm, DBG_CMN, "[warning] %s\n", __func__);
2152
return;
2153
}
2154
2155
if (*tmp_cnt != 0) {
2156
for (i = 0; i < dm->num_rf_path; i++) {
2157
tmp_rssi_avg[i] = (u8)(tmp_rssi_sum[i] / *tmp_cnt);
2158
tmp_snr_avg[i] = (u8)(tmp_snr_sum[i] / *tmp_cnt);
2159
}
2160
2161
if (nss == 0 || nss == 1) {
2162
*tmp_evm_avg = (u8)(*tmp_evm_sum / *tmp_cnt);
2163
evm_rpt_show[0] = *tmp_evm_avg;
2164
} else {
2165
for (i = 0; i < nss; i++) {
2166
tmp_evm_avg[i] = (u8)(tmp_evm_sum[i] /
2167
*tmp_cnt);
2168
evm_rpt_show[i] = tmp_evm_avg[i];
2169
}
2170
}
2171
}
2172
2173
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
2174
PHYDM_DBG(dm, DBG_CMN,
2175
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
2176
rate_type, *tmp_cnt,
2177
tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2178
tmp_rssi_avg[3], tmp_snr_avg[0], tmp_snr_avg[1],
2179
tmp_snr_avg[2], tmp_snr_avg[3], evm_rpt_show[0],
2180
evm_rpt_show[1], evm_rpt_show[2], evm_rpt_show[3]);
2181
#elif (defined(PHYDM_COMPILE_ABOVE_3SS))
2182
PHYDM_DBG(dm, DBG_CMN,
2183
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d}\n",
2184
rate_type, *tmp_cnt,
2185
tmp_rssi_avg[0], tmp_rssi_avg[1], tmp_rssi_avg[2],
2186
tmp_snr_avg[0], tmp_snr_avg[1], tmp_snr_avg[2],
2187
evm_rpt_show[0], evm_rpt_show[1], evm_rpt_show[2]);
2188
#elif (defined(PHYDM_COMPILE_ABOVE_2SS))
2189
PHYDM_DBG(dm, DBG_CMN,
2190
"* %-8s Cnt= ((%.3d)) RSSI:{%.2d, %.2d} SNR:{%.2d, %.2d} EVM:{-%.2d, -%.2d}\n",
2191
rate_type, *tmp_cnt,
2192
tmp_rssi_avg[0], tmp_rssi_avg[1],
2193
tmp_snr_avg[0], tmp_snr_avg[1],
2194
evm_rpt_show[0], evm_rpt_show[1]);
2195
#else
2196
PHYDM_DBG(dm, DBG_CMN,
2197
"* %-8s Cnt= ((%.3d)) RSSI:{%.2d} SNR:{%.2d} EVM:{-%.2d}\n",
2198
rate_type, *tmp_cnt,
2199
tmp_rssi_avg[0], tmp_snr_avg[0], evm_rpt_show[0]);
2200
#endif
2201
}
2202
2203
void phydm_get_avg_phystatus_val(void *dm_void)
2204
{
2205
struct dm_struct *dm = (struct dm_struct *)dm_void;
2206
struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
2207
struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
2208
struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
2209
u32 avg_tmp = 0;
2210
u8 i = 0;
2211
2212
PHYDM_DBG(dm, DBG_CMN, "[PHY Avg] ==============>\n");
2213
phydm_reset_phystatus_avg(dm);
2214
2215
/*@===[Beacon]===*/
2216
if (dbg_s->rssi_beacon_cnt) {
2217
for (i = 0; i < dm->num_rf_path; i++) {
2218
avg_tmp = dbg_s->rssi_beacon_sum[i] /
2219
dbg_s->rssi_beacon_cnt;
2220
dbg_avg->rssi_beacon_avg[i] = (u8)avg_tmp;
2221
}
2222
}
2223
2224
switch (dm->num_rf_path) {
2225
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
2226
case 4:
2227
PHYDM_DBG(dm, DBG_CMN,
2228
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2229
"[Beacon]", dbg_s->rssi_beacon_cnt,
2230
dbg_avg->rssi_beacon_avg[0],
2231
dbg_avg->rssi_beacon_avg[1],
2232
dbg_avg->rssi_beacon_avg[2],
2233
dbg_avg->rssi_beacon_avg[3]);
2234
break;
2235
#endif
2236
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
2237
case 3:
2238
PHYDM_DBG(dm, DBG_CMN,
2239
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2240
"[Beacon]", dbg_s->rssi_beacon_cnt,
2241
dbg_avg->rssi_beacon_avg[0],
2242
dbg_avg->rssi_beacon_avg[1],
2243
dbg_avg->rssi_beacon_avg[2]);
2244
break;
2245
#endif
2246
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
2247
case 2:
2248
PHYDM_DBG(dm, DBG_CMN,
2249
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2250
"[Beacon]", dbg_s->rssi_beacon_cnt,
2251
dbg_avg->rssi_beacon_avg[0],
2252
dbg_avg->rssi_beacon_avg[1]);
2253
break;
2254
#endif
2255
PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2256
"[Beacon]", dbg_s->rssi_beacon_cnt,
2257
dbg_avg->rssi_beacon_avg[0]);
2258
break;
2259
}
2260
2261
/*@===[CCK]===*/
2262
if (dbg_s->rssi_cck_cnt) {
2263
dbg_avg->rssi_cck_avg = (u8)(dbg_s->rssi_cck_sum /
2264
dbg_s->rssi_cck_cnt);
2265
#ifdef PHYSTS_3RD_TYPE_SUPPORT
2266
if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2267
for (i = 0; i < dm->num_rf_path - 1; i++) {
2268
avg_tmp = dbg_s->rssi_cck_sum_abv_2ss[i] /
2269
dbg_s->rssi_cck_cnt;
2270
dbg_avg->rssi_cck_avg_abv_2ss[i] = (u8)avg_tmp;
2271
}
2272
}
2273
#endif
2274
}
2275
2276
switch (dm->num_rf_path) {
2277
#ifdef PHYSTS_3RD_TYPE_SUPPORT
2278
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
2279
case 4:
2280
PHYDM_DBG(dm, DBG_CMN,
2281
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
2282
"[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2283
dbg_avg->rssi_cck_avg_abv_2ss[0],
2284
dbg_avg->rssi_cck_avg_abv_2ss[1],
2285
dbg_avg->rssi_cck_avg_abv_2ss[2]);
2286
break;
2287
#endif
2288
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
2289
case 3:
2290
PHYDM_DBG(dm, DBG_CMN,
2291
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
2292
"[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2293
dbg_avg->rssi_cck_avg_abv_2ss[0],
2294
dbg_avg->rssi_cck_avg_abv_2ss[1]);
2295
break;
2296
#endif
2297
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
2298
case 2:
2299
PHYDM_DBG(dm, DBG_CMN,
2300
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
2301
"[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg,
2302
dbg_avg->rssi_cck_avg_abv_2ss[0]);
2303
break;
2304
#endif
2305
#endif
2306
default:
2307
PHYDM_DBG(dm, DBG_CMN, "* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
2308
"[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
2309
break;
2310
}
2311
2312
#if 1
2313
for (i = 0; i <= dm->num_rf_path; i++)
2314
phydm_avg_phy_val_nss(dm, i);
2315
#else
2316
/*@===[OFDM]===*/
2317
phydm_avg_phy_val_nss(dm, 0);
2318
/*@===[1-SS]===*/
2319
phydm_avg_phy_val_nss(dm, 1);
2320
/*@===[2-SS]===*/
2321
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
2322
if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS))
2323
phydm_avg_phy_val_nss(dm, 2);
2324
#endif
2325
/*@===[3-SS]===*/
2326
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
2327
if (dm->support_ic_type & (PHYDM_IC_ABOVE_3SS))
2328
phydm_avg_phy_val_nss(dm, 3);
2329
#endif
2330
/*@===[4-SS]===*/
2331
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
2332
if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS)
2333
phydm_avg_phy_val_nss(dm, 4);
2334
#endif
2335
#endif
2336
}
2337
2338
void phydm_get_phy_statistic(void *dm_void)
2339
{
2340
struct dm_struct *dm = (struct dm_struct *)dm_void;
2341
struct cmn_sta_info *sta = dm->phydm_sta_info[dm->one_entry_macid];
2342
enum channel_width bw;
2343
u16 avg_phy_rate = 0;
2344
u16 utility = 0;
2345
u8 rx_ss = 1;
2346
2347
avg_phy_rate = phydm_rx_avg_phy_rate(dm);
2348
2349
if (dm->is_one_entry_only && is_sta_active(sta)) {
2350
rx_ss = phydm_get_rx_stream_num(dm, sta->mimo_type);
2351
bw = sta->bw_mode;
2352
utility = phydm_rx_utility(dm, avg_phy_rate, rx_ss, bw);
2353
}
2354
PHYDM_DBG(dm, DBG_CMN, "Avg_rx_rate = %d, rx_utility=( %d / 1000 )\n",
2355
avg_phy_rate, utility);
2356
2357
phydm_rx_rate_distribution(dm);
2358
phydm_reset_rx_rate_distribution(dm);
2359
2360
phydm_show_phy_hitogram(dm);
2361
#ifdef PHYDM_PHYSTAUS_AUTO_SWITCH
2362
phydm_show_cn_hitogram(dm);
2363
#endif
2364
phydm_get_avg_phystatus_val(dm);
2365
phydm_reset_phystatus_statistic(dm);
2366
};
2367
2368
void phydm_basic_dbg_msg_linked(void *dm_void)
2369
{
2370
struct dm_struct *dm = (struct dm_struct *)dm_void;
2371
struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2372
struct odm_phy_dbg_info *dbg_t = &dm->phy_dbg_info;
2373
u16 macid, client_cnt = 0;
2374
u8 rate = 0;
2375
struct cmn_sta_info *entry = NULL;
2376
char dbg_buf[PHYDM_SNPRINT_SIZE] = {0};
2377
struct phydm_cfo_rpt cfo;
2378
u8 i = 0;
2379
2380
PHYDM_DBG(dm, DBG_CMN, "ID=((%d)), BW=((%d)), fc=((CH-%d))\n",
2381
dm->curr_station_id, 20 << *dm->band_width, *dm->channel);
2382
2383
#ifdef ODM_IC_11N_SERIES_SUPPORT
2384
#ifdef PHYDM_PRIMARY_CCA
2385
if (((*dm->channel <= 14) && (*dm->band_width == CHANNEL_WIDTH_40)) &&
2386
(dm->support_ic_type & ODM_IC_11N_SERIES)) {
2387
PHYDM_DBG(dm, DBG_CMN, "Primary CCA at ((%s SB))\n",
2388
((*dm->sec_ch_offset == SECOND_CH_AT_LSB) ? "U" :
2389
"L"));
2390
}
2391
#endif
2392
#endif
2393
2394
if (dm->cck_new_agc || dm->rx_rate > ODM_RATE11M) {
2395
PHYDM_DBG(dm, DBG_CMN, "[AGC Idx] {0x%x, 0x%x, 0x%x, 0x%x}\n",
2396
dm->ofdm_agc_idx[0], dm->ofdm_agc_idx[1],
2397
dm->ofdm_agc_idx[2], dm->ofdm_agc_idx[3]);
2398
} else {
2399
PHYDM_DBG(dm, DBG_CMN, "[CCK AGC Idx] {LNA,VGA}={0x%x, 0x%x}\n",
2400
dm->cck_lna_idx, dm->cck_vga_idx);
2401
}
2402
2403
phydm_print_rate_2_buff(dm, dm->rx_rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2404
PHYDM_DBG(dm, DBG_CMN, "RSSI:{%d, %d, %d, %d}, RxRate:%s (0x%x)\n",
2405
(dm->rssi_a == 0xff) ? 0 : dm->rssi_a,
2406
(dm->rssi_b == 0xff) ? 0 : dm->rssi_b,
2407
(dm->rssi_c == 0xff) ? 0 : dm->rssi_c,
2408
(dm->rssi_d == 0xff) ? 0 : dm->rssi_d,
2409
dbg_buf, dm->rx_rate);
2410
2411
rate = dbg_t->beacon_phy_rate;
2412
phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2413
2414
PHYDM_DBG(dm, DBG_CMN, "Beacon_cnt=%d, rate_idx=%s (0x%x)\n",
2415
dbg_t->num_qry_beacon_pkt, dbg_buf, dbg_t->beacon_phy_rate);
2416
2417
phydm_get_phy_statistic(dm);
2418
2419
PHYDM_DBG(dm, DBG_CMN,
2420
"rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
2421
dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
2422
2423
/*Print TX rate*/
2424
for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
2425
entry = dm->phydm_sta_info[macid];
2426
2427
if (!is_sta_active(entry))
2428
continue;
2429
2430
rate = entry->ra_info.curr_tx_rate;
2431
phydm_print_rate_2_buff(dm, rate, dbg_buf, PHYDM_SNPRINT_SIZE);
2432
PHYDM_DBG(dm, DBG_CMN, "TxRate[%d]=%s (0x%x)\n",
2433
macid, dbg_buf, entry->ra_info.curr_tx_rate);
2434
2435
client_cnt++;
2436
2437
if (client_cnt >= dm->number_linked_client)
2438
break;
2439
}
2440
2441
PHYDM_DBG(dm, DBG_CMN,
2442
"TP {Tx, Rx, Total} = {%d, %d, %d}Mbps, Traffic_Load=(%d))\n",
2443
dm->tx_tp, dm->rx_tp, dm->total_tp, dm->traffic_load);
2444
2445
PHYDM_DBG(dm, DBG_CMN, "CFO_avg=((%d kHz)), CFO_traking = ((%s%d))\n",
2446
cfo_t->CFO_ave_pre,
2447
((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2448
DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2449
2450
/* @CFO report */
2451
switch (dm->ic_ip_series) {
2452
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
2453
case PHYDM_IC_JGR3:
2454
PHYDM_DBG(dm, DBG_CMN, "cfo_tail = {%d, %d, %d, %d}\n",
2455
dbg_t->cfo_tail[0], dbg_t->cfo_tail[1],
2456
dbg_t->cfo_tail[2], dbg_t->cfo_tail[3]);
2457
break;
2458
#endif
2459
default:
2460
phydm_get_cfo_info(dm, &cfo);
2461
for (i = 0; i < dm->num_rf_path; i++) {
2462
PHYDM_DBG(dm, DBG_CMN,
2463
"CFO[%d] {S, L, Sec, Acq, End} = {%d, %d, %d, %d, %d}\n",
2464
i, cfo.cfo_rpt_s[i], cfo.cfo_rpt_l[i],
2465
cfo.cfo_rpt_sec[i], cfo.cfo_rpt_acq[i],
2466
cfo.cfo_rpt_end[i]);
2467
}
2468
break;
2469
}
2470
2471
/* @Condition number */
2472
#if (RTL8822B_SUPPORT)
2473
if (dm->support_ic_type == ODM_RTL8822B) {
2474
PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%.4d)), %d\n",
2475
dbg_t->condi_num >> 4,
2476
phydm_show_fraction_num(dbg_t->condi_num & 0xf, 4),
2477
dbg_t->condi_num);
2478
}
2479
#endif
2480
#ifdef PHYSTS_3RD_TYPE_SUPPORT
2481
if (dm->support_ic_type & PHYSTS_3RD_TYPE_IC) {
2482
PHYDM_DBG(dm, DBG_CMN, "Condi_Num=((%d.%4d dB))\n",
2483
dbg_t->condi_num >> 1,
2484
phydm_show_fraction_num(dbg_t->condi_num & 0x1, 1));
2485
}
2486
#endif
2487
2488
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT || defined(PHYSTS_3RD_TYPE_SUPPORT))
2489
/*STBC or LDPC pkt*/
2490
if (dm->support_ic_type & (PHYSTS_2ND_TYPE_IC | PHYSTS_3RD_TYPE_IC))
2491
PHYDM_DBG(dm, DBG_CMN, "Coding: LDPC=((%s)), STBC=((%s))\n",
2492
(dbg_t->is_ldpc_pkt) ? "Y" : "N",
2493
(dbg_t->is_stbc_pkt) ? "Y" : "N");
2494
#endif
2495
}
2496
2497
void phydm_dm_summary(void *dm_void, u8 macid)
2498
{
2499
struct dm_struct *dm = (struct dm_struct *)dm_void;
2500
struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
2501
struct phydm_cfo_track_struct *cfo_t = &dm->dm_cfo_track;
2502
struct cmn_sta_info *sta = NULL;
2503
struct ra_sta_info *ra = NULL;
2504
struct dtp_info *dtp = NULL;
2505
u64 comp = dm->support_ability;
2506
u64 pause_comp = dm->pause_ability;
2507
2508
if (!(dm->debug_components & DBG_DM_SUMMARY))
2509
return;
2510
2511
if (!dm->is_linked) {
2512
pr_debug("[%s]No Link !!!\n", __func__);
2513
return;
2514
}
2515
2516
sta = dm->phydm_sta_info[macid];
2517
2518
if (!is_sta_active(sta)) {
2519
pr_debug("[Warning] %s invalid STA, macid=%d\n",
2520
__func__, macid);
2521
return;
2522
}
2523
2524
ra = &sta->ra_info;
2525
dtp = &sta->dtp_stat;
2526
pr_debug("[%s]===========>\n", __func__);
2527
2528
pr_debug("00.(%s) %-12s: IGI=0x%x, Dyn_Rng=0x%x~0x%x, FA_th={%d,%d,%d}\n",
2529
((comp & ODM_BB_DIG) ?
2530
((pause_comp & ODM_BB_DIG) ? "P" : "V") : "."),
2531
"DIG",
2532
dig_t->cur_ig_value,
2533
dig_t->rx_gain_range_min, dig_t->rx_gain_range_max,
2534
dig_t->fa_th[0], dig_t->fa_th[1], dig_t->fa_th[2]);
2535
2536
pr_debug("01.(%s) %-12s: rssi_lv=%d, mask=0x%llx\n",
2537
((comp & ODM_BB_RA_MASK) ?
2538
((pause_comp & ODM_BB_RA_MASK) ? "P" : "V") : "."),
2539
"RaMask",
2540
ra->rssi_level, ra->ramask);
2541
2542
#ifdef CONFIG_DYNAMIC_TX_TWR
2543
pr_debug("02.(%s) %-12s: pwr_lv=%d\n",
2544
((comp & ODM_BB_DYNAMIC_TXPWR) ?
2545
((pause_comp & ODM_BB_DYNAMIC_TXPWR) ? "P" : "V") : "."),
2546
"DynTxPwr",
2547
dtp->sta_tx_high_power_lvl);
2548
#endif
2549
2550
pr_debug("05.(%s) %-12s: cck_pd_lv=%d\n",
2551
((comp & ODM_BB_CCK_PD) ?
2552
((pause_comp & ODM_BB_CCK_PD) ? "P" : "V") : "."),
2553
"CCK_PD", dm->dm_cckpd_table.cck_pd_lv);
2554
2555
#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2556
pr_debug("06.(%s) %-12s: div_type=%d, curr_ant=%s\n",
2557
((comp & ODM_BB_ANT_DIV) ?
2558
((pause_comp & ODM_BB_ANT_DIV) ? "P" : "V") : "."),
2559
"ANT_DIV",
2560
dm->ant_div_type,
2561
(dm->dm_fat_table.rx_idle_ant == MAIN_ANT) ? "MAIN" : "AUX");
2562
#endif
2563
2564
#ifdef PHYDM_POWER_TRAINING_SUPPORT
2565
pr_debug("08.(%s) %-12s: PT_score=%d, disable_PT=%d\n",
2566
((comp & ODM_BB_PWR_TRAIN) ?
2567
((pause_comp & ODM_BB_PWR_TRAIN) ? "P" : "V") : "."),
2568
"PwrTrain",
2569
dm->pow_train_table.pow_train_score,
2570
dm->is_disable_power_training);
2571
#endif
2572
2573
#ifdef CONFIG_PHYDM_DFS_MASTER
2574
pr_debug("11.(%s) %-12s: dbg_mode=%d, region_domain=%d\n",
2575
((comp & ODM_BB_DFS) ?
2576
((pause_comp & ODM_BB_DFS) ? "P" : "V") : "."),
2577
"DFS",
2578
dm->dfs.dbg_mode, dm->dfs_region_domain);
2579
#endif
2580
#ifdef PHYDM_SUPPORT_ADAPTIVITY
2581
pr_debug("13.(%s) %-12s: th{l2h, h2l}={%d, %d}, edcca_flag=%d\n",
2582
((comp & ODM_BB_ADAPTIVITY) ?
2583
((pause_comp & ODM_BB_ADAPTIVITY) ? "P" : "V") : "."),
2584
"Adaptivity",
2585
dm->adaptivity.th_l2h, dm->adaptivity.th_h2l,
2586
dm->false_alm_cnt.edcca_flag);
2587
#endif
2588
pr_debug("14.(%s) %-12s: CFO_avg=%d kHz, CFO_traking=%s%d\n",
2589
((comp & ODM_BB_CFO_TRACKING) ?
2590
((pause_comp & ODM_BB_CFO_TRACKING) ? "P" : "V") : "."),
2591
"CfoTrack",
2592
cfo_t->CFO_ave_pre,
2593
((cfo_t->crystal_cap > cfo_t->def_x_cap) ? "+" : "-"),
2594
DIFF_2(cfo_t->crystal_cap, cfo_t->def_x_cap));
2595
2596
pr_debug("15.(%s) %-12s: ratio{nhm, clm}={%d, %d}\n",
2597
((comp & ODM_BB_ENV_MONITOR) ?
2598
((pause_comp & ODM_BB_ENV_MONITOR) ? "P" : "V") : "."),
2599
"EnvMntr",
2600
dm->dm_ccx_info.nhm_ratio, dm->dm_ccx_info.clm_ratio);
2601
2602
#ifdef PHYDM_PRIMARY_CCA
2603
pr_debug("16.(%s) %-12s: CCA @ (%s SB)\n",
2604
((comp & ODM_BB_PRIMARY_CCA) ?
2605
((pause_comp & ODM_BB_PRIMARY_CCA) ? "P" : "V") : "."),
2606
"PriCCA",
2607
((dm->dm_pri_cca.mf_state == MF_USC_LSC) ? "D" :
2608
((dm->dm_pri_cca.mf_state == MF_LSC) ? "L" : "U")));
2609
#endif
2610
#ifdef CONFIG_ADAPTIVE_SOML
2611
pr_debug("17.(%s) %-12s: soml_en = %s\n",
2612
((comp & ODM_BB_ADAPTIVE_SOML) ?
2613
((pause_comp & ODM_BB_ADAPTIVE_SOML) ? "P" : "V") : "."),
2614
"A-SOML",
2615
(dm->dm_soml_table.soml_last_state == SOML_ON) ?
2616
"ON" : "OFF");
2617
#endif
2618
#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
2619
pr_debug("18.(%s) %-12s:\n",
2620
((comp & ODM_BB_LNA_SAT_CHK) ?
2621
((pause_comp & ODM_BB_LNA_SAT_CHK) ? "P" : "V") : "."),
2622
"LNA_SAT_CHK");
2623
#endif
2624
}
2625
2626
void phydm_basic_dbg_message(void *dm_void)
2627
{
2628
struct dm_struct *dm = (struct dm_struct *)dm_void;
2629
struct phydm_fa_struct *fa_t = &dm->false_alm_cnt;
2630
#ifdef NHM_SUPPORT
2631
struct ccx_info *ccx = &dm->dm_ccx_info;
2632
u8 nhm_valid = 0;
2633
#endif
2634
2635
if (!(dm->debug_components & DBG_CMN))
2636
return;
2637
2638
2639
if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) {
2640
dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD;
2641
} else {
2642
dm->cmn_dbg_msg_cnt += PHYDM_WATCH_DOG_PERIOD;
2643
return;
2644
}
2645
2646
PHYDM_DBG(dm, DBG_CMN, "[%s] System up time: ((%d sec))---->\n",
2647
__func__, dm->phydm_sys_up_time);
2648
2649
if (dm->is_linked)
2650
phydm_basic_dbg_msg_linked(dm);
2651
else
2652
PHYDM_DBG(dm, DBG_CMN, "No Link !!!\n");
2653
2654
PHYDM_DBG(dm, DBG_CMN, "[CCA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2655
fa_t->cnt_cck_cca, fa_t->cnt_ofdm_cca, fa_t->cnt_cca_all);
2656
2657
PHYDM_DBG(dm, DBG_CMN, "[FA Cnt] {CCK, OFDM, Total} = {%d, %d, %d}\n",
2658
fa_t->cnt_cck_fail, fa_t->cnt_ofdm_fail, fa_t->cnt_all);
2659
2660
PHYDM_DBG(dm, DBG_CMN,
2661
"[OFDM FA Detail] Parity_Fail=%d, Rate_Illegal=%d, CRC8=%d, MCS_fail=%d, Fast_sync=%d, SB_Search_fail=%d\n",
2662
fa_t->cnt_parity_fail, fa_t->cnt_rate_illegal,
2663
fa_t->cnt_crc8_fail, fa_t->cnt_mcs_fail,
2664
fa_t->cnt_fast_fsync, fa_t->cnt_sb_search_fail);
2665
2666
#if (ODM_IC_11AC_SERIES_SUPPORT || defined(PHYDM_IC_JGR3_SERIES_SUPPORT))
2667
if (dm->support_ic_type & (ODM_IC_11AC_SERIES | ODM_IC_JGR3_SERIES)) {
2668
PHYDM_DBG(dm, DBG_CMN,
2669
"[OFDM FA Detail VHT] CRC8_VHT-SIGA=%d, CRC8_VHT-SIGB=%d, MCS_Fail_VHT=%d\n",
2670
fa_t->cnt_crc8_fail_vhta, fa_t->cnt_crc8_fail_vhtb,
2671
fa_t->cnt_mcs_fail_vht);
2672
}
2673
#endif
2674
PHYDM_DBG(dm, DBG_CMN,
2675
"is_linked = %d, Num_client = %d, rssi_min = %d, IGI = 0x%x, bNoisy=%d\n",
2676
dm->is_linked, dm->number_linked_client, dm->rssi_min,
2677
dm->dm_dig_table.cur_ig_value, dm->noisy_decision);
2678
2679
#ifdef NHM_SUPPORT
2680
if (dm->support_ability & ODM_BB_ENV_MONITOR) {
2681
nhm_valid = (ccx->nhm_noise_pwr_point * 100) >> 8;
2682
2683
PHYDM_DBG(dm, DBG_CMN,
2684
"[NHM] valid: %d percent, noise(RSSI) = %d, nhm_r[11](RSSI > %d)= %d\n\n",
2685
nhm_valid, ccx->nhm_noise_pwr,
2686
NTH_TH_2_RSSI(ccx->nhm_th[NHM_TH_NUM - 1]),
2687
ccx->nhm_result[NHM_RPT_NUM - 1]);
2688
}
2689
#endif
2690
}
2691
2692
void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
2693
{
2694
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
2695
struct dm_struct *dm = (struct dm_struct *)dm_void;
2696
char *cut = NULL;
2697
char *ic_type = NULL;
2698
u32 used = *_used;
2699
u32 out_len = *_out_len;
2700
u32 date = 0;
2701
char *commit_by = NULL;
2702
u32 release_ver = 0;
2703
2704
PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2705
"% Basic Profile %");
2706
2707
if (dm->support_ic_type == ODM_RTL8188E) {
2708
#if (RTL8188E_SUPPORT)
2709
ic_type = "RTL8188E";
2710
date = RELEASE_DATE_8188E;
2711
commit_by = COMMIT_BY_8188E;
2712
release_ver = RELEASE_VERSION_8188E;
2713
#endif
2714
#if (RTL8812A_SUPPORT)
2715
} else if (dm->support_ic_type == ODM_RTL8812) {
2716
ic_type = "RTL8812A";
2717
date = RELEASE_DATE_8812A;
2718
commit_by = COMMIT_BY_8812A;
2719
release_ver = RELEASE_VERSION_8812A;
2720
#endif
2721
#if (RTL8821A_SUPPORT)
2722
} else if (dm->support_ic_type == ODM_RTL8821) {
2723
ic_type = "RTL8821A";
2724
date = RELEASE_DATE_8821A;
2725
commit_by = COMMIT_BY_8821A;
2726
release_ver = RELEASE_VERSION_8821A;
2727
#endif
2728
#if (RTL8192E_SUPPORT)
2729
} else if (dm->support_ic_type == ODM_RTL8192E) {
2730
ic_type = "RTL8192E";
2731
date = RELEASE_DATE_8192E;
2732
commit_by = COMMIT_BY_8192E;
2733
release_ver = RELEASE_VERSION_8192E;
2734
#endif
2735
#if (RTL8723B_SUPPORT)
2736
} else if (dm->support_ic_type == ODM_RTL8723B) {
2737
ic_type = "RTL8723B";
2738
date = RELEASE_DATE_8723B;
2739
commit_by = COMMIT_BY_8723B;
2740
release_ver = RELEASE_VERSION_8723B;
2741
#endif
2742
#if (RTL8814A_SUPPORT)
2743
} else if (dm->support_ic_type == ODM_RTL8814A) {
2744
ic_type = "RTL8814A";
2745
date = RELEASE_DATE_8814A;
2746
commit_by = COMMIT_BY_8814A;
2747
release_ver = RELEASE_VERSION_8814A;
2748
#endif
2749
#if (RTL8881A_SUPPORT)
2750
} else if (dm->support_ic_type == ODM_RTL8881A) {
2751
ic_type = "RTL8881A";
2752
#endif
2753
#if (RTL8822B_SUPPORT)
2754
} else if (dm->support_ic_type == ODM_RTL8822B) {
2755
ic_type = "RTL8822B";
2756
date = RELEASE_DATE_8822B;
2757
commit_by = COMMIT_BY_8822B;
2758
release_ver = RELEASE_VERSION_8822B;
2759
#endif
2760
#if (RTL8197F_SUPPORT)
2761
} else if (dm->support_ic_type == ODM_RTL8197F) {
2762
ic_type = "RTL8197F";
2763
date = RELEASE_DATE_8197F;
2764
commit_by = COMMIT_BY_8197F;
2765
release_ver = RELEASE_VERSION_8197F;
2766
#endif
2767
#if (RTL8703B_SUPPORT)
2768
} else if (dm->support_ic_type == ODM_RTL8703B) {
2769
ic_type = "RTL8703B";
2770
date = RELEASE_DATE_8703B;
2771
commit_by = COMMIT_BY_8703B;
2772
release_ver = RELEASE_VERSION_8703B;
2773
#endif
2774
#if (RTL8195A_SUPPORT)
2775
} else if (dm->support_ic_type == ODM_RTL8195A) {
2776
ic_type = "RTL8195A";
2777
#endif
2778
#if (RTL8188F_SUPPORT)
2779
} else if (dm->support_ic_type == ODM_RTL8188F) {
2780
ic_type = "RTL8188F";
2781
date = RELEASE_DATE_8188F;
2782
commit_by = COMMIT_BY_8188F;
2783
release_ver = RELEASE_VERSION_8188F;
2784
#endif
2785
#if (RTL8723D_SUPPORT)
2786
} else if (dm->support_ic_type == ODM_RTL8723D) {
2787
ic_type = "RTL8723D";
2788
date = RELEASE_DATE_8723D;
2789
commit_by = COMMIT_BY_8723D;
2790
release_ver = RELEASE_VERSION_8723D;
2791
#endif
2792
}
2793
2794
/* @JJ ADD 20161014 */
2795
#if (RTL8710B_SUPPORT)
2796
else if (dm->support_ic_type == ODM_RTL8710B) {
2797
ic_type = "RTL8710B";
2798
date = RELEASE_DATE_8710B;
2799
commit_by = COMMIT_BY_8710B;
2800
release_ver = RELEASE_VERSION_8710B;
2801
}
2802
#endif
2803
2804
#if (RTL8721D_SUPPORT)
2805
else if (dm->support_ic_type == ODM_RTL8721D) {
2806
ic_type = "RTL8721D";
2807
date = RELEASE_DATE_8721D;
2808
commit_by = COMMIT_BY_8721D;
2809
release_ver = RELEASE_VERSION_8721D;
2810
}
2811
#endif
2812
2813
#if (RTL8710C_SUPPORT)
2814
else if (dm->support_ic_type == ODM_RTL8710C) {
2815
ic_type = "RTL8710C";
2816
date = RELEASE_DATE_8710C;
2817
commit_by = COMMIT_BY_8710C;
2818
release_ver = RELEASE_VERSION_8710C;
2819
}
2820
#endif
2821
2822
#if (RTL8821C_SUPPORT)
2823
else if (dm->support_ic_type == ODM_RTL8821C) {
2824
ic_type = "RTL8821C";
2825
date = RELEASE_DATE_8821C;
2826
commit_by = COMMIT_BY_8821C;
2827
release_ver = RELEASE_VERSION_8821C;
2828
}
2829
#endif
2830
2831
/*@jj add 20170822*/
2832
#if (RTL8192F_SUPPORT)
2833
else if (dm->support_ic_type == ODM_RTL8192F) {
2834
ic_type = "RTL8192F";
2835
date = RELEASE_DATE_8192F;
2836
commit_by = COMMIT_BY_8192F;
2837
release_ver = RELEASE_VERSION_8192F;
2838
}
2839
#endif
2840
2841
#if (RTL8198F_SUPPORT)
2842
else if (dm->support_ic_type == ODM_RTL8198F) {
2843
ic_type = "RTL8198F";
2844
date = RELEASE_DATE_8198F;
2845
commit_by = COMMIT_BY_8198F;
2846
release_ver = RELEASE_VERSION_8198F;
2847
}
2848
#endif
2849
2850
#if (RTL8822C_SUPPORT)
2851
else if (dm->support_ic_type == ODM_RTL8822C) {
2852
ic_type = "RTL8822C";
2853
date = RELEASE_DATE_8822C;
2854
commit_by = COMMIT_BY_8822C;
2855
release_ver = RELEASE_VERSION_8822C;
2856
}
2857
#endif
2858
2859
#if (RTL8812F_SUPPORT)
2860
else if (dm->support_ic_type == ODM_RTL8812F) {
2861
ic_type = "RTL8812F";
2862
date = RELEASE_DATE_8812F;
2863
commit_by = COMMIT_BY_8812F;
2864
release_ver = RELEASE_VERSION_8812F;
2865
}
2866
#endif
2867
2868
#if (RTL8197G_SUPPORT)
2869
else if (dm->support_ic_type == ODM_RTL8197G) {
2870
ic_type = "RTL8197G";
2871
date = RELEASE_DATE_8197G;
2872
commit_by = COMMIT_BY_8197G;
2873
release_ver = RELEASE_VERSION_8197G;
2874
}
2875
#endif
2876
2877
#if (RTL8814B_SUPPORT)
2878
else if (dm->support_ic_type == ODM_RTL8814B) {
2879
ic_type = "RTL8814B";
2880
date = RELEASE_DATE_8814B;
2881
commit_by = COMMIT_BY_8814B;
2882
release_ver = RELEASE_VERSION_8814B;
2883
}
2884
#endif
2885
2886
PDM_SNPF(out_len, used, output + used, out_len - used,
2887
" %-35s: %s (MP Chip: %s)\n", "IC type", ic_type,
2888
dm->is_mp_chip ? "Yes" : "No");
2889
2890
if (dm->cut_version == ODM_CUT_A)
2891
cut = "A";
2892
else if (dm->cut_version == ODM_CUT_B)
2893
cut = "B";
2894
else if (dm->cut_version == ODM_CUT_C)
2895
cut = "C";
2896
else if (dm->cut_version == ODM_CUT_D)
2897
cut = "D";
2898
else if (dm->cut_version == ODM_CUT_E)
2899
cut = "E";
2900
else if (dm->cut_version == ODM_CUT_F)
2901
cut = "F";
2902
else if (dm->cut_version == ODM_CUT_G)
2903
cut = "G";
2904
else if (dm->cut_version == ODM_CUT_H)
2905
cut = "H";
2906
else if (dm->cut_version == ODM_CUT_I)
2907
cut = "I";
2908
else if (dm->cut_version == ODM_CUT_J)
2909
cut = "J";
2910
else if (dm->cut_version == ODM_CUT_K)
2911
cut = "K";
2912
else if (dm->cut_version == ODM_CUT_L)
2913
cut = "L";
2914
else if (dm->cut_version == ODM_CUT_M)
2915
cut = "M";
2916
else if (dm->cut_version == ODM_CUT_N)
2917
cut = "N";
2918
else if (dm->cut_version == ODM_CUT_O)
2919
cut = "O";
2920
else if (dm->cut_version == ODM_CUT_TEST)
2921
cut = "TEST";
2922
else
2923
cut = "UNKNOWN";
2924
2925
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2926
"RFE type", dm->rfe_type);
2927
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2928
"Cut Ver", cut);
2929
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2930
"PHY Para Ver", odm_get_hw_img_version(dm));
2931
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2932
"PHY Para Commit date", date);
2933
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2934
"PHY Para Commit by", commit_by);
2935
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
2936
"PHY Para Release Ver", release_ver);
2937
2938
PDM_SNPF(out_len, used, output + used, out_len - used,
2939
" %-35s: %d (Subversion: %d)\n", "FW Ver", dm->fw_version,
2940
dm->fw_sub_version);
2941
2942
/* @1 PHY DM version List */
2943
PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
2944
"% PHYDM version %");
2945
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2946
"Code base", PHYDM_CODE_BASE);
2947
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2948
"Release Date", PHYDM_RELEASE_DATE);
2949
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2950
"Adaptivity", ADAPTIVITY_VERSION);
2951
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2952
"DIG", DIG_VERSION);
2953
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2954
"CFO Tracking", CFO_TRACKING_VERSION);
2955
#ifdef CONFIG_PHYDM_ANTENNA_DIVERSITY
2956
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2957
"AntDiv", ANTDIV_VERSION);
2958
#endif
2959
#ifdef CONFIG_DYNAMIC_TX_TWR
2960
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2961
"Dynamic TxPower", DYNAMIC_TXPWR_VERSION);
2962
#endif
2963
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2964
"RA Info", RAINFO_VERSION);
2965
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
2966
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2967
"AntDetect", ANTDECT_VERSION);
2968
#endif
2969
#ifdef CONFIG_PATH_DIVERSITY
2970
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2971
"PathDiv", PATHDIV_VERSION);
2972
#endif
2973
#ifdef CONFIG_ADAPTIVE_SOML
2974
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2975
"Adaptive SOML", ADAPTIVE_SOML_VERSION);
2976
#endif
2977
#if (PHYDM_LA_MODE_SUPPORT)
2978
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2979
"LA mode", DYNAMIC_LA_MODE);
2980
#endif
2981
#ifdef PHYDM_PRIMARY_CCA
2982
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2983
"Primary CCA", PRIMARYCCA_VERSION);
2984
#endif
2985
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
2986
"DFS", DFS_VERSION);
2987
2988
#if (RTL8822B_SUPPORT)
2989
if (dm->support_ic_type & ODM_RTL8822B)
2990
PDM_SNPF(out_len, used, output + used, out_len - used,
2991
" %-35s: %s\n", "PHY config 8822B",
2992
PHY_CONFIG_VERSION_8822B);
2993
2994
#endif
2995
#if (RTL8197F_SUPPORT)
2996
if (dm->support_ic_type & ODM_RTL8197F)
2997
PDM_SNPF(out_len, used, output + used, out_len - used,
2998
" %-35s: %s\n", "PHY config 8197F",
2999
PHY_CONFIG_VERSION_8197F);
3000
#endif
3001
3002
/*@jj add 20170822*/
3003
#if (RTL8192F_SUPPORT)
3004
if (dm->support_ic_type & ODM_RTL8192F)
3005
PDM_SNPF(out_len, used, output + used, out_len - used,
3006
" %-35s: %s\n", "PHY config 8192F",
3007
PHY_CONFIG_VERSION_8192F);
3008
#endif
3009
#if (RTL8721D_SUPPORT)
3010
if (dm->support_ic_type & ODM_RTL8721D)
3011
PDM_SNPF(out_len, used, output + used, out_len - used,
3012
" %-35s: %s\n", "PHY config 8721D",
3013
PHY_CONFIG_VERSION_8721D);
3014
#endif
3015
3016
#if (RTL8710C_SUPPORT)
3017
if (dm->support_ic_type & ODM_RTL8710C)
3018
PDM_SNPF(out_len, used, output + used, out_len - used,
3019
" %-35s: %s\n", "PHY config 8710C",
3020
PHY_CONFIG_VERSION_8710C);
3021
#endif
3022
3023
*_used = used;
3024
*_out_len = out_len;
3025
3026
#endif /*@#if CONFIG_PHYDM_DEBUG_FUNCTION*/
3027
}
3028
3029
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
3030
void phydm_fw_trace_en_h2c(void *dm_void, boolean enable,
3031
u32 fw_dbg_comp, u32 monitor_mode, u32 macid)
3032
{
3033
struct dm_struct *dm = (struct dm_struct *)dm_void;
3034
u8 h2c_parameter[7] = {0};
3035
u8 cmd_length;
3036
3037
if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
3038
h2c_parameter[0] = enable;
3039
h2c_parameter[1] = (u8)(fw_dbg_comp & MASKBYTE0);
3040
h2c_parameter[2] = (u8)((fw_dbg_comp & MASKBYTE1) >> 8);
3041
h2c_parameter[3] = (u8)((fw_dbg_comp & MASKBYTE2) >> 16);
3042
h2c_parameter[4] = (u8)((fw_dbg_comp & MASKBYTE3) >> 24);
3043
h2c_parameter[5] = (u8)monitor_mode;
3044
h2c_parameter[6] = (u8)macid;
3045
cmd_length = 7;
3046
3047
} else {
3048
h2c_parameter[0] = enable;
3049
h2c_parameter[1] = (u8)monitor_mode;
3050
h2c_parameter[2] = (u8)macid;
3051
cmd_length = 3;
3052
}
3053
3054
PHYDM_DBG(dm, DBG_FW_TRACE,
3055
"[H2C] FW_debug_en: (( %d )), mode: (( %d )), macid: (( %d ))\n",
3056
enable, monitor_mode, macid);
3057
3058
odm_fill_h2c_cmd(dm, PHYDM_H2C_FW_TRACE_EN, cmd_length, h2c_parameter);
3059
}
3060
3061
void phydm_get_per_path_txagc(void *dm_void, u8 path, u32 *_used, char *output,
3062
u32 *_out_len)
3063
{
3064
struct dm_struct *dm = (struct dm_struct *)dm_void;
3065
u8 rate_idx = 0;
3066
u8 txagc = 0;
3067
u32 used = *_used;
3068
u32 out_len = *_out_len;
3069
3070
#ifdef PHYDM_COMMON_API_SUPPORT
3071
if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3072
return;
3073
3074
if (dm->num_rf_path == 1 && path > RF_PATH_A)
3075
return;
3076
else if (dm->num_rf_path == 2 && path > RF_PATH_B)
3077
return;
3078
else if (dm->num_rf_path == 3 && path > RF_PATH_C)
3079
return;
3080
else if (dm->num_rf_path == 4 && path > RF_PATH_D)
3081
return;
3082
3083
for (rate_idx = 0; rate_idx <= 0x53; rate_idx++) {
3084
if (!(dm->support_ic_type & PHYDM_IC_ABOVE_3SS) &&
3085
((rate_idx >= ODM_RATEMCS16 &&
3086
rate_idx < ODM_RATEVHTSS1MCS0) ||
3087
rate_idx >= ODM_RATEVHTSS3MCS0))
3088
continue;
3089
3090
if (rate_idx == ODM_RATE1M)
3091
PDM_SNPF(out_len, used, output + used, out_len - used,
3092
" %-35s\n", "CCK====>");
3093
else if (rate_idx == ODM_RATE6M)
3094
PDM_SNPF(out_len, used, output + used, out_len - used,
3095
"\n %-35s\n", "OFDM====>");
3096
else if (rate_idx == ODM_RATEMCS0)
3097
PDM_SNPF(out_len, used, output + used, out_len - used,
3098
"\n %-35s\n", "HT 1ss====>");
3099
else if (rate_idx == ODM_RATEMCS8)
3100
PDM_SNPF(out_len, used, output + used, out_len - used,
3101
"\n %-35s\n", "HT 2ss====>");
3102
else if (rate_idx == ODM_RATEMCS16)
3103
PDM_SNPF(out_len, used, output + used, out_len - used,
3104
"\n %-35s\n", "HT 3ss====>");
3105
else if (rate_idx == ODM_RATEMCS24)
3106
PDM_SNPF(out_len, used, output + used, out_len - used,
3107
"\n %-35s\n", "HT 4ss====>");
3108
else if (rate_idx == ODM_RATEVHTSS1MCS0)
3109
PDM_SNPF(out_len, used, output + used, out_len - used,
3110
"\n %-35s\n", "VHT 1ss====>");
3111
else if (rate_idx == ODM_RATEVHTSS2MCS0)
3112
PDM_SNPF(out_len, used, output + used, out_len - used,
3113
"\n %-35s\n", "VHT 2ss====>");
3114
else if (rate_idx == ODM_RATEVHTSS3MCS0)
3115
PDM_SNPF(out_len, used, output + used, out_len - used,
3116
"\n %-35s\n", "VHT 3ss====>");
3117
else if (rate_idx == ODM_RATEVHTSS4MCS0)
3118
PDM_SNPF(out_len, used, output + used, out_len - used,
3119
"\n %-35s\n", "VHT 4ss====>");
3120
3121
txagc = phydm_api_get_txagc(dm, (enum rf_path)path, rate_idx);
3122
if (config_phydm_read_txagc_check(txagc))
3123
PDM_SNPF(out_len, used, output + used,
3124
out_len - used, " 0x%02x ", txagc);
3125
else
3126
PDM_SNPF(out_len, used, output + used,
3127
out_len - used, " 0x%s ", "xx");
3128
}
3129
#endif
3130
3131
*_used = used;
3132
*_out_len = out_len;
3133
}
3134
3135
void phydm_get_txagc(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3136
{
3137
struct dm_struct *dm = (struct dm_struct *)dm_void;
3138
u32 used = *_used;
3139
u32 out_len = *_out_len;
3140
u8 i = 0;
3141
3142
#if (RTL8822C_SUPPORT)
3143
PDM_SNPF(out_len, used, output + used,
3144
out_len - used, "Disabled DPD rate mask: 0x%x\n",
3145
dm->dis_dpd_rate);
3146
#endif
3147
3148
for (i = RF_PATH_A; i < dm->num_rf_path; i++) {
3149
if (i == RF_PATH_A)
3150
PDM_SNPF(out_len, used, output + used, out_len - used,
3151
"%-35s\n", "path-A====================");
3152
else if (i == RF_PATH_B)
3153
PDM_SNPF(out_len, used, output + used, out_len - used,
3154
"\n%-35s\n", "path-B====================");
3155
else if (i == RF_PATH_C)
3156
PDM_SNPF(out_len, used, output + used, out_len - used,
3157
"\n%-35s\n", "path-C====================");
3158
else if (i == RF_PATH_D)
3159
PDM_SNPF(out_len, used, output + used, out_len - used,
3160
"\n%-35s\n", "path-D====================");
3161
3162
phydm_get_per_path_txagc(dm, i, &used, output, &out_len);
3163
}
3164
*_used = used;
3165
*_out_len = out_len;
3166
}
3167
3168
void phydm_set_txagc(void *dm_void, u32 *const val, u32 *_used,
3169
char *output, u32 *_out_len)
3170
{
3171
struct dm_struct *dm = (struct dm_struct *)dm_void;
3172
u32 used = *_used;
3173
u32 out_len = *_out_len;
3174
u8 i = 0;
3175
u32 pow = 0; /*power index*/
3176
u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3177
boolean rpt = true;
3178
enum rf_path path = RF_PATH_A;
3179
3180
/*@val[1] = path*/
3181
/*@val[2] = hw_rate*/
3182
/*@val[3] = power_index*/
3183
3184
#ifdef PHYDM_COMMON_API_SUPPORT
3185
if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3186
return;
3187
3188
path = (enum rf_path)val[1];
3189
3190
if (val[1] >= dm->num_rf_path) {
3191
PDM_SNPF(out_len, used, output + used, out_len - used,
3192
"Write path-%d rate_idx-0x%x fail\n", val[1], val[2]);
3193
} else if ((u8)val[2] != 0xff) {
3194
if (phydm_api_set_txagc(dm, val[3], path, (u8)val[2], true))
3195
PDM_SNPF(out_len, used, output + used, out_len - used,
3196
"Write path-%d rate_idx-0x%x = 0x%x\n",
3197
val[1], val[2], val[3]);
3198
else
3199
PDM_SNPF(out_len, used, output + used, out_len - used,
3200
"Write path-%d rate index-0x%x fail\n",
3201
val[1], val[2]);
3202
} else {
3203
3204
if (dm->support_ic_type &
3205
(ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8195B)) {
3206
pow = (val[3] & 0x3f);
3207
pow = BYTE_DUPLICATE_2_DWORD(pow);
3208
3209
for (i = 0; i < ODM_RATEVHTSS2MCS9; i += 4)
3210
rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3211
} else if (dm->support_ic_type &
3212
(ODM_RTL8197F | ODM_RTL8192F)) {
3213
pow = (val[3] & 0x3f);
3214
for (i = 0; i <= ODM_RATEMCS15; i++)
3215
rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3216
} else if (dm->support_ic_type & ODM_RTL8198F) {
3217
pow = (val[3] & 0x7f);
3218
for (i = 0; i <= ODM_RATEVHTSS4MCS9; i++)
3219
rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3220
} else if (dm->support_ic_type &
3221
(ODM_RTL8822C | ODM_RTL8812F | ODM_RTL8197G)) {
3222
pow = (val[3] & 0x7f);
3223
for (i = 0; i <= ODM_RATEMCS15; i++)
3224
rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3225
for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++)
3226
rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3227
} else if (dm->support_ic_type &
3228
(ODM_RTL8721D | ODM_RTL8710C)) {
3229
pow = (val[3] & 0x3f);
3230
for (i = 0; i <= ODM_RATEMCS7; i++)
3231
rpt &= phydm_api_set_txagc(dm, pow, path, i, 0);
3232
}
3233
3234
if (rpt)
3235
PDM_SNPF(out_len, used, output + used, out_len - used,
3236
"Write all TXAGC of path-%d = 0x%x\n",
3237
val[1], val[3]);
3238
else
3239
PDM_SNPF(out_len, used, output + used, out_len - used,
3240
"Write all TXAGC of path-%d fail\n", val[1]);
3241
}
3242
3243
#endif
3244
*_used = used;
3245
*_out_len = out_len;
3246
}
3247
3248
void phydm_shift_txagc(void *dm_void, u32 *const val, u32 *_used, char *output,
3249
u32 *_out_len)
3250
{
3251
struct dm_struct *dm = (struct dm_struct *)dm_void;
3252
u32 used = *_used;
3253
u32 out_len = *_out_len;
3254
u8 i = 0;
3255
u32 pow = 0; /*Power index*/
3256
boolean rpt = true;
3257
u8 vht_start_rate = ODM_RATEVHTSS1MCS0;
3258
enum rf_path path = RF_PATH_A;
3259
3260
#ifdef PHYDM_COMMON_API_SUPPORT
3261
if (!(dm->support_ic_type & CMN_API_SUPPORT_IC))
3262
return;
3263
3264
if (val[1] >= dm->num_rf_path) {
3265
PDM_SNPF(out_len, used, output + used, out_len - used,
3266
"Write path-%d fail\n", val[1]);
3267
return;
3268
}
3269
3270
path = (enum rf_path)val[1];
3271
3272
if ((u8)val[2] == 0) {
3273
/*@{0:-, 1:+} {Pwr Offset}*/
3274
if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3275
for (i = 0; i <= ODM_RATEMCS7; i++) {
3276
pow = phydm_api_get_txagc(dm, path, i) - val[3];
3277
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3278
}
3279
for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3280
pow = phydm_api_get_txagc(dm, path, i) - val[3];
3281
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3282
}
3283
} else if (dm->support_ic_type & (ODM_RTL8822B)) {
3284
for (i = 0; i <= ODM_RATEMCS15; i++) {
3285
pow = phydm_api_get_txagc(dm, path, i) - val[3];
3286
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3287
}
3288
for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3289
pow = phydm_api_get_txagc(dm, path, i) - val[3];
3290
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3291
}
3292
} else if (dm->support_ic_type &
3293
(ODM_RTL8197F | ODM_RTL8192F)) {
3294
for (i = 0; i <= ODM_RATEMCS15; i++) {
3295
pow = phydm_api_get_txagc(dm, path, i) - val[3];
3296
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3297
}
3298
} else if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3299
rpt &= phydm_api_shift_txagc(dm, val[3], path, 0);
3300
} else if (dm->support_ic_type &
3301
(ODM_RTL8721D | ODM_RTL8710C)) {
3302
for (i = 0; i <= ODM_RATEMCS7; i++) {
3303
pow = phydm_api_get_txagc(dm, path, i) - val[3];
3304
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3305
}
3306
}
3307
} else if ((u8)val[2] == 1) {
3308
/*@{0:-, 1:+} {Pwr Offset}*/
3309
if (dm->support_ic_type & (ODM_RTL8195B | ODM_RTL8821C)) {
3310
for (i = 0; i <= ODM_RATEMCS7; i++) {
3311
pow = phydm_api_get_txagc(dm, path, i) + val[3];
3312
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3313
}
3314
for (i = vht_start_rate; i <= ODM_RATEVHTSS1MCS9; i++) {
3315
pow = phydm_api_get_txagc(dm, path, i) + val[3];
3316
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3317
}
3318
} else if (dm->support_ic_type & (ODM_RTL8822B)) {
3319
for (i = 0; i <= ODM_RATEMCS15; i++) {
3320
pow = phydm_api_get_txagc(dm, path, i) + val[3];
3321
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3322
}
3323
for (i = vht_start_rate; i <= ODM_RATEVHTSS2MCS9; i++) {
3324
pow = phydm_api_get_txagc(dm, path, i) + val[3];
3325
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3326
}
3327
} else if (dm->support_ic_type &
3328
(ODM_RTL8197F | ODM_RTL8192F)) {
3329
for (i = 0; i <= ODM_RATEMCS15; i++) {
3330
pow = phydm_api_get_txagc(dm, path, i) + val[3];
3331
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3332
}
3333
} else if (dm->support_ic_type & (ODM_RTL8721D |
3334
ODM_RTL8710C)) {
3335
for (i = 0; i <= ODM_RATEMCS7; i++) {
3336
pow = phydm_api_get_txagc(dm, path, i) + val[3];
3337
rpt &= phydm_api_set_txagc(dm, pow, path, i, 1);
3338
}
3339
} else if (dm->support_ic_type &
3340
(ODM_RTL8822C | ODM_RTL8814B |
3341
ODM_RTL8812F | ODM_RTL8197G)) {
3342
rpt &= phydm_api_shift_txagc(dm, val[3], path, 1);
3343
}
3344
}
3345
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3346
if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
3347
PDM_SNPF(out_len, used, output + used, out_len - used,
3348
"[All rate] Set Path-%d Pow_idx: %s %d\n",
3349
val[1], (val[2] ? "+" : "-"), val[3]);
3350
else
3351
#endif
3352
PDM_SNPF(out_len, used, output + used, out_len - used,
3353
"[All rate] Set Path-%d Pow_idx: %s %d(%d.%s dB)\n",
3354
val[1], (val[2] ? "+" : "-"), val[3], val[3] >> 1,
3355
((val[3] & 1) ? "5" : "0"));
3356
3357
#endif
3358
*_used = used;
3359
*_out_len = out_len;
3360
}
3361
3362
void phydm_set_txagc_dbg(void *dm_void, char input[][16], u32 *_used,
3363
char *output, u32 *_out_len)
3364
{
3365
struct dm_struct *dm = (struct dm_struct *)dm_void;
3366
u32 used = *_used;
3367
u32 out_len = *_out_len;
3368
u32 var1[10] = {0};
3369
char help[] = "-h";
3370
u8 i = 0, input_idx = 0;
3371
3372
for (i = 0; i < 5; i++) {
3373
if (input[i + 1]) {
3374
PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
3375
input_idx++;
3376
}
3377
}
3378
3379
if ((strcmp(input[1], help) == 0)) {
3380
PDM_SNPF(out_len, used, output + used, out_len - used,
3381
"{Dis:0, En:1} {pathA~D(0~3)} {rate_idx(Hex), All_rate:0xff} {txagc_idx (Hex)}\n");
3382
PDM_SNPF(out_len, used, output + used, out_len - used,
3383
"{Pwr Shift(All rate):2} {pathA~D(0~3)} {0:-, 1:+} {Pwr Offset(Hex)}\n");
3384
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3385
PDM_SNPF(out_len, used, output + used, out_len - used,
3386
"{reset all rate ref/diff to 0x0:0xff}\n");
3387
#endif
3388
} else if (var1[0] == 0) {
3389
dm->is_disable_phy_api = false;
3390
PDM_SNPF(out_len, used, output + used, out_len - used,
3391
"Disable API debug mode\n");
3392
} else if (var1[0] == 1) {
3393
dm->is_disable_phy_api = false;
3394
#ifdef CONFIG_TXAGC_DEBUG_8822C
3395
config_phydm_write_txagc_8822c(dm, var1[3],
3396
(enum rf_path)var1[1],
3397
(u8)var1[2]);
3398
#elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3399
config_phydm_write_txagc_8814b(dm, var1[3],
3400
(enum rf_path)var1[1],
3401
(u8)var1[2]);
3402
#else
3403
phydm_set_txagc(dm, (u32 *)var1, &used, output, &out_len);
3404
#endif
3405
dm->is_disable_phy_api = true;
3406
} else if (var1[0] == 2) {
3407
PHYDM_SSCANF(input[4], DCMD_HEX, &var1[3]);
3408
dm->is_disable_phy_api = false;
3409
phydm_shift_txagc(dm, (u32 *)var1, &used, output, &out_len);
3410
dm->is_disable_phy_api = true;
3411
}
3412
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3413
else if (var1[0] == 0xff) {
3414
dm->is_disable_phy_api = false;
3415
phydm_reset_txagc(dm);
3416
dm->is_disable_phy_api = true;
3417
}
3418
#endif
3419
#ifdef CONFIG_TXAGC_DEBUG_8822C
3420
else if (var1[0] == 3) {
3421
dm->is_disable_phy_api = false;
3422
phydm_txagc_tab_buff_show_8822c(dm);
3423
dm->is_disable_phy_api = true;
3424
} else if (var1[0] == 4) {
3425
dm->is_disable_phy_api = false;
3426
config_phydm_set_txagc_to_hw_8822c(dm);
3427
dm->is_disable_phy_api = true;
3428
}
3429
#elif (defined(CONFIG_TXAGC_DEBUG_8814B))
3430
else if (var1[0] == 3) {
3431
dm->is_disable_phy_api = false;
3432
phydm_txagc_tab_buff_show_8814b(dm);
3433
dm->is_disable_phy_api = true;
3434
} else if (var1[0] == 4) {
3435
dm->is_disable_phy_api = false;
3436
config_phydm_set_txagc_to_hw_8814b(dm);
3437
dm->is_disable_phy_api = true;
3438
}
3439
#endif
3440
3441
*_used = used;
3442
*_out_len = out_len;
3443
}
3444
3445
void phydm_debug_trace(void *dm_void, char input[][16], u32 *_used,
3446
char *output, u32 *_out_len)
3447
{
3448
struct dm_struct *dm = (struct dm_struct *)dm_void;
3449
u64 pre_debug_components, one = 1;
3450
u64 comp = 0;
3451
u32 used = *_used;
3452
u32 out_len = *_out_len;
3453
u32 val[10] = {0};
3454
u8 i = 0;
3455
3456
for (i = 0; i < 5; i++) {
3457
if (input[i + 1])
3458
PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3459
}
3460
comp = dm->debug_components;
3461
pre_debug_components = dm->debug_components;
3462
3463
PDM_SNPF(out_len, used, output + used, out_len - used,
3464
"\n================================\n");
3465
if (val[0] == 100) {
3466
PDM_SNPF(out_len, used, output + used, out_len - used,
3467
"[DBG MSG] Component Selection\n");
3468
PDM_SNPF(out_len, used, output + used, out_len - used,
3469
"================================\n");
3470
PDM_SNPF(out_len, used, output + used, out_len - used,
3471
"00. (( %s ))DIG\n",
3472
((comp & DBG_DIG) ? ("V") : (".")));
3473
PDM_SNPF(out_len, used, output + used, out_len - used,
3474
"01. (( %s ))RA_MASK\n",
3475
((comp & DBG_RA_MASK) ? ("V") : (".")));
3476
PDM_SNPF(out_len, used, output + used, out_len - used,
3477
"02. (( %s ))DYN_TXPWR\n",
3478
((comp & DBG_DYN_TXPWR) ? ("V") : (".")));
3479
PDM_SNPF(out_len, used, output + used, out_len - used,
3480
"03. (( %s ))FA_CNT\n",
3481
((comp & DBG_FA_CNT) ? ("V") : (".")));
3482
PDM_SNPF(out_len, used, output + used, out_len - used,
3483
"04. (( %s ))RSSI_MNTR\n",
3484
((comp & DBG_RSSI_MNTR) ? ("V") : (".")));
3485
PDM_SNPF(out_len, used, output + used, out_len - used,
3486
"05. (( %s ))CCKPD\n",
3487
((comp & DBG_CCKPD) ? ("V") : (".")));
3488
PDM_SNPF(out_len, used, output + used, out_len - used,
3489
"06. (( %s ))ANT_DIV\n",
3490
((comp & DBG_ANT_DIV) ? ("V") : (".")));
3491
PDM_SNPF(out_len, used, output + used, out_len - used,
3492
"07. (( %s ))SMT_ANT\n",
3493
((comp & DBG_SMT_ANT) ? ("V") : (".")));
3494
PDM_SNPF(out_len, used, output + used, out_len - used,
3495
"08. (( %s ))PWR_TRAIN\n",
3496
((comp & DBG_PWR_TRAIN) ? ("V") : (".")));
3497
PDM_SNPF(out_len, used, output + used, out_len - used,
3498
"09. (( %s ))RA\n",
3499
((comp & DBG_RA) ? ("V") : (".")));
3500
PDM_SNPF(out_len, used, output + used, out_len - used,
3501
"10. (( %s ))PATH_DIV\n",
3502
((comp & DBG_PATH_DIV) ? ("V") : (".")));
3503
PDM_SNPF(out_len, used, output + used, out_len - used,
3504
"11. (( %s ))DFS\n",
3505
((comp & DBG_DFS) ? ("V") : (".")));
3506
PDM_SNPF(out_len, used, output + used, out_len - used,
3507
"12. (( %s ))DYN_ARFR\n",
3508
((comp & DBG_DYN_ARFR) ? ("V") : (".")));
3509
PDM_SNPF(out_len, used, output + used, out_len - used,
3510
"13. (( %s ))ADAPTIVITY\n",
3511
((comp & DBG_ADPTVTY) ? ("V") : (".")));
3512
PDM_SNPF(out_len, used, output + used, out_len - used,
3513
"14. (( %s ))CFO_TRK\n",
3514
((comp & DBG_CFO_TRK) ? ("V") : (".")));
3515
PDM_SNPF(out_len, used, output + used, out_len - used,
3516
"15. (( %s ))ENV_MNTR\n",
3517
((comp & DBG_ENV_MNTR) ? ("V") : (".")));
3518
PDM_SNPF(out_len, used, output + used, out_len - used,
3519
"16. (( %s ))PRI_CCA\n",
3520
((comp & DBG_PRI_CCA) ? ("V") : (".")));
3521
PDM_SNPF(out_len, used, output + used, out_len - used,
3522
"17. (( %s ))ADPTV_SOML\n",
3523
((comp & DBG_ADPTV_SOML) ? ("V") : (".")));
3524
PDM_SNPF(out_len, used, output + used, out_len - used,
3525
"18. (( %s ))LNA_SAT_CHK\n",
3526
((comp & DBG_LNA_SAT_CHK) ? ("V") : (".")));
3527
PDM_SNPF(out_len, used, output + used, out_len - used,
3528
"20. (( %s ))PHY_STATUS\n",
3529
((comp & DBG_PHY_STATUS) ? ("V") : (".")));
3530
PDM_SNPF(out_len, used, output + used, out_len - used,
3531
"21. (( %s ))TMP\n",
3532
((comp & DBG_TMP) ? ("V") : (".")));
3533
PDM_SNPF(out_len, used, output + used, out_len - used,
3534
"22. (( %s ))FW_DBG_TRACE\n",
3535
((comp & DBG_FW_TRACE) ? ("V") : (".")));
3536
PDM_SNPF(out_len, used, output + used, out_len - used,
3537
"23. (( %s ))TXBF\n",
3538
((comp & DBG_TXBF) ? ("V") : (".")));
3539
PDM_SNPF(out_len, used, output + used, out_len - used,
3540
"24. (( %s ))COMMON_FLOW\n",
3541
((comp & DBG_COMMON_FLOW) ? ("V") : (".")));
3542
PDM_SNPF(out_len, used, output + used, out_len - used,
3543
"28. (( %s ))PHY_CONFIG\n",
3544
((comp & ODM_PHY_CONFIG) ? ("V") : (".")));
3545
PDM_SNPF(out_len, used, output + used, out_len - used,
3546
"29. (( %s ))INIT\n",
3547
((comp & ODM_COMP_INIT) ? ("V") : (".")));
3548
PDM_SNPF(out_len, used, output + used, out_len - used,
3549
"30. (( %s ))COMMON\n",
3550
((comp & DBG_CMN) ? ("V") : (".")));
3551
PDM_SNPF(out_len, used, output + used, out_len - used,
3552
"31. (( %s ))API\n",
3553
((comp & ODM_COMP_API) ? ("V") : (".")));
3554
PDM_SNPF(out_len, used, output + used, out_len - used,
3555
"================================\n");
3556
3557
} else if (val[0] == 101) {
3558
dm->debug_components = 0;
3559
PDM_SNPF(out_len, used, output + used, out_len - used,
3560
"Disable all debug components\n");
3561
} else {
3562
if (val[1] == 1) /*@enable*/
3563
dm->debug_components |= (one << val[0]);
3564
else if (val[1] == 2) /*@disable*/
3565
dm->debug_components &= ~(one << val[0]);
3566
else
3567
PDM_SNPF(out_len, used, output + used, out_len - used,
3568
"[Warning] 1:on, 2:off\n");
3569
3570
if ((BIT(val[0]) == DBG_PHY_STATUS) && val[1] == 1) {
3571
dm->phy_dbg_info.show_phy_sts_all_pkt = (u8)val[2];
3572
dm->phy_dbg_info.show_phy_sts_max_cnt = (u16)val[3];
3573
3574
PDM_SNPF(out_len, used, output + used, out_len - used,
3575
"show_all_pkt=%d, show_max_num=%d\n\n",
3576
dm->phy_dbg_info.show_phy_sts_all_pkt,
3577
dm->phy_dbg_info.show_phy_sts_max_cnt);
3578
3579
} else if ((BIT(val[0]) == DBG_CMN) && (val[1] == 1)) {
3580
dm->cmn_dbg_msg_period = (u8)val[2];
3581
3582
if (dm->cmn_dbg_msg_period < PHYDM_WATCH_DOG_PERIOD)
3583
dm->cmn_dbg_msg_period = PHYDM_WATCH_DOG_PERIOD;
3584
3585
PDM_SNPF(out_len, used, output + used, out_len - used,
3586
"cmn_dbg_msg_period=%d\n",
3587
dm->cmn_dbg_msg_period);
3588
}
3589
}
3590
PDM_SNPF(out_len, used, output + used, out_len - used,
3591
"pre-DbgComponents = 0x%llx\n", pre_debug_components);
3592
PDM_SNPF(out_len, used, output + used, out_len - used,
3593
"Curr-DbgComponents = 0x%llx\n", dm->debug_components);
3594
PDM_SNPF(out_len, used, output + used, out_len - used,
3595
"================================\n");
3596
3597
*_used = used;
3598
*_out_len = out_len;
3599
}
3600
3601
void phydm_fw_debug_trace(void *dm_void, char input[][16], u32 *_used,
3602
char *output, u32 *_out_len)
3603
{
3604
struct dm_struct *dm = (struct dm_struct *)dm_void;
3605
u32 used = *_used;
3606
u32 out_len = *_out_len;
3607
u32 val[10] = {0};
3608
u8 i, input_idx = 0;
3609
char help[] = "-h";
3610
u32 pre_fw_debug_components = 0, one = 1;
3611
u32 comp = 0;
3612
3613
for (i = 0; i < 5; i++) {
3614
if (input[i + 1]) {
3615
PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
3616
input_idx++;
3617
}
3618
}
3619
3620
if (input_idx == 0)
3621
return;
3622
3623
pre_fw_debug_components = dm->fw_debug_components;
3624
comp = dm->fw_debug_components;
3625
3626
if ((strcmp(input[1], help) == 0)) {
3627
PDM_SNPF(out_len, used, output + used, out_len - used,
3628
"{dbg_comp} {1:en, 2:dis} {mode} {macid}\n");
3629
} else {
3630
if (val[0] == 101) {
3631
dm->fw_debug_components = 0;
3632
PDM_SNPF(out_len, used, output + used, out_len - used,
3633
"%s\n", "Clear all fw debug components");
3634
} else {
3635
if (val[1] == 1) /*@enable*/
3636
dm->fw_debug_components |= (one << val[0]);
3637
else if (val[1] == 2) /*@disable*/
3638
dm->fw_debug_components &= ~(one << val[0]);
3639
else
3640
PDM_SNPF(out_len, used, output + used,
3641
out_len - used, "%s\n",
3642
"[Warning!!!] 1:enable, 2:disable");
3643
}
3644
3645
comp = dm->fw_debug_components;
3646
3647
if (comp == 0) {
3648
dm->debug_components &= ~DBG_FW_TRACE;
3649
/*@H2C to enable C2H Msg*/
3650
phydm_fw_trace_en_h2c(dm, false, comp, val[2], val[3]);
3651
} else {
3652
dm->debug_components |= DBG_FW_TRACE;
3653
/*@H2C to enable C2H Msg*/
3654
phydm_fw_trace_en_h2c(dm, true, comp, val[2], val[3]);
3655
}
3656
}
3657
}
3658
3659
#if (ODM_IC_11N_SERIES_SUPPORT)
3660
void phydm_dump_bb_reg_n(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3661
{
3662
struct dm_struct *dm = (struct dm_struct *)dm_void;
3663
u32 addr = 0;
3664
u32 used = *_used;
3665
u32 out_len = *_out_len;
3666
3667
/*@For Nseries IC we only need to dump page8 to pageF using 3 digits*/
3668
for (addr = 0x800; addr < 0xfff; addr += 4) {
3669
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3670
"0x%03x 0x%08x\n",
3671
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3672
}
3673
3674
*_used = used;
3675
*_out_len = out_len;
3676
}
3677
#endif
3678
3679
#if (ODM_IC_11AC_SERIES_SUPPORT)
3680
void phydm_dump_bb_reg_ac(void *dm_void, u32 *_used, char *output,
3681
u32 *_out_len)
3682
{
3683
struct dm_struct *dm = (struct dm_struct *)dm_void;
3684
u32 addr = 0;
3685
u32 used = *_used;
3686
u32 out_len = *_out_len;
3687
3688
for (addr = 0x800; addr < 0xfff; addr += 4) {
3689
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3690
"0x%04x 0x%08x\n",
3691
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3692
}
3693
3694
if (!(dm->support_ic_type &
3695
(ODM_RTL8822B | ODM_RTL8814A | ODM_RTL8821C)))
3696
goto rpt_reg;
3697
3698
if (dm->rf_type > RF_2T2R) {
3699
for (addr = 0x1800; addr < 0x18ff; addr += 4)
3700
PDM_VAST_SNPF(out_len, used, output + used,
3701
out_len - used, "0x%04x 0x%08x\n",
3702
addr,
3703
odm_get_bb_reg(dm, addr, MASKDWORD));
3704
}
3705
3706
if (dm->rf_type > RF_3T3R) {
3707
for (addr = 0x1a00; addr < 0x1aff; addr += 4)
3708
PDM_VAST_SNPF(out_len, used, output + used,
3709
out_len - used, "0x%04x 0x%08x\n",
3710
addr,
3711
odm_get_bb_reg(dm, addr, MASKDWORD));
3712
}
3713
3714
for (addr = 0x1900; addr < 0x19ff; addr += 4)
3715
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3716
"0x%04x 0x%08x\n",
3717
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3718
3719
for (addr = 0x1c00; addr < 0x1cff; addr += 4)
3720
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3721
"0x%04x 0x%08x\n",
3722
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3723
3724
for (addr = 0x1f00; addr < 0x1fff; addr += 4)
3725
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3726
"0x%04x 0x%08x\n",
3727
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3728
3729
rpt_reg:
3730
3731
*_used = used;
3732
*_out_len = out_len;
3733
}
3734
3735
#endif
3736
3737
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3738
void phydm_dump_bb_reg_jgr3(void *dm_void, u32 *_used, char *output,
3739
u32 *_out_len)
3740
{
3741
struct dm_struct *dm = (struct dm_struct *)dm_void;
3742
u32 addr = 0;
3743
u32 used = *_used;
3744
u32 out_len = *_out_len;
3745
3746
if (dm->support_ic_type & ODM_IC_JGR3_SERIES) {
3747
for (addr = 0x800; addr < 0xdff; addr += 4)
3748
PDM_VAST_SNPF(out_len, used, output + used,
3749
out_len - used, "0x%04x 0x%08x\n", addr,
3750
odm_get_bb_reg(dm, addr, MASKDWORD));
3751
3752
for (addr = 0x1800; addr < 0x1aff; addr += 4)
3753
PDM_VAST_SNPF(out_len, used, output + used,
3754
out_len - used, "0x%04x 0x%08x\n", addr,
3755
odm_get_bb_reg(dm, addr, MASKDWORD));
3756
3757
for (addr = 0x1c00; addr < 0x1eff; addr += 4)
3758
PDM_VAST_SNPF(out_len, used, output + used,
3759
out_len - used, "0x%04x 0x%08x\n", addr,
3760
odm_get_bb_reg(dm, addr, MASKDWORD));
3761
3762
for (addr = 0x4000; addr < 0x41ff; addr += 4)
3763
PDM_VAST_SNPF(out_len, used, output + used,
3764
out_len - used, "0x%04x 0x%08x\n", addr,
3765
odm_get_bb_reg(dm, addr, MASKDWORD));
3766
}
3767
*_used = used;
3768
*_out_len = out_len;
3769
}
3770
3771
void phydm_dump_bb_reg2_jgr3(void *dm_void, u32 *_used, char *output,
3772
u32 *_out_len)
3773
{
3774
struct dm_struct *dm = (struct dm_struct *)dm_void;
3775
u32 addr = 0;
3776
u32 used = *_used;
3777
u32 out_len = *_out_len;
3778
3779
if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
3780
return;
3781
3782
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
3783
if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS) {
3784
for (addr = 0x5000; addr < 0x53ff; addr += 4) {
3785
PDM_VAST_SNPF(out_len, used, output + used,
3786
out_len - used, "0x%04x 0x%08x\n",
3787
addr,
3788
odm_get_bb_reg(dm, addr, MASKDWORD));
3789
}
3790
}
3791
#endif
3792
/* @Do not change the order of page-2C/2D*/
3793
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3794
"------ BB report-register start ------\n");
3795
for (addr = 0x2c00; addr < 0x2dff; addr += 4) {
3796
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3797
"0x%04x 0x%08x\n",
3798
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3799
}
3800
3801
*_used = used;
3802
*_out_len = out_len;
3803
}
3804
3805
void phydm_get_per_path_anapar_jgr3(void *dm_void, u8 path, u32 *_used,
3806
char *output, u32 *_out_len)
3807
{
3808
struct dm_struct *dm = (struct dm_struct *)dm_void;
3809
u8 state = 0;
3810
u8 state_bp = 0;
3811
u32 control_bb = 0;
3812
u32 control_pow = 0;
3813
u32 used = *_used;
3814
u32 out_len = *_out_len;
3815
u32 reg_idx = 0;
3816
u32 dbgport_idx = 0;
3817
u32 dbgport_val = 0;
3818
3819
PDM_SNPF(out_len, used, output + used, out_len - used, "path-%d:\n",
3820
path);
3821
3822
if (path == RF_PATH_A) {
3823
reg_idx = R_0x1830;
3824
dbgport_idx = 0x9F0;
3825
} else if (path == RF_PATH_B) {
3826
reg_idx = R_0x4130;
3827
dbgport_idx = 0xBF0;
3828
} else if (path == RF_PATH_C) {
3829
reg_idx = R_0x5230;
3830
dbgport_idx = 0xDF0;
3831
} else if (path == RF_PATH_D) {
3832
reg_idx = R_0x5330;
3833
dbgport_idx = 0xFF0;
3834
}
3835
3836
state_bp = (u8)odm_get_bb_reg(dm, reg_idx, 0xf00000);
3837
odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x5); /* @read en*/
3838
3839
for (state = 0; state <= 0xf; state++) {
3840
odm_set_bb_reg(dm, reg_idx, 0xF00000, state);
3841
if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, dbgport_idx)) {
3842
dbgport_val = phydm_get_bb_dbg_port_val(dm);
3843
phydm_release_bb_dbg_port(dm);
3844
} else {
3845
PDM_SNPF(out_len, used, output + used, out_len - used,
3846
"state:0x%x = read dbg_port error!\n", state);
3847
}
3848
control_bb = (dbgport_val & 0xFFFF0) >> 4;
3849
control_pow = dbgport_val & 0xF;
3850
PDM_SNPF(out_len, used, output + used, out_len - used,
3851
"state:0x%x = control_bb:0x%x pow_bb:0x%x\n",
3852
state, control_bb, control_pow);
3853
}
3854
odm_set_bb_reg(dm, reg_idx, 0xf00000, state_bp);
3855
odm_set_bb_reg(dm, reg_idx, 0x38000000, 0x6); /* @write en*/
3856
3857
*_used = used;
3858
*_out_len = out_len;
3859
}
3860
3861
#endif
3862
3863
void phydm_dump_bb_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3864
{
3865
struct dm_struct *dm = (struct dm_struct *)dm_void;
3866
u32 used = *_used;
3867
u32 out_len = *_out_len;
3868
3869
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3870
"BB==========\n");
3871
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3872
"------ BB control register start ------\n");
3873
3874
switch (dm->ic_ip_series) {
3875
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
3876
case PHYDM_IC_JGR3:
3877
phydm_dump_bb_reg_jgr3(dm, &used, output, &out_len);
3878
break;
3879
#endif
3880
3881
#if (ODM_IC_11AC_SERIES_SUPPORT)
3882
case PHYDM_IC_AC:
3883
phydm_dump_bb_reg_ac(dm, &used, output, &out_len);
3884
break;
3885
#endif
3886
3887
#if (ODM_IC_11N_SERIES_SUPPORT)
3888
case PHYDM_IC_N:
3889
phydm_dump_bb_reg_n(dm, &used, output, &out_len);
3890
break;
3891
#endif
3892
3893
default:
3894
break;
3895
}
3896
3897
*_used = used;
3898
*_out_len = out_len;
3899
}
3900
3901
void phydm_dump_rf_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3902
{
3903
struct dm_struct *dm = (struct dm_struct *)dm_void;
3904
u32 addr = 0;
3905
u32 used = *_used;
3906
u32 out_len = *_out_len;
3907
u32 reg = 0;
3908
3909
/* @dump RF register */
3910
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3911
"RF-A==========\n");
3912
3913
for (addr = 0; addr <= 0xFF; addr++) {
3914
reg = odm_get_rf_reg(dm, RF_PATH_A, addr, RFREG_MASK);
3915
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3916
"0x%02x 0x%05x\n", addr, reg);
3917
}
3918
3919
#ifdef PHYDM_COMPILE_ABOVE_2SS
3920
if (dm->rf_type > RF_1T1R) {
3921
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3922
"RF-B==========\n");
3923
3924
for (addr = 0; addr <= 0xFF; addr++) {
3925
reg = odm_get_rf_reg(dm, RF_PATH_B, addr, RFREG_MASK);
3926
PDM_VAST_SNPF(out_len, used, output + used,
3927
out_len - used, "0x%02x 0x%05x\n",
3928
addr, reg);
3929
}
3930
}
3931
#endif
3932
3933
#ifdef PHYDM_COMPILE_ABOVE_3SS
3934
if (dm->rf_type > RF_2T2R) {
3935
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3936
"RF-C==========\n");
3937
3938
for (addr = 0; addr <= 0xFF; addr++) {
3939
reg = odm_get_rf_reg(dm, RF_PATH_C, addr, RFREG_MASK);
3940
PDM_VAST_SNPF(out_len, used, output + used,
3941
out_len - used, "0x%02x 0x%05x\n",
3942
addr, reg);
3943
}
3944
}
3945
#endif
3946
3947
#ifdef PHYDM_COMPILE_ABOVE_4SS
3948
if (dm->rf_type > RF_3T3R) {
3949
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3950
"RF-D==========\n");
3951
3952
for (addr = 0; addr <= 0xFF; addr++) {
3953
reg = odm_get_rf_reg(dm, RF_PATH_D, addr, RFREG_MASK);
3954
PDM_VAST_SNPF(out_len, used, output + used,
3955
out_len - used, "0x%02x 0x%05x\n",
3956
addr, reg);
3957
}
3958
}
3959
#endif
3960
3961
*_used = used;
3962
*_out_len = out_len;
3963
}
3964
3965
void phydm_dump_mac_reg(void *dm_void, u32 *_used, char *output, u32 *_out_len)
3966
{
3967
struct dm_struct *dm = (struct dm_struct *)dm_void;
3968
u32 addr = 0;
3969
u32 used = *_used;
3970
u32 out_len = *_out_len;
3971
3972
/* @dump MAC register */
3973
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3974
"MAC==========\n");
3975
3976
for (addr = 0; addr < 0x7ff; addr += 4)
3977
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3978
"0x%04x 0x%08x\n",
3979
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3980
3981
for (addr = 0x1000; addr < 0x17ff; addr += 4)
3982
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
3983
"0x%04x 0x%08x\n",
3984
addr, odm_get_bb_reg(dm, addr, MASKDWORD));
3985
3986
*_used = used;
3987
*_out_len = out_len;
3988
}
3989
3990
void phydm_dump_reg(void *dm_void, char input[][16], u32 *_used, char *output,
3991
u32 *_out_len)
3992
{
3993
struct dm_struct *dm = (struct dm_struct *)dm_void;
3994
char help[] = "-h";
3995
u32 var1[10] = {0};
3996
u32 used = *_used;
3997
u32 out_len = *_out_len;
3998
u32 addr = 0;
3999
4000
if (input[1])
4001
PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4002
4003
if ((strcmp(input[1], help) == 0)) {
4004
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4005
if (dm->support_ic_type & ODM_IC_JGR3_SERIES)
4006
PDM_SNPF(out_len, used, output + used, out_len - used,
4007
"dumpreg {0:all, 1:BB, 2:RF, 3:MAC 4:BB2 for jgr3}\n");
4008
else
4009
#endif
4010
PDM_SNPF(out_len, used, output + used, out_len - used,
4011
"dumpreg {0:all, 1:BB, 2:RF, 3:MAC}\n");
4012
} else if (var1[0] == 0) {
4013
phydm_dump_mac_reg(dm, &used, output, &out_len);
4014
phydm_dump_bb_reg(dm, &used, output, &out_len);
4015
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4016
if (dm->ic_ip_series == PHYDM_IC_JGR3)
4017
phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4018
#endif
4019
4020
phydm_dump_rf_reg(dm, &used, output, &out_len);
4021
} else if (var1[0] == 1) {
4022
phydm_dump_bb_reg(dm, &used, output, &out_len);
4023
} else if (var1[0] == 2) {
4024
phydm_dump_rf_reg(dm, &used, output, &out_len);
4025
} else if (var1[0] == 3) {
4026
phydm_dump_mac_reg(dm, &used, output, &out_len);
4027
} else if (var1[0] == 4) {
4028
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4029
if (dm->ic_ip_series == PHYDM_IC_JGR3)
4030
phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4031
#endif
4032
}
4033
4034
*_used = used;
4035
*_out_len = out_len;
4036
}
4037
4038
void phydm_enable_big_jump(void *dm_void, char input[][16], u32 *_used,
4039
char *output, u32 *_out_len)
4040
{
4041
#if (RTL8822B_SUPPORT)
4042
struct dm_struct *dm = (struct dm_struct *)dm_void;
4043
struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
4044
u32 dm_value[10] = {0};
4045
u8 i, input_idx = 0;
4046
u32 val;
4047
4048
if (!(dm->support_ic_type & ODM_RTL8822B))
4049
return;
4050
4051
for (i = 0; i < 5; i++) {
4052
if (input[i + 1]) {
4053
PHYDM_SSCANF(input[i + 1], DCMD_HEX, &dm_value[i]);
4054
input_idx++;
4055
}
4056
}
4057
4058
if (input_idx == 0)
4059
return;
4060
4061
if (dm_value[0] == 0) {
4062
dm->dm_dig_table.enable_adjust_big_jump = false;
4063
4064
val = (dig_t->big_jump_step3 << 5) |
4065
(dig_t->big_jump_step2 << 3) |
4066
dig_t->big_jump_step1;
4067
4068
odm_set_bb_reg(dm, R_0x8c8, 0xfe, val);
4069
} else {
4070
dm->dm_dig_table.enable_adjust_big_jump = true;
4071
}
4072
#endif
4073
}
4074
4075
void phydm_show_rx_rate(void *dm_void, char input[][16], u32 *_used,
4076
char *output, u32 *_out_len)
4077
{
4078
#if (RTL8822B_SUPPORT || RTL8821C_SUPPORT || RTL8814B_SUPPORT ||\
4079
RTL8195B_SUPPORT || RTL8822C_SUPPORT)
4080
struct dm_struct *dm = (struct dm_struct *)dm_void;
4081
struct odm_phy_dbg_info *dbg = &dm->phy_dbg_info;
4082
u32 used = *_used;
4083
u32 out_len = *_out_len;
4084
u32 var1[10] = {0};
4085
char help[] = "-h";
4086
u8 i, input_idx = 0;
4087
4088
for (i = 0; i < 5; i++) {
4089
if (input[i + 1]) {
4090
PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
4091
input_idx++;
4092
}
4093
}
4094
4095
if (input_idx == 0)
4096
return;
4097
4098
if ((strcmp(input[1], help) == 0)) {
4099
PDM_SNPF(out_len, used, output + used, out_len - used,
4100
"{1: show Rx rate, 0:reset counter}\n");
4101
*_used = used;
4102
*_out_len = out_len;
4103
return;
4104
4105
} else if (var1[0] == 0) {
4106
phydm_reset_rx_rate_distribution(dm);
4107
*_used = used;
4108
*_out_len = out_len;
4109
return;
4110
}
4111
4112
/* @==Show SU Rate====================================================*/
4113
PDM_SNPF(out_len, used, output + used, out_len - used,
4114
"=====Rx SU rate Statistics=====\n");
4115
PDM_SNPF(out_len, used, output + used, out_len - used,
4116
"[SU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4117
dbg->num_qry_vht_pkt[0], dbg->num_qry_vht_pkt[1],
4118
dbg->num_qry_vht_pkt[2], dbg->num_qry_vht_pkt[3],
4119
dbg->num_qry_vht_pkt[4], dbg->num_qry_vht_pkt[5],
4120
dbg->num_qry_vht_pkt[6], dbg->num_qry_vht_pkt[7],
4121
dbg->num_qry_vht_pkt[8], dbg->num_qry_vht_pkt[9]);
4122
4123
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
4124
if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4125
PDM_SNPF(out_len, used, output + used, out_len - used,
4126
"[SU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4127
dbg->num_qry_vht_pkt[10], dbg->num_qry_vht_pkt[11],
4128
dbg->num_qry_vht_pkt[12], dbg->num_qry_vht_pkt[13],
4129
dbg->num_qry_vht_pkt[14], dbg->num_qry_vht_pkt[15],
4130
dbg->num_qry_vht_pkt[16], dbg->num_qry_vht_pkt[17],
4131
dbg->num_qry_vht_pkt[18], dbg->num_qry_vht_pkt[19]);
4132
}
4133
#endif
4134
/* @==Show MU Rate====================================================*/
4135
#if (ODM_PHY_STATUS_NEW_TYPE_SUPPORT) || (defined(PHYSTS_3RD_TYPE_SUPPORT))
4136
PDM_SNPF(out_len, used, output + used, out_len - used,
4137
"=====Rx MU rate Statistics=====\n");
4138
PDM_SNPF(out_len, used, output + used, out_len - used,
4139
"[MU][1SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4140
dbg->num_mu_vht_pkt[0], dbg->num_mu_vht_pkt[1],
4141
dbg->num_mu_vht_pkt[2], dbg->num_mu_vht_pkt[3],
4142
dbg->num_mu_vht_pkt[4], dbg->num_mu_vht_pkt[5],
4143
dbg->num_mu_vht_pkt[6], dbg->num_mu_vht_pkt[7],
4144
dbg->num_mu_vht_pkt[8], dbg->num_mu_vht_pkt[9]);
4145
4146
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
4147
if (dm->support_ic_type & (PHYDM_IC_ABOVE_2SS)) {
4148
PDM_SNPF(out_len, used, output + used, out_len - used,
4149
"[MU][2SS] {%d, %d, %d, %d | %d, %d, %d, %d | %d, %d}\n",
4150
dbg->num_mu_vht_pkt[10], dbg->num_mu_vht_pkt[11],
4151
dbg->num_mu_vht_pkt[12], dbg->num_mu_vht_pkt[13],
4152
dbg->num_mu_vht_pkt[14], dbg->num_mu_vht_pkt[15],
4153
dbg->num_mu_vht_pkt[16], dbg->num_mu_vht_pkt[17],
4154
dbg->num_mu_vht_pkt[18], dbg->num_mu_vht_pkt[19]);
4155
}
4156
#endif
4157
#endif
4158
*_used = used;
4159
*_out_len = out_len;
4160
#endif
4161
}
4162
4163
void phydm_per_tone_evm(void *dm_void, char input[][16], u32 *_used,
4164
char *output, u32 *_out_len)
4165
{
4166
struct dm_struct *dm = (struct dm_struct *)dm_void;
4167
u8 i, j;
4168
u32 used = *_used;
4169
u32 out_len = *_out_len;
4170
u32 var1[4] = {0};
4171
u32 val, tone_num, round;
4172
s8 rxevm_0, rxevm_1;
4173
s32 avg_num, evm_tone_0[256] = {0}, evm_tone_1[256] = {0};
4174
s32 rxevm_sum_0, rxevm_sum_1;
4175
4176
if (dm->support_ic_type & ODM_IC_11N_SERIES) {
4177
pr_debug("n series not support yet !\n");
4178
return;
4179
}
4180
4181
for (i = 0; i < 4; i++) {
4182
if (input[i + 1])
4183
PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4184
}
4185
4186
avg_num = var1[0];
4187
round = var1[1];
4188
4189
if (!dm->is_linked) {
4190
PDM_SNPF(out_len, used, output + used, out_len - used,
4191
"No Link !!\n");
4192
4193
*_used = used;
4194
*_out_len = out_len;
4195
4196
return;
4197
}
4198
4199
pr_debug("ID=((%d)), BW=((%d)), fc=((CH-%d))\n", dm->curr_station_id,
4200
20 << *dm->band_width, *dm->channel);
4201
pr_debug("avg_num =((%d)), round =((%d))\n", avg_num, round);
4202
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
4203
watchdog_stop(dm->priv);
4204
#endif
4205
for (j = 0; j < round; j++) {
4206
pr_debug("\nround((%d))\n", (j + 1));
4207
if (*dm->band_width == CHANNEL_WIDTH_20) {
4208
for (tone_num = 228; tone_num <= 255; tone_num++) {
4209
odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4210
rxevm_sum_0 = 0;
4211
rxevm_sum_1 = 0;
4212
for (i = 0; i < avg_num; i++) {
4213
val = odm_read_4byte(dm, R_0xf8c);
4214
4215
rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4216
rxevm_0 = (rxevm_0 / 2);
4217
if (rxevm_0 < -63)
4218
rxevm_0 = 0;
4219
4220
rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4221
rxevm_1 = (rxevm_1 / 2);
4222
if (rxevm_1 < -63)
4223
rxevm_1 = 0;
4224
rxevm_sum_0 += rxevm_0;
4225
rxevm_sum_1 += rxevm_1;
4226
ODM_delay_ms(1);
4227
}
4228
evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4229
evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4230
pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4231
(256 - tone_num), evm_tone_0[tone_num],
4232
evm_tone_1[tone_num]);
4233
}
4234
4235
for (tone_num = 1; tone_num <= 28; tone_num++) {
4236
odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4237
rxevm_sum_0 = 0;
4238
rxevm_sum_1 = 0;
4239
for (i = 0; i < avg_num; i++) {
4240
val = odm_read_4byte(dm, R_0xf8c);
4241
4242
rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4243
rxevm_0 = (rxevm_0 / 2);
4244
if (rxevm_0 < -63)
4245
rxevm_0 = 0;
4246
4247
rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4248
rxevm_1 = (rxevm_1 / 2);
4249
if (rxevm_1 < -63)
4250
rxevm_1 = 0;
4251
rxevm_sum_0 += rxevm_0;
4252
rxevm_sum_1 += rxevm_1;
4253
ODM_delay_ms(1);
4254
}
4255
evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4256
evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4257
pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4258
tone_num, evm_tone_0[tone_num],
4259
evm_tone_1[tone_num]);
4260
}
4261
} else if (*dm->band_width == CHANNEL_WIDTH_40) {
4262
for (tone_num = 198; tone_num <= 254; tone_num++) {
4263
odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4264
rxevm_sum_0 = 0;
4265
rxevm_sum_1 = 0;
4266
for (i = 0; i < avg_num; i++) {
4267
val = odm_read_4byte(dm, R_0xf8c);
4268
4269
rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4270
rxevm_0 = (rxevm_0 / 2);
4271
if (rxevm_0 < -63)
4272
rxevm_0 = 0;
4273
4274
rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4275
rxevm_1 = (rxevm_1 / 2);
4276
if (rxevm_1 < -63)
4277
rxevm_1 = 0;
4278
4279
rxevm_sum_0 += rxevm_0;
4280
rxevm_sum_1 += rxevm_1;
4281
ODM_delay_ms(1);
4282
}
4283
evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4284
evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4285
pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4286
(256 - tone_num), evm_tone_0[tone_num],
4287
evm_tone_1[tone_num]);
4288
}
4289
4290
for (tone_num = 2; tone_num <= 58; tone_num++) {
4291
odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4292
rxevm_sum_0 = 0;
4293
rxevm_sum_1 = 0;
4294
for (i = 0; i < avg_num; i++) {
4295
val = odm_read_4byte(dm, R_0xf8c);
4296
4297
rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4298
rxevm_0 = (rxevm_0 / 2);
4299
if (rxevm_0 < -63)
4300
rxevm_0 = 0;
4301
4302
rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4303
rxevm_1 = (rxevm_1 / 2);
4304
if (rxevm_1 < -63)
4305
rxevm_1 = 0;
4306
rxevm_sum_0 += rxevm_0;
4307
rxevm_sum_1 += rxevm_1;
4308
ODM_delay_ms(1);
4309
}
4310
evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4311
evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4312
pr_debug("Tone(%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4313
tone_num, evm_tone_0[tone_num],
4314
evm_tone_1[tone_num]);
4315
}
4316
} else if (*dm->band_width == CHANNEL_WIDTH_80) {
4317
for (tone_num = 134; tone_num <= 254; tone_num++) {
4318
odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4319
rxevm_sum_0 = 0;
4320
rxevm_sum_1 = 0;
4321
for (i = 0; i < avg_num; i++) {
4322
val = odm_read_4byte(dm, R_0xf8c);
4323
4324
rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4325
rxevm_0 = (rxevm_0 / 2);
4326
if (rxevm_0 < -63)
4327
rxevm_0 = 0;
4328
4329
rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4330
rxevm_1 = (rxevm_1 / 2);
4331
if (rxevm_1 < -63)
4332
rxevm_1 = 0;
4333
rxevm_sum_0 += rxevm_0;
4334
rxevm_sum_1 += rxevm_1;
4335
ODM_delay_ms(1);
4336
}
4337
evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4338
evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4339
pr_debug("Tone(-%-3d) RXEVM(1ss/2ss)=%d, %d\n",
4340
(256 - tone_num), evm_tone_0[tone_num],
4341
evm_tone_1[tone_num]);
4342
}
4343
4344
for (tone_num = 2; tone_num <= 122; tone_num++) {
4345
odm_set_bb_reg(dm, R_0x8c4, 0xff8, tone_num);
4346
rxevm_sum_0 = 0;
4347
rxevm_sum_1 = 0;
4348
for (i = 0; i < avg_num; i++) {
4349
val = odm_read_4byte(dm, R_0xf8c);
4350
4351
rxevm_0 = (s8)((val & MASKBYTE2) >> 16);
4352
rxevm_0 = (rxevm_0 / 2);
4353
if (rxevm_0 < -63)
4354
rxevm_0 = 0;
4355
4356
rxevm_1 = (s8)((val & MASKBYTE3) >> 24);
4357
rxevm_1 = (rxevm_1 / 2);
4358
if (rxevm_1 < -63)
4359
rxevm_1 = 0;
4360
rxevm_sum_0 += rxevm_0;
4361
rxevm_sum_1 += rxevm_1;
4362
ODM_delay_ms(1);
4363
}
4364
evm_tone_0[tone_num] = (rxevm_sum_0 / avg_num);
4365
evm_tone_1[tone_num] = (rxevm_sum_1 / avg_num);
4366
pr_debug("Tone(%-3d) RXEVM (1ss/2ss)=%d, %d\n",
4367
tone_num, evm_tone_0[tone_num],
4368
evm_tone_1[tone_num]);
4369
}
4370
}
4371
}
4372
*_used = used;
4373
*_out_len = out_len;
4374
}
4375
4376
void phydm_bw_ch_adjust(void *dm_void, char input[][16],
4377
u32 *_used, char *output, u32 *_out_len)
4378
{
4379
struct dm_struct *dm = (struct dm_struct *)dm_void;
4380
char help[] = "-h";
4381
u32 var1[10] = {0};
4382
u32 used = *_used;
4383
u32 out_len = *_out_len;
4384
u8 i;
4385
boolean is_enable_dbg_mode;
4386
u8 central_ch, primary_ch_idx;
4387
enum channel_width bw;
4388
4389
#ifdef PHYDM_COMMON_API_SUPPORT
4390
4391
if ((strcmp(input[1], help) == 0)) {
4392
PDM_SNPF(out_len, used, output + used, out_len - used,
4393
"{en} {CH} {pr_ch_idx 1/2/3/4/9/10} {0:20M,1:40M,2:80M}\n");
4394
goto out;
4395
}
4396
4397
if (!(dm->support_ic_type & CMN_API_SUPPORT_IC)) {
4398
PDM_SNPF(out_len, used, output + used, out_len - used,
4399
"Not support this API\n");
4400
goto out;
4401
}
4402
4403
for (i = 0; i < 4; i++) {
4404
if (input[i + 1])
4405
PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4406
}
4407
4408
is_enable_dbg_mode = (boolean)var1[0];
4409
central_ch = (u8)var1[1];
4410
primary_ch_idx = (u8)var1[2];
4411
bw = (enum channel_width)var1[3];
4412
4413
if (is_enable_dbg_mode) {
4414
dm->is_disable_phy_api = false;
4415
phydm_api_switch_bw_channel(dm, central_ch, primary_ch_idx, bw);
4416
dm->is_disable_phy_api = true;
4417
PDM_SNPF(out_len, used, output + used, out_len - used,
4418
"central_ch = %d, primary_ch_idx = %d, bw = %d\n",
4419
central_ch, primary_ch_idx, bw);
4420
}
4421
out:
4422
#endif
4423
4424
*_used = used;
4425
*_out_len = out_len;
4426
}
4427
4428
void phydm_ext_rf_element_ctrl(void *dm_void, char input[][16], u32 *_used,
4429
char *output, u32 *_out_len)
4430
{
4431
struct dm_struct *dm = (struct dm_struct *)dm_void;
4432
u32 val[10] = {0};
4433
u8 i = 0, input_idx = 0;
4434
4435
for (i = 0; i < 5; i++) {
4436
if (input[i + 1]) {
4437
PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &val[i]);
4438
input_idx++;
4439
}
4440
}
4441
4442
if (input_idx == 0)
4443
return;
4444
4445
if (val[0] == 1) /*@ext switch*/ {
4446
phydm_set_ext_switch(dm, val[1]);
4447
}
4448
}
4449
4450
void phydm_print_dbgport(void *dm_void, char input[][16], u32 *_used,
4451
char *output, u32 *_out_len)
4452
{
4453
struct dm_struct *dm = (struct dm_struct *)dm_void;
4454
char help[] = "-h";
4455
u32 var1[10] = {0};
4456
u32 used = *_used;
4457
u32 out_len = *_out_len;
4458
u32 dbg_port_value = 0;
4459
u8 val[32];
4460
u8 tmp = 0;
4461
u8 i;
4462
4463
if (strcmp(input[1], help) == 0) {
4464
PDM_SNPF(out_len, used, output + used, out_len - used,
4465
"{dbg_port_idx}\n");
4466
goto out;
4467
}
4468
4469
PHYDM_SSCANF(input[1], DCMD_HEX, &var1[0]);
4470
4471
dm->debug_components |= ODM_COMP_API;
4472
if (phydm_set_bb_dbg_port(dm, DBGPORT_PRI_3, var1[0])) {
4473
dbg_port_value = phydm_get_bb_dbg_port_val(dm);
4474
phydm_release_bb_dbg_port(dm);
4475
4476
for (i = 0; i < 32; i++)
4477
val[i] = (u8)((dbg_port_value & BIT(i)) >> i);
4478
4479
PDM_SNPF(out_len, used, output + used, out_len - used,
4480
"Dbg Port[0x%x] = ((0x%x))\n", var1[0],
4481
dbg_port_value);
4482
4483
for (i = 4; i != 0; i--) {
4484
tmp = 8 * (i - 1);
4485
PDM_SNPF(out_len, used, output + used, out_len - used,
4486
"val[%d:%d] = 8b'%d %d %d %d %d %d %d %d\n",
4487
tmp + 7, tmp, val[tmp + 7], val[tmp + 6],
4488
val[tmp + 5], val[tmp + 4], val[tmp + 3],
4489
val[tmp + 2], val[tmp + 1], val[tmp + 0]);
4490
}
4491
}
4492
dm->debug_components &= (~ODM_COMP_API);
4493
out:
4494
*_used = used;
4495
*_out_len = out_len;
4496
}
4497
4498
void phydm_get_anapar_table(void *dm_void, u32 *_used, char *output,
4499
u32 *_out_len)
4500
{
4501
struct dm_struct *dm = (struct dm_struct *)dm_void;
4502
u32 used = *_used;
4503
u32 out_len = *_out_len;
4504
enum rf_path i = RF_PATH_A;
4505
4506
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4507
if (!(dm->support_ic_type & ODM_IC_JGR3_SERIES))
4508
return;
4509
4510
PDM_VAST_SNPF(out_len, used, output + used, out_len - used,
4511
"------ Analog parameters start ------\n");
4512
4513
for (i = RF_PATH_A; i < (enum rf_path)dm->num_rf_path; i++)
4514
phydm_get_per_path_anapar_jgr3(dm, i, &used, output, &out_len);
4515
#endif
4516
4517
*_used = used;
4518
*_out_len = out_len;
4519
}
4520
4521
void phydm_dd_dbg_dump(void *dm_void, char input[][16], u32 *_used,
4522
char *output, u32 *_out_len)
4523
{
4524
struct dm_struct *dm = (struct dm_struct *)dm_void;
4525
char help[] = "-h";
4526
u32 var1[10] = {0};
4527
u32 used = *_used;
4528
u32 out_len = *_out_len;
4529
4530
PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
4531
4532
if ((strcmp(input[1], help) == 0)) {
4533
PDM_SNPF(out_len, used, output + used, out_len - used,
4534
"dump: {1}\n");
4535
return;
4536
} else if (var1[0] == 1) {
4537
/*[Reg]*/
4538
phydm_dump_mac_reg(dm, &used, output, &out_len);
4539
phydm_dump_bb_reg(dm, &used, output, &out_len);
4540
#ifdef PHYDM_IC_JGR3_SERIES_SUPPORT
4541
if (dm->ic_ip_series == PHYDM_IC_JGR3)
4542
phydm_dump_bb_reg2_jgr3(dm, &used, output, &out_len);
4543
#endif
4544
4545
phydm_dump_rf_reg(dm, &used, output, &out_len);
4546
/*[Dbg Port]*/
4547
#ifdef PHYDM_AUTO_DEGBUG
4548
phydm_dbg_port_dump(dm, &used, output, &out_len);
4549
#endif
4550
/*[Analog Parameters]*/
4551
phydm_get_anapar_table(dm, &used, output, &out_len);
4552
}
4553
}
4554
4555
void phydm_nss_hitogram_mp(void *dm_void, enum PDM_RATE_TYPE rate_type,
4556
u32 *_used, char *output, u32 *_out_len)
4557
{
4558
struct dm_struct *dm = (struct dm_struct *)dm_void;
4559
struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4560
struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4561
u32 used = *_used;
4562
u32 out_len = *_out_len;
4563
char buf[PHYDM_SNPRINT_SIZE] = {0};
4564
u16 buf_size = PHYDM_SNPRINT_SIZE;
4565
u16 h_size = PHY_HIST_SIZE;
4566
u16 *evm_hist = &dbg_s->evm_1ss_hist[0];
4567
u16 *snr_hist = &dbg_s->snr_1ss_hist[0];
4568
u8 i = 0;
4569
u8 ss = phydm_rate_type_2_num_ss(dm, rate_type);
4570
4571
if (rate_type == PDM_OFDM) {
4572
phydm_print_hist_2_buf(dm, dbg_s->evm_ofdm_hist, PHY_HIST_SIZE,
4573
buf, buf_size);
4574
PDM_SNPF(out_len, used, output + used, out_len - used,
4575
"%-14s=%s\n", "[OFDM][EVM]", buf);
4576
4577
phydm_print_hist_2_buf(dm, dbg_s->snr_ofdm_hist, PHY_HIST_SIZE,
4578
buf, buf_size);
4579
PDM_SNPF(out_len, used, output + used, out_len - used,
4580
"%-14s=%s\n", "[OFDM][SNR]", buf);
4581
4582
*_used = used;
4583
*_out_len = out_len;
4584
return;
4585
}
4586
4587
for (i = 0; i < ss; i++) {
4588
if (rate_type == PDM_1SS) {
4589
evm_hist = &dbg_s->evm_1ss_hist[0];
4590
snr_hist = &dbg_s->snr_1ss_hist[0];
4591
} else if (rate_type == PDM_2SS) {
4592
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
4593
evm_hist = &dbg_s->evm_2ss_hist[i][0];
4594
snr_hist = &dbg_s->snr_2ss_hist[i][0];
4595
#endif
4596
} else if (rate_type == PDM_3SS) {
4597
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
4598
evm_hist = &dbg_s->evm_3ss_hist[i][0];
4599
snr_hist = &dbg_s->snr_3ss_hist[i][0];
4600
#endif
4601
} else if (rate_type == PDM_4SS) {
4602
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
4603
evm_hist = &dbg_s->evm_4ss_hist[i][0];
4604
snr_hist = &dbg_s->snr_4ss_hist[i][0];
4605
#endif
4606
}
4607
4608
phydm_print_hist_2_buf(dm, evm_hist, h_size, buf, buf_size);
4609
PDM_SNPF(out_len, used, output + used, out_len - used,
4610
"[%d-SS][EVM][%d]=%s\n", ss, i, buf);
4611
phydm_print_hist_2_buf(dm, snr_hist, h_size, buf, buf_size);
4612
PDM_SNPF(out_len, used, output + used, out_len - used,
4613
"[%d-SS][SNR][%d]=%s\n", ss, i, buf);
4614
}
4615
*_used = used;
4616
*_out_len = out_len;
4617
}
4618
4619
void phydm_mp_dbg(void *dm_void, char input[][16], u32 *_used, char *output,
4620
u32 *_out_len)
4621
{
4622
struct dm_struct *dm = (struct dm_struct *)dm_void;
4623
struct odm_phy_dbg_info *dbg_i = &dm->phy_dbg_info;
4624
struct phydm_phystatus_statistic *dbg_s = &dbg_i->physts_statistic_info;
4625
struct phydm_phystatus_avg *dbg_avg = &dbg_i->phystatus_statistic_avg;
4626
char *rate_type = NULL;
4627
u8 tmp_rssi_avg[4];
4628
u8 tmp_snr_avg[4];
4629
u8 tmp_evm_avg[4];
4630
u32 tmp_cnt = 0;
4631
char buf[PHYDM_SNPRINT_SIZE] = {0};
4632
u32 used = *_used;
4633
u32 out_len = *_out_len;
4634
u32 var1[10] = {0};
4635
u16 buf_size = PHYDM_SNPRINT_SIZE;
4636
u16 th_size = PHY_HIST_SIZE - 1;
4637
u8 i = 0;
4638
4639
if (!(*dm->mp_mode))
4640
return;
4641
4642
PDM_SNPF(out_len, used, output + used, out_len - used,
4643
"BW=((%d)), fc=((CH-%d))\n",
4644
20 << *dm->band_width, *dm->channel);
4645
4646
/*@===[PHY Histogram]================================================*/
4647
PDM_SNPF(out_len, used, output + used, out_len - used,
4648
"[PHY Histogram] ==============>\n");
4649
/*@===[Threshold]===*/
4650
phydm_print_hist_2_buf(dm, dbg_i->evm_hist_th, th_size, buf, buf_size);
4651
PDM_SNPF(out_len, used, output + used, out_len - used,
4652
"%-16s=%s\n", "[EVM_TH]", buf);
4653
phydm_print_hist_2_buf(dm, dbg_i->snr_hist_th, th_size, buf, buf_size);
4654
PDM_SNPF(out_len, used, output + used, out_len - used,
4655
"%-16s=%s\n", "[SNR_TH]", buf);
4656
/*@===[OFDM]===*/
4657
phydm_nss_hitogram_mp(dm, PDM_OFDM, &used, output, &out_len);
4658
/*@===[1-SS]===*/
4659
phydm_nss_hitogram_mp(dm, PDM_1SS, &used, output, &out_len);
4660
/*@===[2-SS]===*/
4661
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
4662
if (dm->support_ic_type & PHYDM_IC_ABOVE_2SS)
4663
phydm_nss_hitogram_mp(dm, PDM_2SS, &used, output, &out_len);
4664
#endif
4665
/*@===[3-SS]===*/
4666
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
4667
if (dm->support_ic_type & PHYDM_IC_ABOVE_3SS)
4668
phydm_nss_hitogram_mp(dm, PDM_3SS, &used, output, &out_len);
4669
#endif
4670
/*@===[4-SS]===*/
4671
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
4672
if (dm->support_ic_type & PHYDM_IC_ABOVE_4SS)
4673
phydm_nss_hitogram_mp(dm, PDM_4SS, &used, output, &out_len);
4674
#endif
4675
/*@===[PHY Avg]======================================================*/
4676
phydm_get_avg_phystatus_val(dm);
4677
PDM_SNPF(out_len, used, output + used, out_len - used,
4678
"[PHY Avg] ==============>\n");
4679
4680
phydm_get_avg_phystatus_val(dm);
4681
4682
switch (dm->num_rf_path) {
4683
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
4684
case 4:
4685
PDM_SNPF(out_len, used, output + used, out_len - used,
4686
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4687
"[Beacon]", dbg_s->rssi_beacon_cnt,
4688
dbg_avg->rssi_beacon_avg[0],
4689
dbg_avg->rssi_beacon_avg[1],
4690
dbg_avg->rssi_beacon_avg[2],
4691
dbg_avg->rssi_beacon_avg[3]);
4692
break;
4693
#endif
4694
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
4695
case 3:
4696
PDM_SNPF(out_len, used, output + used, out_len - used,
4697
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4698
"[Beacon]", dbg_s->rssi_beacon_cnt,
4699
dbg_avg->rssi_beacon_avg[0],
4700
dbg_avg->rssi_beacon_avg[1],
4701
dbg_avg->rssi_beacon_avg[2]);
4702
break;
4703
#endif
4704
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
4705
case 2:
4706
PDM_SNPF(out_len, used, output + used, out_len - used,
4707
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4708
"[Beacon]", dbg_s->rssi_beacon_cnt,
4709
dbg_avg->rssi_beacon_avg[0],
4710
dbg_avg->rssi_beacon_avg[1]);
4711
break;
4712
#endif
4713
default:
4714
PDM_SNPF(out_len, used, output + used, out_len - used,
4715
"* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4716
"[Beacon]", dbg_s->rssi_beacon_cnt,
4717
dbg_avg->rssi_beacon_avg[0]);
4718
break;
4719
}
4720
4721
switch (dm->num_rf_path) {
4722
#ifdef PHYSTS_3RD_TYPE_SUPPORT
4723
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
4724
case 4:
4725
PDM_SNPF(out_len, used, output + used, out_len - used,
4726
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d}\n",
4727
"[CCK]", dbg_s->rssi_cck_cnt,
4728
dbg_avg->rssi_cck_avg,
4729
dbg_avg->rssi_cck_avg_abv_2ss[0],
4730
dbg_avg->rssi_cck_avg_abv_2ss[1],
4731
dbg_avg->rssi_cck_avg_abv_2ss[2]);
4732
break;
4733
#endif
4734
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
4735
case 3:
4736
PDM_SNPF(out_len, used, output + used, out_len - used,
4737
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d}\n",
4738
"[CCK]", dbg_s->rssi_cck_cnt,
4739
dbg_avg->rssi_cck_avg,
4740
dbg_avg->rssi_cck_avg_abv_2ss[0],
4741
dbg_avg->rssi_cck_avg_abv_2ss[1]);
4742
break;
4743
#endif
4744
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
4745
case 2:
4746
PDM_SNPF(out_len, used, output + used, out_len - used,
4747
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d}\n",
4748
"[CCK]", dbg_s->rssi_cck_cnt,
4749
dbg_avg->rssi_cck_avg,
4750
dbg_avg->rssi_cck_avg_abv_2ss[0]);
4751
break;
4752
#endif
4753
#endif
4754
default:
4755
PDM_SNPF(out_len, used, output + used, out_len - used,
4756
"* %-8s Cnt=((%.3d)) RSSI:{%.2d}\n",
4757
"[CCK]", dbg_s->rssi_cck_cnt, dbg_avg->rssi_cck_avg);
4758
break;
4759
}
4760
4761
for (i = 0; i <= 4; i++) {
4762
if (i > dm->num_rf_path)
4763
break;
4764
4765
odm_memory_set(dm, tmp_rssi_avg, 0, 4);
4766
odm_memory_set(dm, tmp_snr_avg, 0, 4);
4767
odm_memory_set(dm, tmp_evm_avg, 0, 4);
4768
4769
switch (i) {
4770
#if (defined(PHYDM_COMPILE_ABOVE_4SS))
4771
case 4:
4772
rate_type = "[4-SS]";
4773
tmp_cnt = dbg_s->rssi_4ss_cnt;
4774
odm_move_memory(dm, tmp_rssi_avg,
4775
dbg_avg->rssi_4ss_avg, dm->num_rf_path);
4776
odm_move_memory(dm, tmp_snr_avg,
4777
dbg_avg->snr_4ss_avg, dm->num_rf_path);
4778
odm_move_memory(dm, tmp_evm_avg, dbg_avg->evm_4ss_avg,
4779
4);
4780
break;
4781
#endif
4782
#if (defined(PHYDM_COMPILE_ABOVE_3SS))
4783
case 3:
4784
rate_type = "[3-SS]";
4785
tmp_cnt = dbg_s->rssi_3ss_cnt;
4786
odm_move_memory(dm, tmp_rssi_avg,
4787
dbg_avg->rssi_3ss_avg, dm->num_rf_path);
4788
odm_move_memory(dm, tmp_snr_avg,
4789
dbg_avg->snr_3ss_avg, dm->num_rf_path);
4790
odm_move_memory(dm, tmp_evm_avg,
4791
dbg_avg->evm_3ss_avg, 3);
4792
break;
4793
#endif
4794
#if (defined(PHYDM_COMPILE_ABOVE_2SS))
4795
case 2:
4796
rate_type = "[2-SS]";
4797
tmp_cnt = dbg_s->rssi_2ss_cnt;
4798
odm_move_memory(dm, tmp_rssi_avg,
4799
dbg_avg->rssi_2ss_avg, dm->num_rf_path);
4800
odm_move_memory(dm, tmp_snr_avg, dbg_avg->snr_2ss_avg,
4801
dm->num_rf_path);
4802
odm_move_memory(dm, tmp_evm_avg,
4803
dbg_avg->evm_2ss_avg, 2);
4804
break;
4805
#endif
4806
case 1:
4807
rate_type = "[1-SS]";
4808
tmp_cnt = dbg_s->rssi_1ss_cnt;
4809
odm_move_memory(dm, tmp_rssi_avg,
4810
dbg_avg->rssi_1ss_avg, dm->num_rf_path);
4811
odm_move_memory(dm, tmp_snr_avg,
4812
dbg_avg->snr_1ss_avg, dm->num_rf_path);
4813
odm_move_memory(dm, tmp_evm_avg,
4814
&dbg_avg->evm_1ss_avg, 1);
4815
break;
4816
default:
4817
rate_type = "[L-OFDM]";
4818
tmp_cnt = dbg_s->rssi_ofdm_cnt;
4819
odm_move_memory(dm, tmp_rssi_avg,
4820
dbg_avg->rssi_ofdm_avg,
4821
dm->num_rf_path);
4822
odm_move_memory(dm, tmp_snr_avg,
4823
dbg_avg->snr_ofdm_avg, dm->num_rf_path);
4824
odm_move_memory(dm, tmp_evm_avg,
4825
&dbg_avg->evm_ofdm_avg, 1);
4826
break;
4827
}
4828
4829
PDM_SNPF(out_len, used, output + used, out_len - used,
4830
"* %-8s Cnt=((%.3d)) RSSI:{%.2d, %.2d, %.2d, %.2d} SNR:{%.2d, %.2d, %.2d, %.2d} EVM:{-%.2d, -%.2d, -%.2d, -%.2d}\n",
4831
rate_type, tmp_cnt,
4832
tmp_rssi_avg[0], tmp_rssi_avg[1],
4833
tmp_rssi_avg[2], tmp_rssi_avg[3],
4834
tmp_snr_avg[0], tmp_snr_avg[1],
4835
tmp_snr_avg[2], tmp_snr_avg[3],
4836
tmp_evm_avg[0], tmp_evm_avg[1],
4837
tmp_evm_avg[2], tmp_evm_avg[3]);
4838
}
4839
4840
phydm_reset_phystatus_statistic(dm);
4841
4842
PDM_SNPF(out_len, used, output + used, out_len - used,
4843
"rxsc_idx {Legacy, 20, 40, 80} = {%d, %d, %d, %d}\n",
4844
dm->rxsc_l, dm->rxsc_20, dm->rxsc_40, dm->rxsc_80);
4845
4846
*_used = used;
4847
*_out_len = out_len;
4848
}
4849
4850
void phydm_reg_monitor(void *dm_void, char input[][16], u32 *_used,
4851
char *output, u32 *_out_len)
4852
{
4853
struct dm_struct *dm = (struct dm_struct *)dm_void;
4854
char help[] = "-h";
4855
u32 var1[10] = {0};
4856
u32 used = *_used;
4857
u32 out_len = *_out_len;
4858
boolean en_mntr = false;
4859
u8 i = 0;
4860
4861
for (i = 0; i < 7; i++) {
4862
if (input[i + 1])
4863
PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL, &var1[i]);
4864
}
4865
4866
if ((strcmp(input[1], help) == 0)) {
4867
PDM_SNPF(out_len, used, output + used, out_len - used,
4868
"reg_mntr {en} {0:all, 1:BB, 2:RF, 3:MAC 4:1/2/4 byte}\n");
4869
} else {
4870
if (var1[0] == 1)
4871
en_mntr = true;
4872
else
4873
en_mntr = false;
4874
4875
if (var1[1] == 0) {
4876
dm->en_reg_mntr_bb = en_mntr;
4877
dm->en_reg_mntr_rf = en_mntr;
4878
dm->en_reg_mntr_mac = en_mntr;
4879
dm->en_reg_mntr_byte = en_mntr;
4880
} else if (var1[1] == 1) {
4881
dm->en_reg_mntr_bb = en_mntr;
4882
} else if (var1[1] == 2) {
4883
dm->en_reg_mntr_rf = en_mntr;
4884
} else if (var1[1] == 3) {
4885
dm->en_reg_mntr_mac = en_mntr;
4886
} else if (var1[1] == 4) {
4887
dm->en_reg_mntr_byte = en_mntr;
4888
}
4889
}
4890
4891
PDM_SNPF(out_len, used, output + used, out_len - used,
4892
"en: BB:%d, RF:%d, MAC:%d, byte:%d\n", dm->en_reg_mntr_bb,
4893
dm->en_reg_mntr_rf, dm->en_reg_mntr_mac, dm->en_reg_mntr_byte);
4894
4895
*_used = used;
4896
*_out_len = out_len;
4897
}
4898
4899
#if RTL8814B_SUPPORT
4900
void phydm_spur_detect_dbg(void *dm_void, char input[][16], u32 *_used,
4901
char *output, u32 *_out_len)
4902
{
4903
struct dm_struct *dm = (struct dm_struct *)dm_void;
4904
char help[] = "-h";
4905
u32 var1[10] = {0};
4906
u32 used = *_used;
4907
u32 out_len = *_out_len;
4908
u32 i;
4909
4910
if ((strcmp(input[1], help) == 0)) {
4911
PDM_SNPF(out_len, used, output + used, out_len - used,
4912
"{0: Auto spur detect(NBI+CSI), 1:NBI only,");
4913
PDM_SNPF(out_len, used, output + used, out_len - used,
4914
"2: CSI only, 3: Disable}\n");
4915
PDM_SNPF(out_len, used, output + used, out_len - used,
4916
"{NBI path(0~3) | CSI wgt (0~7)}\n");
4917
} else {
4918
for (i = 0; i < 10; i++) {
4919
if (input[i + 1])
4920
PHYDM_SSCANF(input[i + 1], DCMD_HEX, &var1[i]);
4921
}
4922
4923
if (var1[0] == 1)
4924
dm->dsde_sel = DET_NBI;
4925
else if (var1[0] == 2)
4926
dm->dsde_sel = DET_CSI;
4927
else if (var1[0] == 3)
4928
dm->dsde_sel = DET_DISABLE;
4929
else
4930
dm->dsde_sel = DET_AUTO;
4931
4932
PDM_SNPF(out_len, used, output + used, out_len - used,
4933
"spur detect mode = %d\n", dm->dsde_sel);
4934
4935
if (dm->dsde_sel == DET_NBI) {
4936
if (var1[1] < 4) {
4937
dm->nbi_path_sel = (u8)var1[1];
4938
PDM_SNPF(out_len, used, output + used,
4939
out_len - used, "NBI set path %d\n",
4940
dm->nbi_path_sel);
4941
} else {
4942
PDM_SNPF(out_len, used, output + used,
4943
out_len - used, "path setting fail\n");
4944
}
4945
} else if (dm->dsde_sel == DET_CSI) {
4946
if (var1[1] < 8) {
4947
dm->csi_wgt = (u8)var1[1];
4948
PDM_SNPF(out_len, used, output + used,
4949
out_len - used, "CSI wgt %d\n",
4950
dm->csi_wgt);
4951
} else {
4952
PDM_SNPF(out_len, used, output + used,
4953
out_len - used,
4954
"CSI wgt setting fail\n");
4955
}
4956
}
4957
}
4958
4959
*_used = used;
4960
*_out_len = out_len;
4961
}
4962
#endif
4963
4964
struct phydm_command {
4965
char name[16];
4966
u8 id;
4967
};
4968
4969
enum PHYDM_CMD_ID {
4970
PHYDM_HELP,
4971
PHYDM_DEMO,
4972
PHYDM_RF_CMD,
4973
PHYDM_DIG,
4974
PHYDM_RA,
4975
PHYDM_PROFILE,
4976
PHYDM_ANTDIV,
4977
PHYDM_PATHDIV,
4978
PHYDM_DEBUG,
4979
PHYDM_MP_DEBUG,
4980
PHYDM_FW_DEBUG,
4981
PHYDM_SUPPORT_ABILITY,
4982
PHYDM_GET_TXAGC,
4983
PHYDM_SET_TXAGC,
4984
PHYDM_SMART_ANT,
4985
PHYDM_CH_BW,
4986
PHYDM_TRX_PATH,
4987
PHYDM_LA_MODE,
4988
PHYDM_DUMP_REG,
4989
PHYDM_AUTO_DBG,
4990
PHYDM_DD_DBG,
4991
PHYDM_BIG_JUMP,
4992
PHYDM_SHOW_RXRATE,
4993
PHYDM_NBI_EN,
4994
PHYDM_CSI_MASK_EN,
4995
PHYDM_DFS_DEBUG,
4996
PHYDM_DFS_HIST,
4997
PHYDM_NHM,
4998
PHYDM_CLM,
4999
PHYDM_FAHM,
5000
PHYDM_ENV_MNTR,
5001
PHYDM_BB_INFO,
5002
//PHYDM_TXBF,
5003
PHYDM_H2C,
5004
PHYDM_EXT_RF_E_CTRL,
5005
PHYDM_ADAPTIVE_SOML,
5006
PHYDM_PSD,
5007
PHYDM_DEBUG_PORT,
5008
PHYDM_DIS_HTSTF_CONTROL,
5009
PHYDM_CFO_TRK,
5010
PHYDM_ADAPTIVITY_DEBUG,
5011
PHYDM_DIS_DYM_ANT_WEIGHTING,
5012
PHYDM_FORECE_PT_STATE,
5013
PHYDM_STA_INFO,
5014
PHYDM_PAUSE_FUNC,
5015
PHYDM_PER_TONE_EVM,
5016
PHYDM_DYN_TXPWR,
5017
PHYDM_LNA_SAT,
5018
PHYDM_ANAPAR,
5019
PHYDM_CCK_RX_PATHDIV,
5020
PHYDM_BEAM_FORMING,
5021
PHYDM_REG_MONITOR,
5022
#if RTL8814B_SUPPORT
5023
PHYDM_SPUR_DETECT,
5024
#endif
5025
PHYDM_PHY_STATUS
5026
};
5027
5028
struct phydm_command phy_dm_ary[] = {
5029
{"-h", PHYDM_HELP}, /*@do not move this element to other position*/
5030
{"demo", PHYDM_DEMO}, /*@do not move this element to other position*/
5031
{"rf", PHYDM_RF_CMD},
5032
{"dig", PHYDM_DIG},
5033
{"ra", PHYDM_RA},
5034
{"profile", PHYDM_PROFILE},
5035
{"antdiv", PHYDM_ANTDIV},
5036
{"pathdiv", PHYDM_PATHDIV},
5037
{"dbg", PHYDM_DEBUG},
5038
{"mp_dbg", PHYDM_MP_DEBUG},
5039
{"fw_dbg", PHYDM_FW_DEBUG},
5040
{"ability", PHYDM_SUPPORT_ABILITY},
5041
{"get_txagc", PHYDM_GET_TXAGC},
5042
{"set_txagc", PHYDM_SET_TXAGC},
5043
{"smtant", PHYDM_SMART_ANT},
5044
{"ch_bw", PHYDM_CH_BW},
5045
{"trxpath", PHYDM_TRX_PATH},
5046
{"lamode", PHYDM_LA_MODE},
5047
{"dumpreg", PHYDM_DUMP_REG},
5048
{"auto_dbg", PHYDM_AUTO_DBG},
5049
{"dd_dbg", PHYDM_DD_DBG},
5050
{"bigjump", PHYDM_BIG_JUMP},
5051
{"rxrate", PHYDM_SHOW_RXRATE},
5052
{"nbi", PHYDM_NBI_EN},
5053
{"csi_mask", PHYDM_CSI_MASK_EN},
5054
{"dfs", PHYDM_DFS_DEBUG},
5055
{"dfs_hist", PHYDM_DFS_HIST},
5056
{"nhm", PHYDM_NHM},
5057
{"clm", PHYDM_CLM},
5058
{"fahm", PHYDM_FAHM},
5059
{"env_mntr", PHYDM_ENV_MNTR},
5060
{"bbinfo", PHYDM_BB_INFO},
5061
/*{"txbf", PHYDM_TXBF},*/
5062
{"h2c", PHYDM_H2C},
5063
{"ext_rfe", PHYDM_EXT_RF_E_CTRL},
5064
{"soml", PHYDM_ADAPTIVE_SOML},
5065
{"psd", PHYDM_PSD},
5066
{"dbgport", PHYDM_DEBUG_PORT},
5067
{"dis_htstf", PHYDM_DIS_HTSTF_CONTROL},
5068
{"cfo_trk", PHYDM_CFO_TRK},
5069
{"adapt_debug", PHYDM_ADAPTIVITY_DEBUG},
5070
{"dis_dym_ant_wgt", PHYDM_DIS_DYM_ANT_WEIGHTING},
5071
{"force_pt_state", PHYDM_FORECE_PT_STATE},
5072
{"sta_info", PHYDM_STA_INFO},
5073
{"pause", PHYDM_PAUSE_FUNC},
5074
{"evm", PHYDM_PER_TONE_EVM},
5075
{"dyn_txpwr", PHYDM_DYN_TXPWR},
5076
{"lna_sat", PHYDM_LNA_SAT},
5077
{"anapar", PHYDM_ANAPAR},
5078
{"cck_rx_pathdiv", PHYDM_CCK_RX_PATHDIV},
5079
{"bf", PHYDM_BEAM_FORMING},
5080
{"reg_mntr", PHYDM_REG_MONITOR},
5081
#if RTL8814B_SUPPORT
5082
{"spur_detect", PHYDM_SPUR_DETECT},
5083
#endif
5084
{"physts", PHYDM_PHY_STATUS}
5085
};
5086
5087
#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5088
5089
void phydm_cmd_parser(struct dm_struct *dm, char input[][MAX_ARGV],
5090
u32 input_num, u8 flag, char *output, u32 out_len)
5091
{
5092
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5093
u32 used = 0;
5094
u8 id = 0;
5095
u32 var1[10] = {0};
5096
u32 i;
5097
u32 phydm_ary_size = sizeof(phy_dm_ary) / sizeof(struct phydm_command);
5098
5099
if (flag == 0) {
5100
PDM_SNPF(out_len, used, output + used, out_len - used,
5101
"GET, nothing to print\n");
5102
return;
5103
}
5104
5105
PDM_SNPF(out_len, used, output + used, out_len - used, "\n");
5106
5107
/* Parsing Cmd ID */
5108
if (input_num) {
5109
for (i = 0; i < phydm_ary_size; i++) {
5110
if (strcmp(phy_dm_ary[i].name, input[0]) == 0) {
5111
id = phy_dm_ary[i].id;
5112
break;
5113
}
5114
}
5115
if (i == phydm_ary_size) {
5116
PDM_SNPF(out_len, used, output + used, out_len - used,
5117
"PHYDM command not found!\n");
5118
return;
5119
}
5120
}
5121
5122
switch (id) {
5123
case PHYDM_HELP: {
5124
PDM_SNPF(out_len, used, output + used, out_len - used,
5125
"BB cmd ==>\n");
5126
5127
for (i = 0; i < phydm_ary_size - 2; i++)
5128
PDM_SNPF(out_len, used, output + used, out_len - used,
5129
" %-5d: %s\n", i, phy_dm_ary[i + 2].name);
5130
} break;
5131
5132
case PHYDM_DEMO: { /*@echo demo 10 0x3a z abcde >cmd*/
5133
u32 directory = 0;
5134
5135
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
5136
char char_temp;
5137
#else
5138
u32 char_temp = ' ';
5139
#endif
5140
5141
PHYDM_SSCANF(input[1], DCMD_DECIMAL, &directory);
5142
PDM_SNPF(out_len, used, output + used, out_len - used,
5143
"Decimal value = %d\n", directory);
5144
PHYDM_SSCANF(input[2], DCMD_HEX, &directory);
5145
PDM_SNPF(out_len, used, output + used, out_len - used,
5146
"Hex value = 0x%x\n", directory);
5147
PHYDM_SSCANF(input[3], DCMD_CHAR, &char_temp);
5148
PDM_SNPF(out_len, used, output + used, out_len - used,
5149
"Char = %c\n", char_temp);
5150
PDM_SNPF(out_len, used, output + used, out_len - used,
5151
"String = %s\n", input[4]);
5152
} break;
5153
case PHYDM_RF_CMD:
5154
halrf_cmd_parser(dm, input, &used, output, &out_len, input_num);
5155
break;
5156
5157
case PHYDM_DIG:
5158
phydm_dig_debug(dm, input, &used, output, &out_len);
5159
break;
5160
5161
case PHYDM_RA:
5162
phydm_ra_debug(dm, input, &used, output, &out_len);
5163
break;
5164
5165
case PHYDM_ANTDIV:
5166
#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5167
phydm_antdiv_debug(dm, input, &used, output, &out_len);
5168
#endif
5169
break;
5170
5171
case PHYDM_PATHDIV:
5172
#if (defined(CONFIG_PATH_DIVERSITY))
5173
phydm_pathdiv_debug(dm, input, &used, output, &out_len);
5174
#endif
5175
break;
5176
5177
case PHYDM_DEBUG:
5178
phydm_debug_trace(dm, input, &used, output, &out_len);
5179
break;
5180
5181
case PHYDM_MP_DEBUG:
5182
phydm_mp_dbg(dm, input, &used, output, &out_len);
5183
break;
5184
5185
case PHYDM_FW_DEBUG:
5186
phydm_fw_debug_trace(dm, input, &used, output, &out_len);
5187
break;
5188
5189
case PHYDM_SUPPORT_ABILITY:
5190
phydm_supportability_en(dm, input, &used, output, &out_len);
5191
break;
5192
5193
case PHYDM_SMART_ANT:
5194
#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
5195
5196
#ifdef CONFIG_HL_SMART_ANTENNA_TYPE2
5197
phydm_hl_smt_ant_dbg_type2(dm, input, &used, output, &out_len);
5198
#elif (defined(CONFIG_HL_SMART_ANTENNA_TYPE1))
5199
phydm_hl_smart_ant_debug(dm, input, &used, output, &out_len);
5200
#endif
5201
5202
#elif (defined(CONFIG_CUMITEK_SMART_ANTENNA))
5203
phydm_cumitek_smt_ant_debug(dm, input, &used, output, &out_len);
5204
#endif
5205
5206
break;
5207
5208
case PHYDM_CH_BW:
5209
phydm_bw_ch_adjust(dm, input, &used, output, &out_len);
5210
break;
5211
5212
case PHYDM_PROFILE:
5213
phydm_basic_profile(dm, &used, output, &out_len);
5214
break;
5215
5216
case PHYDM_GET_TXAGC:
5217
phydm_get_txagc(dm, &used, output, &out_len);
5218
break;
5219
5220
case PHYDM_SET_TXAGC:
5221
phydm_set_txagc_dbg(dm, input, &used, output, &out_len);
5222
break;
5223
5224
case PHYDM_TRX_PATH:
5225
phydm_config_trx_path(dm, input, &used, output, &out_len);
5226
break;
5227
5228
case PHYDM_LA_MODE:
5229
#if (PHYDM_LA_MODE_SUPPORT)
5230
phydm_la_cmd(dm, input, &used, output, &out_len);
5231
#endif
5232
break;
5233
5234
case PHYDM_DUMP_REG:
5235
phydm_dump_reg(dm, input, &used, output, &out_len);
5236
break;
5237
5238
case PHYDM_BIG_JUMP:
5239
phydm_enable_big_jump(dm, input, &used, output, &out_len);
5240
break;
5241
5242
case PHYDM_AUTO_DBG:
5243
#ifdef PHYDM_AUTO_DEGBUG
5244
phydm_auto_dbg_console(dm, input, &used, output, &out_len);
5245
#endif
5246
break;
5247
5248
case PHYDM_DD_DBG:
5249
phydm_dd_dbg_dump(dm, input, &used, output, &out_len);
5250
break;
5251
5252
case PHYDM_SHOW_RXRATE:
5253
phydm_show_rx_rate(dm, input, &used, output, &out_len);
5254
break;
5255
5256
case PHYDM_NBI_EN:
5257
phydm_nbi_debug(dm, input, &used, output, &out_len);
5258
break;
5259
5260
case PHYDM_CSI_MASK_EN:
5261
phydm_csi_debug(dm, input, &used, output, &out_len);
5262
break;
5263
5264
#ifdef CONFIG_PHYDM_DFS_MASTER
5265
case PHYDM_DFS_DEBUG:
5266
phydm_dfs_debug(dm, input, &used, output, &out_len);
5267
break;
5268
5269
case PHYDM_DFS_HIST:
5270
phydm_dfs_hist_dbg(dm, input, &used, output, &out_len);
5271
break;
5272
#endif
5273
5274
case PHYDM_NHM:
5275
#ifdef NHM_SUPPORT
5276
phydm_nhm_dbg(dm, input, &used, output, &out_len);
5277
#endif
5278
break;
5279
5280
case PHYDM_CLM:
5281
#ifdef CLM_SUPPORT
5282
phydm_clm_dbg(dm, input, &used, output, &out_len);
5283
#endif
5284
break;
5285
5286
#ifdef FAHM_SUPPORT
5287
case PHYDM_FAHM:
5288
phydm_fahm_dbg(dm, input, &used, output, &out_len);
5289
break;
5290
#endif
5291
5292
case PHYDM_ENV_MNTR:
5293
phydm_env_mntr_dbg(dm, input, &used, output, &out_len);
5294
break;
5295
5296
case PHYDM_BB_INFO:
5297
phydm_bb_hw_dbg_info(dm, input, &used, output, &out_len);
5298
break;
5299
/*
5300
case PHYDM_TXBF: {
5301
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
5302
#ifdef PHYDM_BEAMFORMING_SUPPORT
5303
struct _RT_BEAMFORMING_INFO *beamforming_info = NULL;
5304
5305
beamforming_info = &dm->beamforming_info;
5306
5307
PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5308
if (var1[0] == 0) {
5309
beamforming_info->apply_v_matrix = false;
5310
beamforming_info->snding3ss = true;
5311
PDM_SNPF(out_len, used, output + used, out_len - used,
5312
"\r\n dont apply V matrix and 3SS 789 snding\n");
5313
} else if (var1[0] == 1) {
5314
beamforming_info->apply_v_matrix = true;
5315
beamforming_info->snding3ss = true;
5316
PDM_SNPF(out_len, used, output + used, out_len - used,
5317
"\r\n apply V matrix and 3SS 789 snding\n");
5318
} else if (var1[0] == 2) {
5319
beamforming_info->apply_v_matrix = true;
5320
beamforming_info->snding3ss = false;
5321
PDM_SNPF(out_len, used, output + used, out_len - used,
5322
"\r\n default txbf setting\n");
5323
} else
5324
PDM_SNPF(out_len, used, output + used, out_len - used,
5325
"\r\n unknown cmd!!\n");
5326
#endif
5327
#endif
5328
} break;
5329
*/
5330
case PHYDM_H2C:
5331
phydm_h2C_debug(dm, input, &used, output, &out_len);
5332
break;
5333
5334
case PHYDM_EXT_RF_E_CTRL:
5335
phydm_ext_rf_element_ctrl(dm, input, &used, output, &out_len);
5336
break;
5337
5338
case PHYDM_ADAPTIVE_SOML:
5339
#ifdef CONFIG_ADAPTIVE_SOML
5340
phydm_soml_debug(dm, input, &used, output, &out_len);
5341
#endif
5342
break;
5343
5344
case PHYDM_PSD:
5345
5346
#ifdef CONFIG_PSD_TOOL
5347
phydm_psd_debug(dm, input, &used, output, &out_len);
5348
#endif
5349
5350
break;
5351
5352
case PHYDM_DEBUG_PORT:
5353
phydm_print_dbgport(dm, input, &used, output, &out_len);
5354
break;
5355
5356
case PHYDM_DIS_HTSTF_CONTROL: {
5357
if (input[1])
5358
PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
5359
5360
if (var1[0] == 1) {
5361
/* setting being false is for debug */
5362
dm->bhtstfdisabled = true;
5363
PDM_SNPF(out_len, used, output + used, out_len - used,
5364
"Dynamic HT-STF Gain Control is Disable\n");
5365
} else {
5366
/* @default setting should be true,
5367
* always be dynamic control
5368
*/
5369
dm->bhtstfdisabled = false;
5370
PDM_SNPF(out_len, used, output + used, out_len - used,
5371
"Dynamic HT-STF Gain Control is Enable\n");
5372
}
5373
} break;
5374
5375
case PHYDM_CFO_TRK:
5376
phydm_cfo_tracking_debug(dm, input, &used, output, &out_len);
5377
break;
5378
5379
case PHYDM_ADAPTIVITY_DEBUG:
5380
#ifdef PHYDM_SUPPORT_ADAPTIVITY
5381
phydm_adaptivity_debug(dm, input, &used, output, &out_len);
5382
#endif
5383
break;
5384
5385
case PHYDM_DIS_DYM_ANT_WEIGHTING:
5386
#ifdef DYN_ANT_WEIGHTING_SUPPORT
5387
phydm_ant_weight_dbg(dm, input, &used, output, &out_len);
5388
#endif
5389
break;
5390
5391
case PHYDM_FORECE_PT_STATE:
5392
#ifdef PHYDM_POWER_TRAINING_SUPPORT
5393
phydm_pow_train_debug(dm, input, &used, output, &out_len);
5394
#endif
5395
break;
5396
5397
case PHYDM_STA_INFO:
5398
phydm_show_sta_info(dm, input, &used, output, &out_len);
5399
break;
5400
5401
case PHYDM_PAUSE_FUNC:
5402
phydm_pause_func_console(dm, input, &used, output, &out_len);
5403
break;
5404
5405
case PHYDM_PER_TONE_EVM:
5406
phydm_per_tone_evm(dm, input, &used, output, &out_len);
5407
break;
5408
5409
#ifdef CONFIG_DYNAMIC_TX_TWR
5410
case PHYDM_DYN_TXPWR:
5411
phydm_dtp_debug(dm, input, &used, output, &out_len);
5412
break;
5413
#endif
5414
5415
case PHYDM_LNA_SAT:
5416
#ifdef PHYDM_LNA_SAT_CHK_SUPPORT
5417
phydm_lna_sat_debug(dm, input, &used, output, &out_len);
5418
#endif
5419
break;
5420
5421
case PHYDM_ANAPAR:
5422
phydm_get_anapar_table(dm, &used, output, &out_len);
5423
break;
5424
case PHYDM_CCK_RX_PATHDIV:
5425
#ifdef PHYDM_CCK_RX_PATHDIV_SUPPORT
5426
phydm_cck_rx_pathdiv_dbg(dm, input, &used, output, &out_len);
5427
#endif
5428
break;
5429
5430
case PHYDM_BEAM_FORMING:
5431
#ifdef CONFIG_BB_TXBF_API
5432
phydm_bf_debug(dm, input, &used, output, &out_len);
5433
#endif
5434
break;
5435
case PHYDM_REG_MONITOR:
5436
phydm_reg_monitor(dm, input, &used, output, &out_len);
5437
break;
5438
5439
#if RTL8814B_SUPPORT
5440
case PHYDM_SPUR_DETECT:
5441
phydm_spur_detect_dbg(dm, input, &used, output, &out_len);
5442
break;
5443
#endif
5444
case PHYDM_PHY_STATUS:
5445
phydm_physts_dbg(dm, input, &used, output, &out_len);
5446
break;
5447
5448
default:
5449
PDM_SNPF(out_len, used, output + used, out_len - used,
5450
"Do not support this command\n");
5451
break;
5452
}
5453
#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5454
}
5455
5456
#if defined __ECOS || defined __ICCARM__
5457
#ifndef strsep
5458
char *strsep(char **s, const char *ct)
5459
{
5460
char *sbegin = *s;
5461
char *end;
5462
5463
if (!sbegin)
5464
return NULL;
5465
5466
end = strpbrk(sbegin, ct);
5467
if (end)
5468
*end++ = '\0';
5469
*s = end;
5470
return sbegin;
5471
}
5472
#endif
5473
#endif
5474
5475
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP | ODM_IOT))
5476
s32 phydm_cmd(struct dm_struct *dm, char *input, u32 in_len, u8 flag,
5477
char *output, u32 out_len)
5478
{
5479
char *token;
5480
u32 argc = 0;
5481
char argv[MAX_ARGC][MAX_ARGV];
5482
5483
do {
5484
token = strsep(&input, ", ");
5485
if (token) {
5486
if (strlen(token) <= MAX_ARGV)
5487
strcpy(argv[argc], token);
5488
5489
argc++;
5490
} else {
5491
break;
5492
}
5493
} while (argc < MAX_ARGC);
5494
5495
if (argc == 1)
5496
argv[0][strlen(argv[0]) - 1] = '\0';
5497
5498
phydm_cmd_parser(dm, argv, argc, flag, output, out_len);
5499
5500
return 0;
5501
}
5502
#endif
5503
5504
void phydm_fw_trace_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
5505
{
5506
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5507
struct dm_struct *dm = (struct dm_struct *)dm_void;
5508
5509
/*@u8 debug_trace_11byte[60];*/
5510
u8 freg_num, c2h_seq, buf_0 = 0;
5511
5512
if (!(dm->support_ic_type & PHYDM_IC_3081_SERIES))
5513
return;
5514
5515
if (cmd_len > 12 || cmd_len == 0) {
5516
pr_debug("[Warning] Error C2H cmd_len=%d\n", cmd_len);
5517
return;
5518
}
5519
5520
buf_0 = cmd_buf[0];
5521
freg_num = (buf_0 & 0xf);
5522
c2h_seq = (buf_0 & 0xf0) >> 4;
5523
5524
#if 0
5525
PHYDM_DBG(dm, DBG_FW_TRACE,
5526
"[FW debug message] freg_num = (( %d )), c2h_seq=(( %d ))\n",
5527
freg_num, c2h_seq);
5528
5529
strncpy(debug_trace_11byte, &cmd_buf[1], (cmd_len - 1));
5530
debug_trace_11byte[cmd_len - 1] = '\0';
5531
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] %s\n",
5532
debug_trace_11byte);
5533
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] cmd_len = (( %d ))\n",
5534
cmd_len);
5535
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW debug message] c2h_cmd_start=((%d))\n",
5536
dm->c2h_cmd_start);
5537
5538
PHYDM_DBG(dm, DBG_FW_TRACE, "pre_seq = (( %d )), current_seq=((%d))\n",
5539
dm->pre_c2h_seq, c2h_seq);
5540
PHYDM_DBG(dm, DBG_FW_TRACE, "fw_buff_is_enpty = (( %d ))\n",
5541
dm->fw_buff_is_enpty);
5542
#endif
5543
5544
if (c2h_seq != dm->pre_c2h_seq && dm->fw_buff_is_enpty == false) {
5545
dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5546
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW Dbg Queue Overflow] %s\n",
5547
dm->fw_debug_trace);
5548
dm->c2h_cmd_start = 0;
5549
}
5550
5551
if ((cmd_len - 1) > (60 - dm->c2h_cmd_start)) {
5552
dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5553
PHYDM_DBG(dm, DBG_FW_TRACE,
5554
"[FW Dbg Queue error: wrong C2H length] %s\n",
5555
dm->fw_debug_trace);
5556
dm->c2h_cmd_start = 0;
5557
return;
5558
}
5559
5560
strncpy((char *)&dm->fw_debug_trace[dm->c2h_cmd_start],
5561
(char *)&cmd_buf[1], (cmd_len - 1));
5562
dm->c2h_cmd_start += (cmd_len - 1);
5563
dm->fw_buff_is_enpty = false;
5564
5565
if (freg_num == 0 || dm->c2h_cmd_start >= 60) {
5566
if (dm->c2h_cmd_start < 60)
5567
dm->fw_debug_trace[dm->c2h_cmd_start] = '\0';
5568
else
5569
dm->fw_debug_trace[59] = '\0';
5570
5571
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n",
5572
dm->fw_debug_trace);
5573
#if 0
5574
/*@dbg_print("[FW DBG Msg] %s\n", dm->fw_debug_trace);*/
5575
#endif
5576
dm->c2h_cmd_start = 0;
5577
dm->fw_buff_is_enpty = true;
5578
}
5579
5580
dm->pre_c2h_seq = c2h_seq;
5581
#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5582
}
5583
5584
void phydm_fw_trace_handler_code(void *dm_void, u8 *buffer, u8 cmd_len)
5585
{
5586
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5587
struct dm_struct *dm = (struct dm_struct *)dm_void;
5588
u8 function = buffer[0];
5589
u8 dbg_num = buffer[1];
5590
u16 content_0 = (((u16)buffer[3]) << 8) | ((u16)buffer[2]);
5591
u16 content_1 = (((u16)buffer[5]) << 8) | ((u16)buffer[4]);
5592
u16 content_2 = (((u16)buffer[7]) << 8) | ((u16)buffer[6]);
5593
u16 content_3 = (((u16)buffer[9]) << 8) | ((u16)buffer[8]);
5594
u16 content_4 = (((u16)buffer[11]) << 8) | ((u16)buffer[10]);
5595
5596
if (cmd_len > 12)
5597
PHYDM_DBG(dm, DBG_FW_TRACE,
5598
"[FW Msg] Invalid cmd length (( %d )) >12\n",
5599
cmd_len);
5600
/*@--------------------------------------------*/
5601
#ifdef CONFIG_RA_FW_DBG_CODE
5602
if (function == RATE_DECISION) {
5603
if (dbg_num == 0) {
5604
if (content_0 == 1)
5605
PHYDM_DBG(dm, DBG_FW_TRACE,
5606
"[FW] RA_CNT=((%d)) Max_device=((%d))--------------------------->\n",
5607
content_1, content_2);
5608
else if (content_0 == 2)
5609
PHYDM_DBG(dm, DBG_FW_TRACE,
5610
"[FW] Check RA macid= ((%d)), MediaStatus=((%d)), Dis_RA=((%d)), try_bit=((0x%x))\n",
5611
content_1, content_2, content_3,
5612
content_4);
5613
else if (content_0 == 3)
5614
PHYDM_DBG(dm, DBG_FW_TRACE,
5615
"[FW] Check RA total=((%d)), drop=((0x%x)), TXRPT_TRY_bit=((%x)), bNoisy=((%x))\n",
5616
content_1, content_2, content_3,
5617
content_4);
5618
} else if (dbg_num == 1) {
5619
if (content_0 == 1)
5620
PHYDM_DBG(dm, DBG_FW_TRACE,
5621
"[FW] RTY[0,1,2,3]=[ %d , %d , %d , %d ]\n",
5622
content_1, content_2, content_3,
5623
content_4);
5624
else if (content_0 == 2) {
5625
PHYDM_DBG(dm, DBG_FW_TRACE,
5626
"[FW] RTY[4]=[ %d ], drop=(( %d )), total=(( %d )), current_rate=((0x %x ))",
5627
content_1, content_2, content_3,
5628
content_4);
5629
phydm_print_rate(dm, (u8)content_4,
5630
DBG_FW_TRACE);
5631
} else if (content_0 == 3)
5632
PHYDM_DBG(dm, DBG_FW_TRACE,
5633
"[FW] penality_idx=(( %d ))\n",
5634
content_1);
5635
else if (content_0 == 4)
5636
PHYDM_DBG(dm, DBG_FW_TRACE,
5637
"[FW] RSSI=(( %d )), ra_stage = (( %d ))\n",
5638
content_1, content_2);
5639
} else if (dbg_num == 3) {
5640
if (content_0 == 1)
5641
PHYDM_DBG(dm, DBG_FW_TRACE,
5642
"[FW] Fast_RA (( DOWN )) total=((%d)), total>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
5643
content_1, content_2, content_3,
5644
content_4);
5645
else if (content_0 == 2)
5646
PHYDM_DBG(dm, DBG_FW_TRACE,
5647
"[FW] Fast_RA (( UP )) total_acc=((%d)), total_acc>>1=((%d)), R4+R3+R2 = ((%d)), RateDownHold = ((%d))\n",
5648
content_1, content_2, content_3,
5649
content_4);
5650
else if (content_0 == 3)
5651
PHYDM_DBG(dm, DBG_FW_TRACE,
5652
"[FW] Fast_RA (( UP )) ((rate Down Hold)) RA_CNT=((%d))\n",
5653
content_1);
5654
else if (content_0 == 4)
5655
PHYDM_DBG(dm, DBG_FW_TRACE,
5656
"[FW] Fast_RA (( UP )) ((tota_accl<5 skip)) RA_CNT=((%d))\n",
5657
content_1);
5658
else if (content_0 == 8)
5659
PHYDM_DBG(dm, DBG_FW_TRACE,
5660
"[FW] Fast_RA (( Reset Tx Rpt )) RA_CNT=((%d))\n",
5661
content_1);
5662
} else if (dbg_num == 4) {
5663
if (content_0 == 3)
5664
PHYDM_DBG(dm, DBG_FW_TRACE,
5665
"[FW] RER_CNT PCR_ori =(( %d )), ratio_ori =(( %d )), pcr_updown_bitmap =(( 0x%x )), pcr_var_diff =(( %d ))\n",
5666
content_1, content_2, content_3,
5667
content_4);
5668
else if (content_0 == 4)
5669
PHYDM_DBG(dm, DBG_FW_TRACE,
5670
"[FW] pcr_shift_value =(( %s%d )), rate_down_threshold =(( %d )), rate_up_threshold =(( %d ))\n",
5671
((content_1) ? "+" : "-"), content_2,
5672
content_3, content_4);
5673
else if (content_0 == 5)
5674
PHYDM_DBG(dm, DBG_FW_TRACE,
5675
"[FW] pcr_mean =(( %d )), PCR_VAR =(( %d )), offset =(( %d )), decision_offset_p =(( %d ))\n",
5676
content_1, content_2, content_3,
5677
content_4);
5678
} else if (dbg_num == 5) {
5679
if (content_0 == 1)
5680
PHYDM_DBG(dm, DBG_FW_TRACE,
5681
"[FW] (( UP)) Nsc=(( %d )), N_High=(( %d )), RateUp_Waiting=(( %d )), RateUp_Fail=(( %d ))\n",
5682
content_1, content_2, content_3,
5683
content_4);
5684
else if (content_0 == 2)
5685
PHYDM_DBG(dm, DBG_FW_TRACE,
5686
"[FW] ((DOWN)) Nsc=(( %d )), N_Low=(( %d ))\n",
5687
content_1, content_2);
5688
else if (content_0 == 3)
5689
PHYDM_DBG(dm, DBG_FW_TRACE,
5690
"[FW] ((HOLD)) Nsc=((%d)), N_High=((%d)), N_Low=((%d)), Reset_CNT=((%d))\n",
5691
content_1, content_2, content_3,
5692
content_4);
5693
} else if (dbg_num == 0x60) {
5694
if (content_0 == 1)
5695
PHYDM_DBG(dm, DBG_FW_TRACE,
5696
"[FW] ((AP RPT)) macid=((%d)), BUPDATE[macid]=((%d))\n",
5697
content_1, content_2);
5698
else if (content_0 == 4)
5699
PHYDM_DBG(dm, DBG_FW_TRACE,
5700
"[FW] ((AP RPT)) pass=((%d)), rty_num=((%d)), drop=((%d)), total=((%d))\n",
5701
content_1, content_2, content_3,
5702
content_4);
5703
else if (content_0 == 5)
5704
PHYDM_DBG(dm, DBG_FW_TRACE,
5705
"[FW] ((AP RPT)) PASS=((%d)), RTY_NUM=((%d)), DROP=((%d)), TOTAL=((%d))\n",
5706
content_1, content_2, content_3,
5707
content_4);
5708
}
5709
} else if (function == INIT_RA_TABLE) {
5710
if (dbg_num == 3)
5711
PHYDM_DBG(dm, DBG_FW_TRACE,
5712
"[FW][INIT_RA_INFO] Ra_init, RA_SKIP_CNT = (( %d ))\n",
5713
content_0);
5714
} else if (function == RATE_UP) {
5715
if (dbg_num == 2) {
5716
if (content_0 == 1)
5717
PHYDM_DBG(dm, DBG_FW_TRACE,
5718
"[FW][RateUp] ((Highest rate->return)), macid=((%d)) Nsc=((%d))\n",
5719
content_1, content_2);
5720
} else if (dbg_num == 5) {
5721
if (content_0 == 0)
5722
PHYDM_DBG(dm, DBG_FW_TRACE,
5723
"[FW][RateUp] ((rate UP)), up_rate_tmp=((0x%x)), rate_idx=((0x%x)), SGI_en=((%d)), SGI=((%d))\n",
5724
content_1, content_2, content_3,
5725
content_4);
5726
else if (content_0 == 1)
5727
PHYDM_DBG(dm, DBG_FW_TRACE,
5728
"[FW][RateUp] ((rate UP)), rate_1=((0x%x)), rate_2=((0x%x)), BW=((%d)), Try_Bit=((%d))\n",
5729
content_1, content_2, content_3,
5730
content_4);
5731
}
5732
} else if (function == RATE_DOWN) {
5733
if (dbg_num == 5) {
5734
if (content_0 == 1)
5735
PHYDM_DBG(dm, DBG_FW_TRACE,
5736
"[FW][RateDownStep] ((rate Down)), macid=((%d)), rate1=((0x%x)), rate2=((0x%x)), BW=((%d))\n",
5737
content_1, content_2, content_3,
5738
content_4);
5739
}
5740
} else if (function == TRY_DONE) {
5741
if (dbg_num == 1) {
5742
if (content_0 == 1)
5743
PHYDM_DBG(dm, DBG_FW_TRACE,
5744
"[FW][Try Done] ((try succsess )) macid=((%d)), Try_Done_cnt=((%d))\n",
5745
content_1, content_2);
5746
} else if (dbg_num == 2) {
5747
if (content_0 == 1)
5748
PHYDM_DBG(dm, DBG_FW_TRACE,
5749
"[FW][Try Done] ((try)) macid=((%d)), Try_Done_cnt=((%d)), rate_2=((%d)), try_succes=((%d))\n",
5750
content_1, content_2, content_3,
5751
content_4);
5752
}
5753
} else if (function == RA_H2C) {
5754
if (dbg_num == 1) {
5755
if (content_0 == 0)
5756
PHYDM_DBG(dm, DBG_FW_TRACE,
5757
"[FW][H2C=0x49] fw_trace_en=((%d)), mode =((%d)), macid=((%d))\n",
5758
content_1, content_2, content_3);
5759
}
5760
} else if (function == F_RATE_AP_RPT) {
5761
if (dbg_num == 1) {
5762
if (content_0 == 1)
5763
PHYDM_DBG(dm, DBG_FW_TRACE,
5764
"[FW][AP RPT] ((1)), SPE_STATIS=((0x%x))---------->\n",
5765
content_3);
5766
} else if (dbg_num == 2) {
5767
if (content_0 == 1)
5768
PHYDM_DBG(dm, DBG_FW_TRACE,
5769
"[FW][AP RPT] RTY_all=((%d))\n",
5770
content_1);
5771
} else if (dbg_num == 3) {
5772
if (content_0 == 1)
5773
PHYDM_DBG(dm, DBG_FW_TRACE,
5774
"[FW][AP RPT] MACID1[%d], TOTAL=((%d)), RTY=((%d))\n",
5775
content_3, content_1, content_2);
5776
} else if (dbg_num == 4) {
5777
if (content_0 == 1)
5778
PHYDM_DBG(dm, DBG_FW_TRACE,
5779
"[FW][AP RPT] MACID2[%d], TOTAL=((%d)), RTY=((%d))\n",
5780
content_3, content_1, content_2);
5781
} else if (dbg_num == 5) {
5782
if (content_0 == 1)
5783
PHYDM_DBG(dm, DBG_FW_TRACE,
5784
"[FW][AP RPT] MACID1[%d], PASS=((%d)), DROP=((%d))\n",
5785
content_3, content_1, content_2);
5786
} else if (dbg_num == 6) {
5787
if (content_0 == 1)
5788
PHYDM_DBG(dm, DBG_FW_TRACE,
5789
"[FW][AP RPT] MACID2[%d],, PASS=((%d)), DROP=((%d))\n",
5790
content_3, content_1, content_2);
5791
}
5792
} else if (function == DBC_FW_CLM) {
5793
PHYDM_DBG(dm, DBG_FW_TRACE,
5794
"[FW][CLM][%d, %d] = {%d, %d, %d, %d}\n", dbg_num,
5795
content_0, content_1, content_2, content_3,
5796
content_4);
5797
} else {
5798
PHYDM_DBG(dm, DBG_FW_TRACE,
5799
"[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n",
5800
function, dbg_num, content_0, content_1, content_2,
5801
content_3, content_4);
5802
}
5803
#else
5804
PHYDM_DBG(dm, DBG_FW_TRACE,
5805
"[FW][general][%d, %d, %d] = {%d, %d, %d, %d}\n", function,
5806
dbg_num, content_0, content_1, content_2, content_3,
5807
content_4);
5808
#endif
5809
/*@--------------------------------------------*/
5810
5811
#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5812
}
5813
5814
void phydm_fw_trace_handler_8051(void *dm_void, u8 *buffer, u8 cmd_len)
5815
{
5816
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
5817
struct dm_struct *dm = (struct dm_struct *)dm_void;
5818
#if 0
5819
if (cmd_len >= 3)
5820
cmd_buf[cmd_len - 1] = '\0';
5821
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s\n", &cmd_buf[3]);
5822
#else
5823
5824
int i = 0;
5825
u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0;
5826
u8 extend_c2h_dbg_seq = 0;
5827
u8 fw_debug_trace[128];
5828
u8 *extend_c2h_dbg_content = 0;
5829
5830
if (cmd_len > 127)
5831
return;
5832
5833
extend_c2h_sub_id = buffer[0];
5834
extend_c2h_dbg_len = buffer[1];
5835
extend_c2h_dbg_content = buffer + 2; /*@DbgSeq+DbgContent for show HEX*/
5836
5837
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
5838
RT_DISP(FC2H, C2H_Summary, ("[Extend C2H packet], Extend_c2hSubId=0x%x, extend_c2h_dbg_len=%d\n",
5839
extend_c2h_sub_id, extend_c2h_dbg_len));
5840
5841
RT_DISP_DATA(FC2H, C2H_Summary, "[Extend C2H packet], Content Hex:", extend_c2h_dbg_content, cmd_len - 2);
5842
#endif
5843
5844
go_backfor_aggre_dbg_pkt:
5845
i = 0;
5846
extend_c2h_dbg_seq = buffer[2];
5847
extend_c2h_dbg_content = buffer + 3;
5848
5849
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
5850
RT_DISP(FC2H, C2H_Summary, ("[RTKFW, SEQ= %d] :", extend_c2h_dbg_seq));
5851
#endif
5852
5853
for (;; i++) {
5854
fw_debug_trace[i] = extend_c2h_dbg_content[i];
5855
if (extend_c2h_dbg_content[i + 1] == '\0') {
5856
fw_debug_trace[i + 1] = '\0';
5857
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
5858
&fw_debug_trace[0]);
5859
break;
5860
} else if (extend_c2h_dbg_content[i] == '\n') {
5861
fw_debug_trace[i + 1] = '\0';
5862
PHYDM_DBG(dm, DBG_FW_TRACE, "[FW DBG Msg] %s",
5863
&fw_debug_trace[0]);
5864
buffer = extend_c2h_dbg_content + i + 3;
5865
goto go_backfor_aggre_dbg_pkt;
5866
}
5867
}
5868
5869
#endif
5870
#endif /*@#ifdef CONFIG_PHYDM_DEBUG_FUNCTION*/
5871
}
5872
5873