CoCalc -- rtl8814a

GitHub Repository: nu11secur1ty/Kali-Linux
Path: blob/master/ALFA-W1F1/RTL8814AU/hal/rtl8814a/rtl8814a_phycfg.c
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/******************************************************************************
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 *
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 * Copyright(c) 2007 - 2017 Realtek Corporation.
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms of version 2 of the GNU General Public License as
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 * published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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 * more details.
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 *
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 *****************************************************************************/
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#define _RTL8814A_PHYCFG_C_
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/* #include <drv_types.h> */
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19
#include <rtl8814a_hal.h>
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#include "hal_com_h2c.h"
21

22
/*---------------------Define local function prototype-----------------------*/
23

24
/*----------------------------Function Body----------------------------------*/
25
/* 1   1. BB register R/W API */
26

27
u32
28
PHY_QueryBBReg8814A(
29
		PADAPTER	Adapter,
30
		u32		RegAddr,
31
		u32		BitMask
32
)
33
{
34
	u32	ReturnValue = 0, OriginalValue, BitShift;
35

36
#if (DISABLE_BB_RF == 1)
37
	return 0;
38
#endif
39

40
#if (SIC_ENABLE == 1)
41
	return SIC_QueryBBReg(Adapter, RegAddr, BitMask);
42
#endif
43

44
	OriginalValue = rtw_read32(Adapter, RegAddr);
45
	BitShift = PHY_CalculateBitShift(BitMask);
46
	ReturnValue = (OriginalValue & BitMask) >> BitShift;
47

48
	/* RTW_INFO("BBR MASK=0x%x Addr[0x%x]=0x%x\n", BitMask, RegAddr, OriginalValue); */
49

50
	return ReturnValue;
51
}
52

53

54
void
55
PHY_SetBBReg8814A(
56
		PADAPTER	Adapter,
57
		u32		RegAddr,
58
		u32		BitMask,
59
		u32		Data
60
)
61
{
62
	u32			OriginalValue, BitShift;
63

64
#if (DISABLE_BB_RF == 1)
65
	return;
66
#endif
67

68
#if (SIC_ENABLE == 1)
69
	SIC_SetBBReg(Adapter, RegAddr, BitMask, Data);
70
	return;
71
#endif
72

73
	if (BitMask != bMaskDWord) {
74
		/* if not "double word" write */
75
		OriginalValue = rtw_read32(Adapter, RegAddr);
76
		BitShift = PHY_CalculateBitShift(BitMask);
77
		Data = ((OriginalValue)&(~BitMask)) | (((Data << BitShift)) & BitMask);
78
	}
79

80
	rtw_write32(Adapter, RegAddr, Data);
81

82
	/* RTW_INFO("BBW MASK=0x%x Addr[0x%x]=0x%x\n", BitMask, RegAddr, Data); */
83
}
84

85

86

87
static	u32
88
phy_RFRead_8814A(
89
		PADAPTER		Adapter,
90
		enum rf_path		eRFPath,
91
		u32				RegAddr,
92
		u32				BitMask
93
)
94
{
95
	u32	DataAndAddr = 0;
96
	u32	Readback_Value, Direct_Addr;
97

98
	RegAddr &= 0xff;
99
	switch (eRFPath) {
100
	case RF_PATH_A:
101
		Direct_Addr = 0x2800 + RegAddr * 4;
102
		break;
103
	case RF_PATH_B:
104
		Direct_Addr = 0x2c00 + RegAddr * 4;
105
		break;
106
	case RF_PATH_C:
107
		Direct_Addr = 0x3800 + RegAddr * 4;
108
		break;
109
	case RF_PATH_D:
110
		Direct_Addr = 0x3c00 + RegAddr * 4;
111
		break;
112
	default: /* pathA */
113
		Direct_Addr = 0x2800 + RegAddr * 4;
114
		break;
115
	}
116

117

118
	BitMask &= bRFRegOffsetMask;
119

120
	Readback_Value = phy_query_bb_reg(Adapter, Direct_Addr, BitMask);
121
	/* RTW_INFO("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, RegAddr, Readback_Value); */
122

123
	return Readback_Value;
124
}
125

126

127
static	void
128
phy_RFWrite_8814A(
129
		PADAPTER		Adapter,
130
		enum rf_path		eRFPath,
131
		u32				Offset,
132
		u32				Data
133
)
134
{
135
	u32						DataAndAddr = 0;
136
	HAL_DATA_TYPE				*pHalData = GET_HAL_DATA(Adapter);
137
	BB_REGISTER_DEFINITION_T		*pPhyReg = &pHalData->PHYRegDef[eRFPath];
138

139
	/* 2009/06/17 MH We can not execute IO for power save or other accident mode. */
140
	/* if(RT_CANNOT_IO(Adapter)) */
141
	/* { */
142
	/* RT_DISP(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); */
143
	/* return; */
144
	/* } */
145

146
	Offset &= 0xff;
147

148
	/* Shadow Update */
149
	/* PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); */
150

151
	/* Put write addr in [27:20]  and write data in [19:00] */
152
	DataAndAddr = ((Offset << 20) | (Data & 0x000fffff)) & 0x0fffffff;
153

154
	/* Write Operation */
155
	phy_set_bb_reg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
156
	/* RTW_INFO("RFW-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr); */
157
}
158

159

160
u32
161
PHY_QueryRFReg8814A(
162
		PADAPTER		Adapter,
163
		enum rf_path		eRFPath,
164
		u32				RegAddr,
165
		u32				BitMask
166
)
167
{
168
	u32	Readback_Value;
169

170
#if (DISABLE_BB_RF == 1)
171
	return 0;
172
#endif
173

174
	Readback_Value = phy_RFRead_8814A(Adapter, eRFPath, RegAddr, BitMask);
175

176
	return Readback_Value;
177
}
178

179

180
void
181
PHY_SetRFReg8814A(
182
		PADAPTER		Adapter,
183
		enum rf_path		eRFPath,
184
		u32				RegAddr,
185
		u32				BitMask,
186
		u32				Data
187
)
188
{
189

190
#if (DISABLE_BB_RF == 1)
191
	return;
192
#endif
193

194
	if (BitMask == 0)
195
		return;
196

197
	RegAddr &= 0xff;
198
	/* RF data is 20 bits only */
199
	if (BitMask != bLSSIWrite_data_Jaguar) {
200
		u32			Original_Value, BitShift;
201

202
		Original_Value = phy_RFRead_8814A(Adapter, eRFPath, RegAddr, bLSSIWrite_data_Jaguar);
203
		BitShift =  PHY_CalculateBitShift(BitMask);
204
		Data = ((Original_Value)&(~BitMask)) | (Data << BitShift);
205
	}
206

207
	phy_RFWrite_8814A(Adapter, eRFPath, RegAddr, Data);
208

209

210
}
211

212
/*
213
 * 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt.
214
 *   */
215

216
s32 PHY_MACConfig8814(PADAPTER Adapter)
217
{
218
	int				rtStatus = _FAIL;
219
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
220

221
	/*  */
222
	/* Config MAC */
223
	/*  */
224
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
225
	rtStatus = phy_ConfigMACWithParaFile(Adapter, PHY_FILE_MAC_REG);
226
	if (rtStatus == _FAIL)
227
#endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */
228
	{
229
#ifdef CONFIG_EMBEDDED_FWIMG
230
		odm_config_mac_with_header_file(&pHalData->odmpriv);
231
		rtStatus = _SUCCESS;
232
#endif/* CONFIG_EMBEDDED_FWIMG */
233
	}
234

235
	return rtStatus;
236
}
237

238

239
static	void
240
phy_InitBBRFRegisterDefinition(
241
		PADAPTER		Adapter
242
)
243
{
244
	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
245

246
	/* RF Interface Sowrtware Control */
247
	pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
248
	pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */
249

250
	/* RF Interface Output (and Enable) */
251
	pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
252
	pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */
253

254
	/* RF Interface (Output and)  Enable */
255
	pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
256
	pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */
257

258
	if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) {
259
		pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rA_LSSIWrite_Jaguar; /* LSSI Parameter */
260
		pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rB_LSSIWrite_Jaguar;
261

262
		pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rHSSIRead_Jaguar;  /* wire control parameter2 */
263
		pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rHSSIRead_Jaguar;  /* wire control parameter2 */
264
	} else {
265
		pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
266
		pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
267

268
		pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;  /* wire control parameter2 */
269
		pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;  /* wire control parameter2 */
270
	}
271

272
	if (IS_HARDWARE_TYPE_8814A(Adapter)) {
273
		pHalData->PHYRegDef[RF_PATH_C].rf3wireOffset = rC_LSSIWrite_Jaguar2; /* LSSI Parameter */
274
		pHalData->PHYRegDef[RF_PATH_D].rf3wireOffset = rD_LSSIWrite_Jaguar2;
275

276
		pHalData->PHYRegDef[RF_PATH_C].rfHSSIPara2 = rHSSIRead_Jaguar;  /* wire control parameter2 */
277
		pHalData->PHYRegDef[RF_PATH_D].rfHSSIPara2 = rHSSIRead_Jaguar;  /* wire control parameter2 */
278
	}
279

280
	if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) {
281
		/* Tranceiver Readback LSSI/HSPI mode */
282
		pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rA_SIRead_Jaguar;
283
		pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rB_SIRead_Jaguar;
284
		pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = rA_PIRead_Jaguar;
285
		pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = rB_PIRead_Jaguar;
286
	} else {
287
		/* Tranceiver Readback LSSI/HSPI mode */
288
		pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
289
		pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
290
		pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
291
		pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
292
	}
293

294
	if (IS_HARDWARE_TYPE_8814A(Adapter)) {
295
		/* Tranceiver Readback LSSI/HSPI mode */
296
		pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rC_SIRead_Jaguar2;
297
		pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rD_SIRead_Jaguar2;
298
		pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rC_PIRead_Jaguar2;
299
		pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rD_PIRead_Jaguar2;
300
	}
301

302
	/* pHalData->bPhyValueInitReady=TRUE; */
303
}
304

305
void _rtw_config_trx_path_8814a(_adapter *adapter)
306
{
307
	enum rf_type rf_path = GET_HAL_RFPATH(adapter);
308

309
	/*config RF PATH*/
310
	switch (rf_path) {
311
	case RF_1T1R:
312
	case RF_2T4R:
313
	case RF_3T3R:
314
		/*RX CCK disable 2R CCA*/
315
		phy_set_bb_reg(adapter, rCCK0_FalseAlarmReport, BIT18|BIT22, 0);
316
		/*pathB tx on, path A/C/D tx off*/
317
		phy_set_bb_reg(adapter, rCCK_RX_Jaguar, 0xf0000000, 0x4);
318
		/*pathB rx*/
319
		phy_set_bb_reg(adapter, rCCK_RX_Jaguar, 0x0f000000, 0x5);
320
		break;
321
	default:
322
		/*RX CCK disable 2R CCA*/
323
		phy_set_bb_reg(adapter, rCCK0_FalseAlarmReport, BIT18|BIT22, 0);
324
		/*pathB tx on, path A/C/D tx off*/
325
		phy_set_bb_reg(adapter, rCCK_RX_Jaguar, 0xf0000000, 0x4);
326
		/*pathB rx*/
327
		phy_set_bb_reg(adapter, rCCK_RX_Jaguar, 0x0f000000, 0x5);
328
		RTW_INFO("%s, unknown rf_type: %d\n", __func__, rf_path);
329
		break;
330
	}
331
}
332

333
int
334
PHY_BBConfig8814(
335
		PADAPTER	Adapter
336
)
337
{
338
	int	rtStatus = _SUCCESS;
339
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
340
	u8	TmpU1B = 0;
341

342
	phy_InitBBRFRegisterDefinition(Adapter);
343

344
	/* . APLL_EN,,APLL_320_GATEB,APLL_320BIAS,  auto config by hw fsm after pfsm_go (0x4 bit 8) set */
345
	TmpU1B = PlatformEFIORead1Byte(Adapter, REG_SYS_FUNC_EN_8814A);
346

347
	if (IS_HARDWARE_TYPE_8814AU(Adapter))
348
		TmpU1B |= FEN_USBA;
349
	else if (IS_HARDWARE_TYPE_8814AE(Adapter))
350
		TmpU1B |= FEN_PCIEA;
351

352
	PlatformEFIOWrite1Byte(Adapter, REG_SYS_FUNC_EN, TmpU1B);
353

354
	TmpU1B = PlatformEFIORead1Byte(Adapter, 0x1002);
355
	PlatformEFIOWrite1Byte(Adapter, 0x1002, (TmpU1B | FEN_BB_GLB_RSTn | FEN_BBRSTB)); /* same with 8812 */
356

357
	/* 6. 0x1f[7:0] = 0x07 PathA RF Power On */
358
	PlatformEFIOWrite1Byte(Adapter, REG_RF_CTRL0_8814A , 0x07);/* RF_SDMRSTB,RF_RSTB,RF_EN same with 8723a */
359
	/* 7. 0x20[7:0] = 0x07 PathB RF Power On */
360
	/* 8. 0x21[7:0] = 0x07 PathC RF Power On */
361
	PlatformEFIOWrite2Byte(Adapter, REG_RF_CTRL1_8814A , 0x0707);/* RF_SDMRSTB,RF_RSTB,RF_EN same with 8723a    */
362
	/* 9. 0x76[7:0] = 0x07 PathD RF Power On */
363
	PlatformEFIOWrite1Byte(Adapter, REG_RF_CTRL3_8814A , 0x7);
364

365
	/*  */
366
	/* Config BB and AGC */
367
	/*  */
368
	rtStatus = phy_BB8814A_Config_ParaFile(Adapter);
369

370
	if (rtw_phydm_set_crystal_cap(Adapter, pHalData->crystal_cap) == _FALSE) {
371
		RTW_ERR("Init crystal_cap failed\n");
372
		rtw_warn_on(1);
373
		rtStatus = _FAIL;
374
	}
375
	_rtw_config_trx_path_8814a(Adapter);
376

377
	return rtStatus;
378
}
379

380
s32
381
phy_BB8814A_Config_ParaFile(
382
		PADAPTER	Adapter
383
)
384
{
385
	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
386
	int			rtStatus = _SUCCESS;
387

388
	/* Read PHY_REG.TXT BB INIT!! */
389
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
390
	if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_PHY_REG, CONFIG_BB_PHY_REG) == _FAIL)
391
#endif
392
	{
393
#ifdef CONFIG_EMBEDDED_FWIMG
394
		if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG))
395
			rtStatus = _FAIL;
396
#endif
397
	}
398

399
	if (rtStatus != _SUCCESS) {
400
		RTW_INFO("%s(): CONFIG_BB_PHY_REG Fail!!\n", __FUNCTION__);
401
		goto phy_BB_Config_ParaFile_Fail;
402
	}
403

404
	/* Read PHY_REG_MP.TXT BB INIT!! */
405
#if (MP_DRIVER == 1)
406
	if (Adapter->registrypriv.mp_mode == 1) {
407
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
408
		if (phy_ConfigBBWithMpParaFile(Adapter, PHY_FILE_PHY_REG_MP) == _FAIL)
409
#endif
410
		{
411
#ifdef CONFIG_EMBEDDED_FWIMG
412
			if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP))
413
				rtStatus = _FAIL;
414
#endif
415
		}
416

417
		if (rtStatus != _SUCCESS) {
418
			RTW_INFO("phy_BB8812_Config_ParaFile():Write BB Reg MP Fail!!\n");
419
			goto phy_BB_Config_ParaFile_Fail;
420
		}
421
	}
422
#endif	/*  #if (MP_DRIVER == 1) */
423

424
	/* BB AGC table Initialization */
425
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
426
	if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_AGC_TAB, CONFIG_BB_AGC_TAB) == _FAIL)
427
#endif
428
	{
429
#ifdef CONFIG_EMBEDDED_FWIMG
430
		if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_AGC_TAB))
431
			rtStatus = _FAIL;
432
#endif
433
	}
434

435
	if (rtStatus != _SUCCESS)
436
		RTW_INFO("%s(): CONFIG_BB_AGC_TAB Fail!!\n", __FUNCTION__);
437

438
phy_BB_Config_ParaFile_Fail:
439

440
	return rtStatus;
441

442
}
443

444

445
void
446
phy_ADC_CLK_8814A(
447
		PADAPTER	Adapter
448
)
449
{
450
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
451
	u32			MAC_REG_520, BB_REG_8FC, BB_REG_808, RXIQC[4];
452
	u32			Search_index = 0, MAC_Active = 1;
453
	u32			RXIQC_REG[2][4] = {{0xc10, 0xe10, 0x1810, 0x1a10}, {0xc14, 0xe14, 0x1814, 0x1a14}} ;
454

455
	if (GET_CVID_CUT_VERSION(pHalData->version_id) != A_CUT_VERSION)
456
		return;
457

458
	/* 1 Step1. MAC TX pause */
459
	MAC_REG_520 = phy_query_bb_reg(Adapter, 0x520, bMaskDWord);
460
	BB_REG_8FC = phy_query_bb_reg(Adapter, 0x8fc, bMaskDWord);
461
	BB_REG_808 = phy_query_bb_reg(Adapter, 0x808, bMaskDWord);
462
	phy_set_bb_reg(Adapter, 0x520, bMaskByte2, 0x3f);
463

464
	/* 1 Step 2. Backup RXIQC & RXIQC = 0 */
465
	for (Search_index = 0; Search_index < 4; Search_index++) {
466
		RXIQC[Search_index] = phy_query_bb_reg(Adapter, RXIQC_REG[0][Search_index], bMaskDWord);
467
		phy_set_bb_reg(Adapter, RXIQC_REG[0][Search_index], bMaskDWord, 0x0);
468
		phy_set_bb_reg(Adapter, RXIQC_REG[1][Search_index], bMaskDWord, 0x0);
469
	}
470
	phy_set_bb_reg(Adapter, 0xa14, 0x00000300, 0x3);
471
	Search_index = 0;
472

473
	/* 1 Step 3. Monitor MAC IDLE */
474
	phy_set_bb_reg(Adapter, 0x8fc, bMaskDWord, 0x0);
475
	while (MAC_Active) {
476
		MAC_Active = phy_query_bb_reg(Adapter, 0xfa0, bMaskDWord) & (0x803e0008);
477
		Search_index++;
478
		if (Search_index > 1000)
479
			break;
480
	}
481

482
	/* 1 Step 4. ADC clk flow */
483
	phy_set_bb_reg(Adapter, 0x808, bMaskByte0, 0x11);
484
	phy_set_bb_reg(Adapter, 0x90c, BIT(13), 0x1);
485
	phy_set_bb_reg(Adapter, 0x764, BIT(10) | BIT(9), 0x3);
486
	phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x1);
487

488
	/* 0xc1c/0xe1c/0x181c/0x1a1c[4] must=1 to ensure table can be written when bbrstb=0         */
489
	/* 0xc60/0xe60/0x1860/0x1a60[15] always = 1 after this line              */
490
	/* 0xc60/0xe60/0x1860/0x1a60[14] always = 0 bcz its error in A-cut          */
491

492
	/* power_off/clk_off @ anapar_state=idle mode */
493
	phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x15800002);	/* 0xc60       0x15808002    */
494
	phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x01808003);	/* 0xc60       0x01808003 */
495
	phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x15800002);	/* 0xe60      0x15808002    */
496
	phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x01808003);	/* 0xe60      0x01808003    */
497
	phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x15800002);	/* 0x1860    0x15808002    */
498
	phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x01808003);	/* 0x1860    0x01808003    */
499
	phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x15800002);	/* 0x1a60    0x15808002        */
500
	phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x01808003);	/* 0x1a60    0x01808003     */
501

502
	phy_set_bb_reg(Adapter, 0x764, BIT(10), 0x0);
503
	phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x0);
504
	phy_set_bb_reg(Adapter, 0xc5c, bMaskDWord,  0x0D080058);	/* 0xc5c       0x00080058   */ /* [19] =1 to turn off ADC  */
505
	phy_set_bb_reg(Adapter, 0xe5c, bMaskDWord,  0x0D080058);	/* 0xe5c       0x00080058   */ /* [19] =1 to turn off ADC     */
506
	phy_set_bb_reg(Adapter, 0x185c, bMaskDWord,  0x0D080058);	/* 0x185c     0x00080058  */ /* [19] =1 to turn off ADC    */
507
	phy_set_bb_reg(Adapter, 0x1a5c, bMaskDWord,  0x0D080058);	/* 0x1a5c     0x00080058  */ /* [19] =1 to turn off ADC       */
508

509
	/* power_on/clk_off */
510
	/* phy_set_bb_reg(Adapter, 0x764, BIT(10), 0x1); */
511
	phy_set_bb_reg(Adapter, 0xc5c, bMaskDWord,  0x0D000058);	/* 0xc5c       0x0D000058    */ /* [19] =0 to turn on ADC    */
512
	phy_set_bb_reg(Adapter, 0xe5c, bMaskDWord,  0x0D000058);	/* 0xe5c       0x0D000058   */ /* [19] =0 to turn on ADC     */
513
	phy_set_bb_reg(Adapter, 0x185c, bMaskDWord,  0x0D000058);	/* 0x185c     0x0D000058   */ /* [19] =0 to turn on ADC     */
514
	phy_set_bb_reg(Adapter, 0x1a5c, bMaskDWord,  0x0D000058);	/* 0x1a5c     0x0D000058  */ /* [19] =0 to turn on ADC       */
515

516
	/* power_on/clk_on @ anapar_state=BT mode */
517
	phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x05808032);	/* 0xc60 0x05808002 */
518
	phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x05808032);	/* 0xe60 0x05808002           */
519
	phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x05808032);	/* 0x1860 0x05808002    */
520
	phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x05808032);	/* 0x1a60 0x05808002            */
521
	phy_set_bb_reg(Adapter, 0x764, BIT(10), 0x1);
522
	phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x1);
523

524
	/* recover original setting @ anapar_state=BT mode                              */
525
	phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x05808032);	/* 0xc60       0x05808036    */
526
	phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x05808032);	/* 0xe60      0x05808036    */
527
	phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x05808032);	/* 0x1860    0x05808036    */
528
	phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x05808032);	/* 0x1a60    0x05808036        */
529

530
	phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x05800002);	/* 0xc60       0x05800002    */
531
	phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x07808003);	/* 0xc60       0x07808003 */
532
	phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x05800002);	/* 0xe60      0x05800002    */
533
	phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x07808003);	/* 0xe60      0x07808003    */
534
	phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x05800002);	/* 0x1860    0x05800002    */
535
	phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x07808003);	/* 0x1860    0x07808003    */
536
	phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x05800002);	/* 0x1a60    0x05800002        */
537
	phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x07808003);	/* 0x1a60    0x07808003     */
538

539
	phy_set_bb_reg(Adapter, 0x764, BIT(10) | BIT(9), 0x0);
540
	phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x0);
541
	phy_set_bb_reg(Adapter, 0x90c, BIT(13), 0x0);
542

543
	/* 1 Step 5. Recover MAC TX & IQC */
544
	phy_set_bb_reg(Adapter, 0x520, bMaskDWord, MAC_REG_520);
545
	phy_set_bb_reg(Adapter, 0x8fc, bMaskDWord, BB_REG_8FC);
546
	phy_set_bb_reg(Adapter, 0x808, bMaskDWord, BB_REG_808);
547
	for (Search_index = 0; Search_index < 4; Search_index++) {
548
		phy_set_bb_reg(Adapter, RXIQC_REG[0][Search_index], bMaskDWord, RXIQC[Search_index]);
549
		phy_set_bb_reg(Adapter, RXIQC_REG[1][Search_index], bMaskDWord, 0x01000000);
550
	}
551
	phy_set_bb_reg(Adapter, 0xa14, 0x00000300, 0x0);
552
}
553

554
void
555
PHY_ConfigBB_8814A(
556
		PADAPTER	Adapter
557
)
558
{
559

560
	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
561

562
	phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar | bCCKEN_Jaguar, 0x3);
563
}
564

565

566

567
/* 2 3.3 RF Config */
568

569
s32
570
PHY_RFConfig8814A(
571
		PADAPTER	Adapter
572
)
573
{
574
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
575
	int	rtStatus = _SUCCESS;
576

577
	/* vivi added this, 20100610 */
578
	if (rtw_is_surprise_removed(Adapter))
579
		return _FAIL;
580

581
	switch (pHalData->rf_chip) {
582
	case RF_PSEUDO_11N:
583
		RTW_INFO("%s(): RF_PSEUDO_11N\n", __FUNCTION__);
584
		break;
585
	default:
586
		rtStatus = PHY_RF6052_Config_8814A(Adapter);
587
		break;
588
	}
589

590
	return rtStatus;
591
}
592

593
/* 1 5. Tx  Power setting API */
594

595
void
596
phy_TxPwrAdjInPercentage(
597
	PADAPTER		Adapter,
598
	s16*			pTxPwrIdx)
599
{
600
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
601
	int txPower = *pTxPwrIdx + pHalData->CurrentTxPwrIdx - 18;
602

603
	*pTxPwrIdx = txPower > RF6052_MAX_TX_PWR ? RF6052_MAX_TX_PWR : txPower;
604
}
605

606

607
#if 0 //unused?
608
void
609
PHY_GetTxPowerLevel8814(
610
	IN	PADAPTER		Adapter,
611
	OUT s32*    		powerlevel
612
	)
613
{
614
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
615
	*powerlevel = pHalData->CurrentTxPwrIdx;
616
#if 0
617
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
618
	PMGNT_INFO		pMgntInfo = &(Adapter->MgntInfo);
619
	s4Byte			TxPwrDbm = 13;
620

621
	if ( pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM )
622
		*powerlevel = pMgntInfo->ClientConfigPwrInDbm;
623
	else
624
		*powerlevel = TxPwrDbm;
625
#endif //0
626
/*
627
	//PMPT_CONTEXT            pMptCtx = &(Adapter->mppriv.mpt_ctx);
628
	//u8 mgn_rate = mpt_to_mgnt_rate(HwRateToMPTRate(Adapter->mppriv.rateidx));
629
	*powerlevel=PHY_GetTxPowerIndex8814A(Adapter,RF_PATH_A ,MGN_MCS7, pHalData->current_channel_bw, pHalData->current_channel, NULL);
630
	*powerlevel/=2;
631
*/
632
}
633
#endif
634

635
void
636
PHY_SetTxPowerLevel8814(
637
		PADAPTER		Adapter,
638
		u8			Channel
639
)
640
{
641
	u32			i, j, k = 0;
642
	u32			value[264] = {0};
643
	u32			path = 0, PowerIndex, txagc_table_wd = 0x00801000;
644

645
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
646

647
	u8	jaguar2Rates[][4] =	{ {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M},
648
		{MGN_6M, MGN_9M, MGN_12M, MGN_18M},
649
		{MGN_24M, MGN_36M, MGN_48M, MGN_54M},
650
		{MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3},
651
		{MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7},
652
		{MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11},
653
		{MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15},
654
		{MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19},
655
		{MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23},
656
		{MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3},
657
		{MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7},
658
		{MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1},
659
		{MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5},
660
		{MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9},
661
		{MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3},
662
		{MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7},
663
		{MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, 0, 0}
664
	};
665

666

667
	for (path = RF_PATH_A; path <= RF_PATH_D; ++path)
668
		phy_set_tx_power_level_by_path(Adapter, Channel, (u8)path);
669
#if 0 /* todo H2C_TXPOWER_INDEX_OFFLOAD ? */
670
	if (Adapter->MgntInfo.bScanInProgress == FALSE &&  pHalData->RegFWOffload == 2)
671
		HalDownloadTxPowerLevel8814(Adapter, value);
672
#endif /* 0 */
673
}
674

675

676
/**************************************************************************************************************
677
 *   Description:
678
 *       The low-level interface to get the FINAL Tx Power Index , called  by both MP and Normal Driver.
679
 *
680
 *                                                                                    <20120830, Kordan>
681
 **************************************************************************************************************/
682
u8
683
PHY_GetTxPowerIndex8814A(
684
		PADAPTER		pAdapter,
685
		enum rf_path		RFPath,
686
		u8				Rate,
687
		u8				BandWidth,
688
		u8				Channel,
689
	struct txpwr_idx_comp *tic
690
)
691
{
692
	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
693
	struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter);
694
	s16 power_idx;
695
	u8 pg = 0;
696
	s8 by_rate_diff = 0, limit = 0, tpt_offset = 0;
697
	u8 ntx_idx = phy_get_current_tx_num(pAdapter, Rate);
698
	BOOLEAN bIn24G = FALSE;
699

700
	pg = phy_get_pg_txpwr_idx(pAdapter, RFPath, Rate, ntx_idx, BandWidth, Channel, &bIn24G);
701

702
	by_rate_diff = PHY_GetTxPowerByRate(pAdapter, (u8)(!bIn24G), RFPath, Rate);
703
	limit = PHY_GetTxPowerLimit(pAdapter, NULL, (u8)(!bIn24G), pHalData->current_channel_bw, RFPath, Rate, ntx_idx, pHalData->current_channel);
704

705
	/* tpt_offset += PHY_GetTxPowerTrackingOffset(pAdapter, RFPath, Rate); */
706

707
	if (tic)
708
		txpwr_idx_comp_set(tic, ntx_idx, pg, by_rate_diff, limit, tpt_offset, 0, 0, 0);
709

710
	by_rate_diff = by_rate_diff > limit ? limit : by_rate_diff;
711
	power_idx = pg + by_rate_diff + tpt_offset;
712

713
#if 0 /* todo ? */
714
#if CCX_SUPPORT
715
	CCX_CellPowerLimit(pAdapter, Channel, Rate, &power_idx);
716
#endif
717
#endif
718

719

720
	phy_TxPwrAdjInPercentage(pAdapter, &power_idx);
721

722
	if (power_idx < 0)
723
		power_idx = 0;
724
	else if (power_idx > hal_spec->txgi_max)
725
		power_idx = hal_spec->txgi_max;
726

727
	return power_idx;
728
}
729

730
u8
731
phy_get_tx_power_index_8814a(
732
		PADAPTER		pAdapter,
733
		enum rf_path		RFPath,
734
		u8				Rate,
735
		enum channel_width		BandWidth,
736
		u8				Channel
737
)
738
{
739
	return PHY_GetTxPowerIndex8814A(pAdapter, RFPath, Rate, BandWidth, Channel, NULL);
740
}
741

742
void
743
PHY_SetTxPowerIndex_8814A(
744
		PADAPTER		Adapter,
745
		u32				PowerIndex,
746
		enum rf_path		RFPath,
747
		u8				Rate
748
)
749
{
750
	u32	txagc_table_wd = 0x00801000;
751

752
	txagc_table_wd |= (RFPath << 8) | MRateToHwRate(Rate) | (PowerIndex << 24);
753
	phy_set_bb_reg(Adapter, 0x1998, bMaskDWord, txagc_table_wd);
754
	/* RTW_INFO("txagc_table_wd %x\n", txagc_table_wd); */
755
	if (Rate == MGN_1M) {
756
		phy_set_bb_reg(Adapter, 0x1998, bMaskDWord, txagc_table_wd);	/* first time to turn on the txagc table */
757
		/* second to write the addr0 */
758
	}
759
}
760

761
u32
762
PHY_GetTxBBSwing_8814A(
763
		PADAPTER	Adapter,
764
		BAND_TYPE	Band,
765
		enum rf_path	RFPath
766
)
767
{
768
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(GetDefaultAdapter(Adapter));
769
	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
770
	struct dm_rf_calibration_struct	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
771
	s8			bbSwing_2G = -1 * GetRegTxBBSwing_2G(Adapter);
772
	s8			bbSwing_5G = -1 * GetRegTxBBSwing_5G(Adapter);
773
	u32		out = 0x200;
774
	const s8		AUTO = -1;
775

776

777
	if (pHalData->bautoload_fail_flag) {
778
		if (Band == BAND_ON_2_4G) {
779
			pRFCalibrateInfo->bb_swing_diff_2g = bbSwing_2G;
780
			if (bbSwing_2G == 0)
781
				out = 0x200; /* 0 dB */
782
			else if (bbSwing_2G == -3)
783
				out = 0x16A; /* -3 dB */
784
			else if (bbSwing_2G == -6)
785
				out = 0x101; /* -6 dB */
786
			else if (bbSwing_2G == -9)
787
				out = 0x0B6; /* -9 dB */
788
			else {
789
				if (pHalData->ExternalPA_2G) {
790
					pRFCalibrateInfo->bb_swing_diff_2g = -3;
791
					out = 0x16A;
792
				} else {
793
					pRFCalibrateInfo->bb_swing_diff_2g = 0;
794
					out = 0x200;
795
				}
796
			}
797
		} else if (Band == BAND_ON_5G) {
798
			pRFCalibrateInfo->bb_swing_diff_5g = bbSwing_5G;
799
			if (bbSwing_5G == 0)
800
				out = 0x200; /* 0 dB */
801
			else if (bbSwing_5G == -3)
802
				out = 0x16A; /* -3 dB */
803
			else if (bbSwing_5G == -6)
804
				out = 0x101; /* -6 dB */
805
			else if (bbSwing_5G == -9)
806
				out = 0x0B6; /* -9 dB */
807
			else {
808
				if (pHalData->external_pa_5g) {
809
					pRFCalibrateInfo->bb_swing_diff_5g = -3;
810
					out = 0x16A;
811
				} else {
812
					pRFCalibrateInfo->bb_swing_diff_5g = 0;
813
					out = 0x200;
814
				}
815
			}
816
		} else {
817
			pRFCalibrateInfo->bb_swing_diff_2g = -3;
818
			pRFCalibrateInfo->bb_swing_diff_5g = -3;
819
			out = 0x16A; /* -3 dB */
820
		}
821
	} else {
822
		u32 swing = 0, onePathSwing = 0;
823

824
		if (Band == BAND_ON_2_4G) {
825
			if (GetRegTxBBSwing_2G(Adapter) == AUTO) {
826
				EFUSE_ShadowRead(Adapter, 1, EEPROM_TX_BBSWING_2G_8814, (u32 *)&swing);
827
				if (swing == 0xFF) {
828
					if (bbSwing_2G ==  0)
829
						swing = 0x00; /* 0 dB */
830
					else if (bbSwing_2G == -3)
831
						swing = 0x55; /* -3 dB */
832
					else if (bbSwing_2G == -6)
833
						swing = 0xAA; /* -6 dB */
834
					else if (bbSwing_2G == -9)
835
						swing = 0xFF; /* -9 dB */
836
					else
837
						swing = 0x00;
838
				}
839
			} else if (bbSwing_2G ==  0)
840
				swing = 0x00; /* 0 dB */
841
			else if (bbSwing_2G == -3)
842
				swing = 0x55; /* -3 dB */
843
			else if (bbSwing_2G == -6)
844
				swing = 0xAA; /* -6 dB */
845
			else if (bbSwing_2G == -9)
846
				swing = 0xFF; /* -9 dB */
847
			else
848
				swing = 0x00;
849
		} else {
850
			if (GetRegTxBBSwing_5G(Adapter) == AUTO) {
851
				EFUSE_ShadowRead(Adapter, 1, EEPROM_TX_BBSWING_5G_8814, (u32 *)&swing);
852
				if (swing == 0xFF) {
853
					if (bbSwing_5G ==  0)
854
						swing = 0x00; /* 0 dB */
855
					else if (bbSwing_5G == -3)
856
						swing = 0x55; /* -3 dB */
857
					else if (bbSwing_5G == -6)
858
						swing = 0xAA; /* -6 dB */
859
					else if (bbSwing_5G == -9)
860
						swing = 0xFF; /* -9 dB */
861
					else
862
						swing = 0x00;
863
				}
864
			} else if (bbSwing_5G ==  0)
865
				swing = 0x00; /* 0 dB */
866
			else if (bbSwing_5G == -3)
867
				swing = 0x55; /* -3 dB */
868
			else if (bbSwing_5G == -6)
869
				swing = 0xAA; /* -6 dB */
870
			else if (bbSwing_5G == -9)
871
				swing = 0xFF; /* -9 dB */
872
			else
873
				swing = 0x00;
874
		}
875

876
		if (RFPath == RF_PATH_A)
877
			onePathSwing = (swing & 0x3) >> 0; /* 0xC6/C7[1:0] */
878
		else if (RFPath == RF_PATH_B)
879
			onePathSwing = (swing & 0xC) >> 2; /* 0xC6/C7[3:2] */
880
		else if (RFPath == RF_PATH_C)
881
			onePathSwing = (swing & 0x30) >> 4; /* 0xC6/C7[5:4] */
882
		else if (RFPath == RF_PATH_D)
883
			onePathSwing = (swing & 0xC0) >> 6; /* 0xC6/C7[7:6] */
884

885
		if (onePathSwing == 0x0) {
886
			if (Band == BAND_ON_2_4G)
887
				pRFCalibrateInfo->bb_swing_diff_2g = 0;
888
			else
889
				pRFCalibrateInfo->bb_swing_diff_5g = 0;
890
			out = 0x200; /* 0 dB */
891
		} else if (onePathSwing == 0x1) {
892
			if (Band == BAND_ON_2_4G)
893
				pRFCalibrateInfo->bb_swing_diff_2g = -3;
894
			else
895
				pRFCalibrateInfo->bb_swing_diff_5g = -3;
896
			out = 0x16A; /* -3 dB */
897
		} else if (onePathSwing == 0x2) {
898
			if (Band == BAND_ON_2_4G)
899
				pRFCalibrateInfo->bb_swing_diff_2g = -6;
900
			else
901
				pRFCalibrateInfo->bb_swing_diff_5g = -6;
902
			out = 0x101; /* -6 dB */
903
		} else if (onePathSwing == 0x3) {
904
			if (Band == BAND_ON_2_4G)
905
				pRFCalibrateInfo->bb_swing_diff_2g = -9;
906
			else
907
				pRFCalibrateInfo->bb_swing_diff_5g = -9;
908
			out = 0x0B6; /* -9 dB */
909
		}
910
	}
911
	return out;
912
}
913

914

915
/* 1 7. BandWidth setting API */
916

917
void
918
phy_SetBwRegAdc_8814A(
919
		PADAPTER		Adapter,
920
		u8			Band,
921
		enum channel_width	CurrentBW
922
)
923
{
924
	switch (CurrentBW) {
925
	case CHANNEL_WIDTH_20:
926
		if (Band == BAND_ON_5G) {
927
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1) | BIT(0), 0x0);	/* 0x8ac[28, 21,20,16, 9:6,1,0]=10'b10_0011_0000 */
928
		} else {
929
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1) | BIT(0), 0x0);	/* 0x8ac[28, 21,20,16, 9:6,1,0]=10'b10_0101_0000 */
930
		}
931
		break;
932

933
	case CHANNEL_WIDTH_40:
934
		if (Band == BAND_ON_5G) {
935
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1) | BIT(0), 0x1);		/* 0x8ac[17, 11, 10, 7:6,1,0]=7'b100_0001 */
936
		} else {
937
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1) | BIT(0), 0x1);		/* 0x8ac[17, 11, 10, 7:6,1,0]=7'b101_0001 */
938
		}
939
		break;
940

941
	case CHANNEL_WIDTH_80:
942
		phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1) | BIT(0), 0x02);				/* 0x8ac[7:6,1,0]=4'b0010 */
943
		break;
944

945
	default:
946
		RT_DISP(FPHY, PHY_BBW, ("phy_SetBwRegAdc_8814A():	unknown Bandwidth: %#X\n", CurrentBW));
947
		break;
948
	}
949
}
950

951

952
void
953
phy_SetBwRegAgc_8814A(
954
		PADAPTER		Adapter,
955
		u8			Band,
956
		enum channel_width	CurrentBW
957
)
958
{
959
	u32 AgcValue = 7;
960
	switch (CurrentBW) {
961
	case CHANNEL_WIDTH_20:
962
		if (Band == BAND_ON_5G)
963
			AgcValue = 6;
964
		else
965
			AgcValue = 6;
966
		break;
967

968
	case CHANNEL_WIDTH_40:
969
		if (Band == BAND_ON_5G)
970
			AgcValue = 8;
971
		else
972
			AgcValue = 7;
973
		break;
974

975
	case CHANNEL_WIDTH_80:
976
		AgcValue = 3;
977
		break;
978

979
	default:
980
		RT_DISP(FPHY, PHY_BBW, ("phy_SetBwRegAgc_8814A():	unknown Bandwidth: %#X\n", CurrentBW));
981
		break;
982
	}
983

984
	phy_set_bb_reg(Adapter, rAGC_table_Jaguar, 0xf000, AgcValue);	/* 0x82C[15:12] = AgcValue				 */
985
}
986

987

988
BOOLEAN
989
phy_SwBand8814A(
990
		PADAPTER	pAdapter,
991
		u8			channelToSW)
992
{
993
	u8			u1Btmp;
994
	BOOLEAN		ret_value = _TRUE;
995
	u8			Band = BAND_ON_5G, BandToSW;
996

997
	u1Btmp = rtw_read8(pAdapter, REG_CCK_CHECK_8814A);
998
	if (u1Btmp & BIT7)
999
		Band = BAND_ON_5G;
1000
	else
1001
		Band = BAND_ON_2_4G;
1002

1003
	/* Use current channel to judge Band Type and switch Band if need. */
1004
	if (channelToSW > 14)
1005
		BandToSW = BAND_ON_5G;
1006
	else
1007
		BandToSW = BAND_ON_2_4G;
1008

1009
	if (BandToSW != Band)
1010
		PHY_SwitchWirelessBand8814A(pAdapter, BandToSW);
1011

1012
	return ret_value;
1013
}
1014

1015

1016
void
1017
PHY_SetRFEReg8814A(
1018
		PADAPTER		Adapter,
1019
		BOOLEAN		bInit,
1020
		u8		Band
1021
)
1022
{
1023
	u8			u1tmp = 0;
1024
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
1025

1026
	if (bInit) {
1027
		switch (pHalData->rfe_type) {
1028
		case 2:
1029
		case 1:
1030
			phy_set_bb_reg(Adapter, 0x1994, 0xf, 0xf);								/* 0x1994[3:0] = 0xf */
1031
			u1tmp = PlatformEFIORead1Byte(Adapter, REG_GPIO_IO_SEL_8814A);
1032
			rtw_write8(Adapter, REG_GPIO_IO_SEL_8814A, u1tmp | 0xf0);	/* 0x40[23:20] = 0xf */
1033
			break;
1034
		case 0:
1035
			phy_set_bb_reg(Adapter, 0x1994, 0xf, 0xf);								/* 0x1994[3:0] = 0xf */
1036
			u1tmp = PlatformEFIORead1Byte(Adapter, REG_GPIO_IO_SEL_8814A);
1037
			rtw_write8(Adapter, REG_GPIO_IO_SEL_8814A, u1tmp | 0xc0);	/* 0x40[23:22] = 2b'11 */
1038
			break;
1039
		}
1040
	} else if (Band == BAND_ON_2_4G) {
1041
		switch (pHalData->rfe_type) {
1042
		case 2:
1043
			phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x72707270);	/* 0xCB0 = 0x72707270 */
1044
			phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x72707270);	/* 0xEB0 = 0x72707270 */
1045
			phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x72707270);	/* 0x18B4 = 0x72707270 */
1046
			phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77707770);	/* 0x1AB4 = 0x77707770 */
1047
			if (pHalData->EEPROMBluetoothCoexist == FALSE) /*WiFi*/
1048
				phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x72);		/* 0x1ABC[27:20] = 0x72 */
1049
			break;
1050

1051
		case 1:
1052
			phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);	/* 0xCB0 = 0x77777777 */
1053
			phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);	/* 0xEB0 = 0x77777777 */
1054
			phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);	/* 0x18B4 = 0x77777777 */
1055
			phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);	/* 0x1AB4 = 0x77777777 */
1056
			if (pHalData->EEPROMBluetoothCoexist == FALSE) /*WiFi*/
1057
				phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x77);		/* 0x1ABC[27:20] = 0x77 */
1058
			break;
1059

1060
		case 0:
1061
		default:
1062
			phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);	/* 0xCB0 = 0x77777777 */
1063
			phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);	/* 0xEB0 = 0x77777777 */
1064
			phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777);	/* 0x18B4 = 0x77777777 */
1065
			if (pHalData->EEPROMBluetoothCoexist == FALSE) /*WiFi*/
1066
				phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x77);		/* 0x1ABC[27:20] = 0x77 */
1067
			break;
1068

1069
		}
1070
	} else {
1071
		switch (pHalData->rfe_type) {
1072
		case 2:
1073
			phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x37173717);	/* 0xCB0 = 0x37173717 */
1074
			phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x37173717);	/* 0xEB0 = 0x37173717 */
1075
			phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x37173717);	/* 0x18B4 = 0x37173717 */
1076
			phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77177717);	/* 0x1AB4 = 0x77177717 */
1077
			if (pHalData->EEPROMBluetoothCoexist == FALSE) /*WiFi*/
1078
				phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x37);		/* 0x1ABC[27:20] = 0x37 */
1079
			break;
1080

1081
		case 1:
1082
			phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173317);	/* 0xCB0 = 0x33173317 */
1083
			phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173317);	/* 0xEB0 = 0x33173317 */
1084
			phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173317);	/* 0x18B4 = 0x33173317 */
1085
			phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77177717);	/* 0x1AB4 = 0x77177717 */
1086
			if (pHalData->EEPROMBluetoothCoexist == FALSE) /*WiFi*/
1087
				phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x33);		/* 0x1ABC[27:20] = 0x33 */
1088
			break;
1089

1090
		case 0:
1091
		default:
1092
			phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477);	/* 0xCB0 = 0x54775477 */
1093
			phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477);	/* 0xEB0 = 0x54775477 */
1094
			phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477);	/* 0x18B4 = 0x54775477 */
1095
			phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477);	/* 0x1AB4 = 0x54775477 */
1096
			if (pHalData->EEPROMBluetoothCoexist == FALSE) /*WiFi*/
1097
				phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x54);		/* 0x1ABC[27:20] = 0x54 */
1098
			break;
1099
		}
1100
	}
1101
}
1102

1103
void
1104
phy_SetBBSwingByBand_8814A(
1105
		PADAPTER		Adapter,
1106
		u8		Band,
1107
		u8		PreviousBand
1108
)
1109
{
1110
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
1111

1112
	s8			BBDiffBetweenBand = 0;
1113
	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
1114
	struct dm_rf_calibration_struct	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
1115

1116
	phy_set_bb_reg(Adapter, rA_TxScale_Jaguar, 0xFFE00000,
1117
		PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_A)); /* 0xC1C[31:21] */
1118
	phy_set_bb_reg(Adapter, rB_TxScale_Jaguar, 0xFFE00000,
1119
		PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_B)); /* 0xE1C[31:21] */
1120
	phy_set_bb_reg(Adapter, rC_TxScale_Jaguar2, 0xFFE00000,
1121
		PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_C)); /* 0x181C[31:21] */
1122
	phy_set_bb_reg(Adapter, rD_TxScale_Jaguar2, 0xFFE00000,
1123
		PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_D)); /* 0x1A1C[31:21] */
1124

1125
	/* <20121005, Kordan> When TxPowerTrack is ON, we should take care of the change of BB swing. */
1126
	/* That is, reset all info to trigger Tx power tracking. */
1127

1128
	if (Band != PreviousBand) {
1129
		BBDiffBetweenBand = (pRFCalibrateInfo->bb_swing_diff_2g - pRFCalibrateInfo->bb_swing_diff_5g);
1130
		BBDiffBetweenBand = (Band == BAND_ON_2_4G) ? BBDiffBetweenBand : (-1 * BBDiffBetweenBand);
1131
		pRFCalibrateInfo->default_ofdm_index += BBDiffBetweenBand * 2;
1132
	}
1133

1134
	odm_clear_txpowertracking_state(pDM_Odm);
1135
}
1136

1137

1138
s32
1139
PHY_SwitchWirelessBand8814A(
1140
		PADAPTER		Adapter,
1141
		u8		Band
1142
)
1143
{
1144
	HAL_DATA_TYPE	*pHalData	= GET_HAL_DATA(Adapter);
1145
	u8	PreBand = pHalData->current_band_type, tepReg = 0;
1146

1147
	//RTW_INFO("==>PHY_SwitchWirelessBand8814() %s\n", ((Band == 0) ? "2.4G" : "5G"));
1148

1149
	pHalData->current_band_type = (BAND_TYPE)Band;
1150

1151
#ifdef CONFIG_BT_COEXIST
1152
		if (pHalData->EEPROMBluetoothCoexist) {
1153
			struct mlme_ext_priv *mlmeext;
1154

1155
			/* switch band under site survey or not, must notify to BT COEX */
1156
			mlmeext = &Adapter->mlmeextpriv;
1157
			if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE)
1158
				rtw_btcoex_switchband_notify(_TRUE, pHalData->current_band_type);
1159
			else
1160
				rtw_btcoex_switchband_notify(_FALSE, pHalData->current_band_type);
1161
		} else
1162
			rtw_btcoex_wifionly_switchband_notify(Adapter);
1163
#else /* !CONFIG_BT_COEXIST */
1164
		rtw_btcoex_wifionly_switchband_notify(Adapter);
1165
#endif /* CONFIG_BT_COEXIST */
1166

1167
	/*clear 0x1000[16],	When this bit is set to 0, CCK and OFDM are disabled, and clock are gated. Otherwise, CCK and OFDM are enabled. */
1168
	tepReg = rtw_read8(Adapter, REG_SYS_CFG3_8814A + 2);
1169
	rtw_write8(Adapter, REG_SYS_CFG3_8814A + 2, tepReg & (~BIT0));
1170

1171
	/* STOP Tx/Rx */
1172
	/* phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x00);	 */
1173

1174
	if (Band == BAND_ON_2_4G) {
1175
		/* 2.4G band */
1176

1177
		/* AGC table select */
1178
		phy_set_bb_reg(Adapter, rAGC_table_Jaguar2, 0x1F, 0);									/* 0x958[4:0] = 5b'00000 */
1179

1180
		PHY_SetRFEReg8814A(Adapter, FALSE, Band);
1181

1182
		/* cck_enable */
1183
		/* phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x3); */
1184

1185
		if (Adapter->registrypriv.mp_mode == 0) {
1186
			/* 0x80C & 0xa04 must set the same value. */
1187
			phy_set_bb_reg(Adapter, rTxPath_Jaguar, 0xf0, 0x2);
1188
			phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0x5);
1189
		}
1190

1191
		phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar | bCCKEN_Jaguar, 0x3);
1192

1193

1194
		/* CCK_CHECK_en */
1195
		rtw_write8(Adapter, REG_CCK_CHECK_8814A, 0x0);
1196
		/* after 5G swicth 2G , set A82[2] = 0 */
1197
		phy_set_bb_reg(Adapter, 0xa80, BIT18, 0x0);
1198

1199
	} else {	/* 5G band */
1200
		/* CCK_CHECK_en */
1201
		rtw_write8(Adapter, REG_CCK_CHECK_8814A, 0x80);
1202
		/* Enable CCK Tx function, even when CCK is off */
1203
		phy_set_bb_reg(Adapter, 0xa80, BIT18, 0x1);
1204

1205
		/* AGC table select */
1206
		/* Postpone to channel switch */
1207
		/* phy_set_bb_reg(Adapter, rAGC_table_Jaguar2, 0x1F, 1);									 */ /* 0x958[4:0] = 5b'00001 */
1208

1209
		PHY_SetRFEReg8814A(Adapter, FALSE, Band);
1210

1211
		if (Adapter->registrypriv.mp_mode == 0) {
1212
			phy_set_bb_reg(Adapter, rTxPath_Jaguar, 0xf0, 0x0);
1213
			phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0xF);
1214
		}
1215

1216
		phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar | bCCKEN_Jaguar, 0x02);
1217
		/* RTW_INFO("==>PHY_SwitchWirelessBand8814() BAND_ON_5G settings OFDM index 0x%x\n", pHalData->OFDM_index[0]); */
1218
	}
1219

1220
	phy_SetBBSwingByBand_8814A(Adapter, Band, PreBand);
1221
	phy_SetBwRegAdc_8814A(Adapter, Band, pHalData->current_channel_bw);
1222
	phy_SetBwRegAgc_8814A(Adapter, Band, pHalData->current_channel_bw);
1223
	/* set 0x1000[16], When this bit is set to 0, CCK and OFDM are disabled, and clock are gated. Otherwise, CCK and OFDM are enabled.*/
1224
	tepReg = rtw_read8(Adapter, REG_SYS_CFG3_8814A + 2);
1225
	rtw_write8(Adapter, REG_SYS_CFG3_8814A + 2, tepReg | BIT0);
1226

1227
	RTW_INFO("<==PHY_SwitchWirelessBand8814():Switch Band OK.\n");
1228
	return _SUCCESS;
1229
}
1230

1231

1232
u8
1233
phy_GetSecondaryChnl_8814A(
1234
		PADAPTER	Adapter
1235
)
1236
{
1237
	u8						SCSettingOf40 = 0, SCSettingOf20 = 0;
1238
	PHAL_DATA_TYPE				pHalData = GET_HAL_DATA(Adapter);
1239

1240
	/* RTW_INFO("SCMapping: Case: pHalData->current_channel_bw %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d\n",pHalData->current_channel_bw,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC); */
1241
	if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) {
1242
		if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
1243
			SCSettingOf40 = VHT_DATA_SC_40_LOWER_OF_80MHZ;
1244
		else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
1245
			SCSettingOf40 = VHT_DATA_SC_40_UPPER_OF_80MHZ;
1246
		else
1247
			RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
1248

1249
		if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
1250
			SCSettingOf20 = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
1251
		else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
1252
			SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ;
1253
		else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
1254
			SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ;
1255
		else if ((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
1256
			SCSettingOf20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
1257
		else {
1258
			if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
1259
				SCSettingOf20 = VHT_DATA_SC_40_LOWER_OF_80MHZ;
1260
			else if (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
1261
				SCSettingOf20 = VHT_DATA_SC_40_UPPER_OF_80MHZ;
1262
			else
1263
				RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
1264
		}
1265
	} else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) {
1266
		RTW_INFO("SCMapping: pHalData->current_channel_bw %d, pHalData->nCur40MhzPrimeSC %d\n", pHalData->current_channel_bw, pHalData->nCur40MhzPrimeSC);
1267

1268
		if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
1269
			SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ;
1270
		else if (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
1271
			SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ;
1272
		else
1273
			RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
1274
	}
1275

1276
	/*RTW_INFO("SCMapping: SC Value %x\n", ((SCSettingOf40 << 4) | SCSettingOf20));*/
1277
	return (SCSettingOf40 << 4) | SCSettingOf20;
1278
}
1279

1280

1281
void
1282
phy_SetBwRegMac_8814A(
1283
		PADAPTER		Adapter,
1284
	enum channel_width	CurrentBW
1285
)
1286
{
1287
	u16		RegRfMod_BW, u2tmp = 0;
1288
	RegRfMod_BW = PlatformEFIORead2Byte(Adapter, REG_TRXPTCL_CTL_8814A);
1289

1290
	switch (CurrentBW) {
1291
	case CHANNEL_WIDTH_20:
1292
		PlatformEFIOWrite2Byte(Adapter, REG_TRXPTCL_CTL_8814A, (RegRfMod_BW & 0xFE7F)); /* BIT 7 = 0, BIT 8 = 0 */
1293
		break;
1294

1295
	case CHANNEL_WIDTH_40:
1296
		u2tmp = RegRfMod_BW | BIT7;
1297
		PlatformEFIOWrite2Byte(Adapter, REG_TRXPTCL_CTL_8814A, (u2tmp & 0xFEFF)); /* BIT 7 = 1, BIT 8 = 0 */
1298
		break;
1299

1300
	case CHANNEL_WIDTH_80:
1301
		u2tmp = RegRfMod_BW | BIT8;
1302
		PlatformEFIOWrite2Byte(Adapter, REG_TRXPTCL_CTL_8814A, (u2tmp & 0xFF7F)); /* BIT 7 = 0, BIT 8 = 1 */
1303
		break;
1304

1305
	default:
1306
		RT_DISP(FPHY, PHY_BBW, ("phy_SetBwRegMac_8814A():	unknown Bandwidth: %#X\n", CurrentBW));
1307
		break;
1308
	}
1309
}
1310

1311
void PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER	pAdapter, u32	ulAntennaRx)
1312
{
1313
	PHAL_DATA_TYPE		pHalData	= GET_HAL_DATA(pAdapter);
1314

1315
	if ((pHalData->bSWToBW40M == TRUE) && (pHalData->current_channel_bw != CHANNEL_WIDTH_40)) {
1316
		phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000, pHalData->BackUp_BB_REG_4_2nd_CCA[0]);
1317
		phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00, pHalData->BackUp_BB_REG_4_2nd_CCA[1]);
1318
		phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, pHalData->BackUp_BB_REG_4_2nd_CCA[2]);
1319
		pHalData->bSWToBW40M = FALSE;
1320
	}
1321

1322
	if ((pHalData->bSWToBW80M == TRUE) && (pHalData->current_channel_bw != CHANNEL_WIDTH_80)) {
1323
		phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, pHalData->BackUp_BB_REG_4_2nd_CCA[2]);
1324
		pHalData->bSWToBW80M = FALSE;
1325
	}
1326

1327
	/*1 Setting CCA TH 2nd CCA parameter by Rx Antenna*/
1328
	if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) {
1329
		if (pHalData->bSWToBW80M == FALSE)
1330
			pHalData->BackUp_BB_REG_4_2nd_CCA[2] = phy_query_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000);
1331

1332
		pHalData->bSWToBW80M = TRUE;
1333

1334
		switch (ulAntennaRx) {
1335
		case ANTENNA_A:
1336
		case ANTENNA_B:
1337
		case ANTENNA_C:
1338
		case ANTENNA_D:
1339
			phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, 0x0b);/* 0x844[27:24] = 0xb */
1340
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /* 0x838 Enable 2ndCCA */
1341
			phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x89); /* 0x82C[23:20] = 8, PWDB_TH_QB, 0x82C[19:16] = 9, PWDB_TH_HB*/
1342
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x887); /* 838[27:24]=8, RF80_secondary40, 838[23:20]=8, RF80_secondary20, 838[19:16]=7, RF80_primary*/
1343
			phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x7);	/* 840[15:12]=7, L1_square_Pk_weight_80M*/
1344
			break;
1345

1346
		case ANTENNA_AB:
1347
		case ANTENNA_AC:
1348
		case ANTENNA_AD:
1349
		case ANTENNA_BC:
1350
		case ANTENNA_BD:
1351
		case ANTENNA_CD:
1352
			phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, 0x0d);
1353
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /* Enable 2ndCCA*/
1354
			phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x78); /* 0x82C[23:20] = 7, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/
1355
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x444); /* 838[27:24]=4, RF80_secondary40, 838[23:20]=4, RF80_secondary20, 838[19:16]=4, RF80_primary*/
1356
			phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x6); /* 840[15:12]=6, L1_square_Pk_weight_80M*/
1357
			break;
1358

1359
		case ANTENNA_ABC:
1360
		case ANTENNA_ABD:
1361
		case ANTENNA_ACD:
1362
		case ANTENNA_BCD:
1363
			phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, 0x0d);
1364
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /* Enable 2ndCCA*/
1365
			phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x98); /* 0x82C[23:20] = 9, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/
1366
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x666); /* 838[27:24]=6, RF80_secondary40, 838[23:20]=6, RF80_secondary20, 838[19:16]=6, RF80_primary*/
1367
			phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x6); /* 840[15:12]=6, L1_square_Pk_weight_80M*/
1368
			break;
1369

1370
		case ANTENNA_ABCD:
1371
			phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, 0x0d);
1372
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /*Enable 2ndCCA*/
1373
			phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x98); /* 0x82C[23:20] = 9, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/
1374
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x666); /* 838[27:24]=6, RF80_secondary40, 838[23:20]=6, RF80_secondary20, 838[19:16]=6, RF80_primary*/
1375
			phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x7); /*840[15:12]=7, L1_square_Pk_weight_80M*/
1376
			break;
1377

1378
		default:
1379
			RTW_INFO("Unknown Rx antenna.\n");
1380
			break;
1381
		}
1382
	} else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) {
1383
		if (pHalData->bSWToBW40M == FALSE) {
1384
			pHalData->BackUp_BB_REG_4_2nd_CCA[0] = phy_query_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000);
1385
			pHalData->BackUp_BB_REG_4_2nd_CCA[1] = phy_query_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00);
1386
			pHalData->BackUp_BB_REG_4_2nd_CCA[2] = phy_query_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000);
1387
		}
1388

1389
		switch (ulAntennaRx) {
1390
		case ANTENNA_A:  /* xT1R*/
1391
		case ANTENNA_B:
1392
		case ANTENNA_C:
1393
		case ANTENNA_D:
1394
			phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, 0x0b);
1395
			phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000, 0xe);
1396
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00, 0x43);
1397
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1);
1398
			break;
1399
		case ANTENNA_AB: /* xT2R*/
1400
		case ANTENNA_AC:
1401
		case ANTENNA_AD:
1402
		case ANTENNA_BC:
1403
		case ANTENNA_BD:
1404
		case ANTENNA_CD:
1405
			phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, 0x0d);
1406
			phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000, 0x8);
1407
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00, 0x43);
1408
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1);
1409
			break;
1410
		case ANTENNA_ABC: /* xT3R*/
1411
		case ANTENNA_ABD:
1412
		case ANTENNA_ACD:
1413
		case ANTENNA_BCD:
1414
		case ANTENNA_ABCD:  /* xT4R*/
1415
			phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, 0x0d);
1416
			phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000, 0xa);
1417
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00, 0x43);
1418
			phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1);
1419
			break;
1420
		default:
1421
			break;
1422
		}
1423
		pHalData->bSWToBW40M = TRUE;
1424
	} else {
1425
		phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x0); /* Enable 2ndCCA*/
1426
		phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x43); /* 0x82C[23:20] = 9, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/
1427
		phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x7aa); /* 838[27:24]=6, RF80_secondary40, 838[23:20]=6, RF80_secondary20, 838[19:16]=6, RF80_primary*/
1428
		phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x7); /* 840[15:12]=7, L1_square_Pk_weight_80M*/
1429
	}
1430

1431
}
1432

1433

1434
void PHY_SetRXSC_by_TXSC_8814A(PADAPTER	Adapter, u8 SubChnlNum)
1435
{
1436
	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
1437

1438
	if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) {
1439
		if (SubChnlNum == 0)
1440
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1);
1441
		else if (SubChnlNum == 1)
1442
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1);
1443
		else if (SubChnlNum == 2)
1444
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x2);
1445
		else if (SubChnlNum == 4)
1446
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x4);
1447
		else if (SubChnlNum == 3)
1448
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x3);
1449
		else if (SubChnlNum == 9)
1450
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1);
1451
		else if (SubChnlNum == 10)
1452
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x2);
1453
	} else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) {
1454
		if (SubChnlNum == 1)
1455
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1);
1456
		else if (SubChnlNum == 2)
1457
			phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x2);
1458
	} else
1459
		phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x0);
1460
}
1461

1462

1463
/* <20141230, James> A workaround to eliminate the 5280MHz & 5600MHz & 5760MHzspur of 8814A. (Asked by BBSD Neil.)*/
1464
void phy_SpurCalibration_8814A(PADAPTER	Adapter)
1465
{
1466
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
1467

1468
	BOOLEAN		Reset_NBI_CSI = TRUE;
1469
	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
1470
	static u32 bak_82c = 0, bak_830 = 0;
1471

1472
	/*RTW_INFO("%s(),RFE Type =%d, CurrentCh = %d ,ChannelBW =%d\n", __func__, pHalData->rfe_type, pHalData->current_channel, pHalData->current_channel_bw);*/
1473
	/*RTW_INFO("%s(),Before RrNBI_Setting_Jaguar= %x\n", __func__, phy_query_bb_reg(Adapter, rNBI_Setting_Jaguar, bMaskDWord));*/
1474

1475
	if (pHalData->rfe_type == 0) {
1476
		switch (pHalData->current_channel_bw) {
1477
		case CHANNEL_WIDTH_40:
1478
			if (pHalData->current_channel == 54 || pHalData->current_channel == 118) {
1479
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x3e >> 1);
1480
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1481
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0);
1482
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, BIT(0), 1);
1483
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0);
1484
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0);
1485
				Reset_NBI_CSI = FALSE;
1486
			} else if (pHalData->current_channel == 151) {
1487
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1e >> 1);
1488
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1489
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar,  BIT(16), 1);
1490
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1491
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0);
1492
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0);
1493
				Reset_NBI_CSI = FALSE;
1494
			}
1495
			break;
1496

1497
		case CHANNEL_WIDTH_80:
1498
			if (pHalData->current_channel == 58 || pHalData->current_channel == 122) {
1499
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x3a >> 1);
1500
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1501
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0);
1502
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1503
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0);
1504
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, BIT(0), 1);
1505
				Reset_NBI_CSI = FALSE;
1506
			} else if (pHalData->current_channel == 155) {
1507
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x5a >> 1);
1508
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1509
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0);
1510
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1511
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, BIT(16), 1);
1512
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0);
1513
				Reset_NBI_CSI = FALSE;
1514
			}
1515
			break;
1516
		case CHANNEL_WIDTH_20:
1517
			if (pHalData->current_channel == 153) {
1518
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1e >> 1);
1519
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1520
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0);
1521
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1522
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0);
1523
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, BIT(16), 1);
1524
				Reset_NBI_CSI = FALSE;
1525
			}
1526

1527
			/* Add for 8814AE module ch140 MP Rx */
1528
			if (pHalData->current_channel == 140) {
1529
				if (bak_82c == 0)
1530
					bak_82c = phy_query_bb_reg(Adapter, 0x82c, bMaskDWord);
1531
				if (bak_830 == 0)
1532
					bak_830 = phy_query_bb_reg(Adapter, 0x830, bMaskDWord);
1533

1534
				phy_set_bb_reg(Adapter, 0x82c, bMaskDWord, 0x75438170);
1535
				phy_set_bb_reg(Adapter, 0x830, bMaskDWord, 0x79a18a0a);
1536
			} else {
1537
				if ((phy_query_bb_reg(Adapter, 0x82c, bMaskDWord) == 0x75438170) && (bak_82c != 0))
1538
					phy_set_bb_reg(Adapter, 0x82c, bMaskDWord, bak_82c);
1539

1540
				if ((phy_query_bb_reg(Adapter, 0x830, bMaskDWord) == 0x79a18a0a) && (bak_830 != 0))
1541
					phy_set_bb_reg(Adapter, 0x830, bMaskDWord, bak_830);
1542

1543
				bak_82c = phy_query_bb_reg(Adapter, 0x82c, bMaskDWord);
1544
				bak_830 = phy_query_bb_reg(Adapter, 0x830, bMaskDWord);
1545
			}
1546
			break;
1547

1548
		default:
1549
			break;
1550
		}
1551
	} else if (pHalData->rfe_type == 1 || pHalData->rfe_type == 2) {
1552
		switch (pHalData->current_channel_bw) {
1553
		case CHANNEL_WIDTH_20:
1554
			if (pHalData->current_channel == 153) {
1555
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1E >> 1);
1556
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1557
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0);
1558
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1559
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0);
1560
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, BIT(16), 1);
1561
				Reset_NBI_CSI = FALSE;
1562
			}
1563
			break;
1564
		case CHANNEL_WIDTH_40:
1565
			if (pHalData->current_channel == 151) {
1566
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1e >> 1);
1567
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1568
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, BIT(16), 1);
1569
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1570
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0);
1571
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0);
1572
				Reset_NBI_CSI = FALSE;
1573
			}
1574
			break;
1575
		case CHANNEL_WIDTH_80:
1576
			if (pHalData->current_channel == 155) {
1577
				phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x5a >> 1);
1578
				phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1);
1579
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0);
1580
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1581
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, BIT(16), 1);
1582
				phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0);
1583
				Reset_NBI_CSI = FALSE;
1584
			}
1585
			break;
1586

1587
		default:
1588
			break;
1589
		}
1590
	}
1591

1592
	if (Reset_NBI_CSI) {
1593
		phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0xfc >> 1);
1594
		phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 0);
1595
		phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0);
1596
		phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0);
1597
		phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0);
1598
		phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0);
1599
	}
1600

1601
	phydm_spur_nbi_setting_8814a(pDM_Odm);
1602
	/*RTW_INFO("%s(),After RrNBI_Setting_Jaguar= %x\n", __func__, phy_query_bb_reg(Adapter, rNBI_Setting_Jaguar, bMaskDWord));*/
1603
}
1604

1605

1606
void phy_ModifyInitialGain_8814A(
1607
	PADAPTER		Adapter)
1608
{
1609
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
1610
	u8			channel = pHalData->current_channel;
1611
	s8		offset[4]; /*{A,B,C,D}*/
1612
	u8			i = 0;
1613
	u8			chnl_section = 0xff;
1614

1615
	if (channel <= 14 && channel > 0)
1616
		chnl_section = 0; /*2G*/
1617
	else if (channel <= 64 && channel >= 36)
1618
		chnl_section = 1; /*5GL*/
1619
	else if (channel <= 144 && channel >= 100)
1620
		chnl_section = 2; /*5GM*/
1621
	else if (channel <= 177 && channel >= 149)
1622
		chnl_section = 3; /*5GH*/
1623

1624
	if (chnl_section > 3) {
1625
		RTW_INFO("%s: worng channel section\n", __func__);
1626
		return;
1627
	}
1628

1629
	for (i = 0; i < 4; i++) {
1630
		u8	hex_offset;
1631

1632
		hex_offset = (u8)(pHalData->RxGainOffset[chnl_section] >> (12 - 4 * i)) & 0x0f;
1633
		RTW_INFO("%s: pHalData->RxGainOffset[%d] = %x\n", __func__, chnl_section, pHalData->RxGainOffset[chnl_section]);
1634
		RTW_INFO("%s: hex_offset = %x\n", __func__, hex_offset);
1635

1636
		if (hex_offset == 0xf)
1637
			offset[i] = 0;
1638
		else if (hex_offset >= 0x8)
1639
			offset[i] = 0x11 - hex_offset;
1640
		else
1641
			offset[i] = 0x0 - hex_offset;
1642
		offset[i] = (offset[i] / 2) * 2;
1643
		RTW_INFO("%s: offset[%d] = %x\n", __func__, i, offset[i]);
1644
		RTW_INFO("%s: BackUp_IG_REG_4_Chnl_Section[%d] = %x\n", __func__, i, pHalData->BackUp_IG_REG_4_Chnl_Section[i]);
1645
	}
1646

1647
	if (pHalData->BackUp_IG_REG_4_Chnl_Section[0] != 0 &&
1648
	    pHalData->BackUp_IG_REG_4_Chnl_Section[1] != 0 &&
1649
	    pHalData->BackUp_IG_REG_4_Chnl_Section[2] != 0 &&
1650
	    pHalData->BackUp_IG_REG_4_Chnl_Section[3] != 0
1651
	   ) {
1652
		phy_set_bb_reg(Adapter, rA_IGI_Jaguar, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[0] + offset[0]);
1653
		phy_set_bb_reg(Adapter, rB_IGI_Jaguar, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[1] + offset[1]);
1654
		phy_set_bb_reg(Adapter, rC_IGI_Jaguar2, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[2] + offset[2]);
1655
		phy_set_bb_reg(Adapter, rD_IGI_Jaguar2, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[3] + offset[3]);
1656
	}
1657
}
1658

1659

1660
void phy_SetBwMode8814A(PADAPTER	Adapter)
1661
{
1662
	u8			SubChnlNum = 0;
1663
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
1664

1665
	/* 3 Set Reg668 BW */
1666
	phy_SetBwRegMac_8814A(Adapter, pHalData->current_channel_bw);
1667

1668
	/* 3 Set Reg483 */
1669
	SubChnlNum = phy_GetSecondaryChnl_8814A(Adapter);
1670
	rtw_write8(Adapter, REG_DATA_SC_8814A, SubChnlNum);
1671

1672
	if (pHalData->rf_chip == RF_PSEUDO_11N) {
1673
		RTW_INFO("phy_SetBwMode8814A: return for PSEUDO\n");
1674
		return;
1675
	}
1676

1677
	/* 3 Set Reg8AC Reg8C4 Reg8C8 */
1678
	phy_SetBwRegAdc_8814A(Adapter, pHalData->current_band_type, pHalData->current_channel_bw);
1679
	/* 3 Set Reg82C */
1680
	phy_SetBwRegAgc_8814A(Adapter, pHalData->current_band_type, pHalData->current_channel_bw);
1681

1682
	/* 3 Set Reg848  RegA00 */
1683
	switch (pHalData->current_channel_bw) {
1684
	case CHANNEL_WIDTH_20:
1685
		break;
1686

1687
	case CHANNEL_WIDTH_40:
1688
		phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x3C, SubChnlNum);			/* 0x8ac[5:2]=1/2 */
1689

1690
		if (SubChnlNum == VHT_DATA_SC_20_UPPER_OF_80MHZ)					/* 0xa00[4]=1/0 */
1691
			phy_set_bb_reg(Adapter, rCCK_System_Jaguar, bCCK_System_Jaguar, 1);
1692
		else
1693
			phy_set_bb_reg(Adapter, rCCK_System_Jaguar, bCCK_System_Jaguar, 0);
1694
		break;
1695

1696
	case CHANNEL_WIDTH_80:
1697
		phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x3C, SubChnlNum);			/* 0x8ac[5:2]=1/2/3/4/9/10 */
1698
		break;
1699

1700
	default:
1701
		RTW_INFO("%s():unknown Bandwidth:%#X\n", __func__, pHalData->current_channel_bw);
1702
		break;
1703
	}
1704

1705
#if (MP_DRIVER == 1)
1706
	if (Adapter->registrypriv.mp_mode == 1) {
1707
		/* 2 Set Reg 0x8AC */
1708
		PHY_SetRXSC_by_TXSC_8814A(Adapter, (SubChnlNum & 0xf));
1709
		PHY_Set_SecCCATH_by_RXANT_8814A(Adapter, pHalData->AntennaRxPath);
1710
	}
1711
#endif
1712
	/* 3 Set RF related register */
1713
	PHY_RF6052SetBandwidth8814A(Adapter, pHalData->current_channel_bw);
1714

1715
	phy_ADC_CLK_8814A(Adapter);
1716
	phy_SpurCalibration_8814A(Adapter);
1717
}
1718

1719

1720

1721
/* 1 6. Channel setting API */
1722

1723
/* <YuChen, 140529> Add for KFree Feature Requested by RF David.
1724
 * We need support ABCD four path Kfree */
1725

1726
void
1727
phy_SetKfreeToRF_8814A(
1728
		PADAPTER		Adapter,
1729
		enum rf_path		eRFPath,
1730
		u8				Data
1731
)
1732
{
1733
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(GetDefaultAdapter(Adapter));
1734
	struct dm_struct	*pDM_Odm = &pHalData->odmpriv;
1735
	BOOLEAN bOdd;
1736
	struct dm_rf_calibration_struct	*pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info);
1737
	if ((Data % 2) != 0) {	/* odd->positive */
1738
		Data = Data - 1;
1739
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT19, 1);
1740
		bOdd = TRUE;
1741
	} else {	/* even->negative */
1742
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT19, 0);
1743
		bOdd = FALSE;
1744
	}
1745
	switch (Data) {
1746
	case 2:
1747
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT14, 1);
1748
		pRFCalibrateInfo->kfree_offset[eRFPath] = 0;
1749
		break;
1750
	case 4:
1751
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 1);
1752
		pRFCalibrateInfo->kfree_offset[eRFPath] = 1;
1753
		break;
1754
	case 6:
1755
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT14, 1);
1756
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 1);
1757
		pRFCalibrateInfo->kfree_offset[eRFPath] = 1;
1758
		break;
1759
	case 8:
1760
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 2);
1761
		pRFCalibrateInfo->kfree_offset[eRFPath] = 2;
1762
		break;
1763
	case 10:
1764
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT14, 1);
1765
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 2);
1766
		pRFCalibrateInfo->kfree_offset[eRFPath] = 2;
1767
		break;
1768
	case 12:
1769
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 3);
1770
		pRFCalibrateInfo->kfree_offset[eRFPath] = 3;
1771
		break;
1772
	case 14:
1773
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT14, 1);
1774
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 3);
1775
		pRFCalibrateInfo->kfree_offset[eRFPath] = 3;
1776
		break;
1777
	case 16:
1778
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 4);
1779
		pRFCalibrateInfo->kfree_offset[eRFPath] = 4;
1780
		break;
1781
	case 18:
1782
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT14, 1);
1783
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 4);
1784
		pRFCalibrateInfo->kfree_offset[eRFPath] = 4;
1785
		break;
1786
	case 20:
1787
		phy_set_rf_reg(Adapter, eRFPath, REG_RF_TX_GAIN_OFFSET, BIT17 | BIT16 | BIT15, 5);
1788
		pRFCalibrateInfo->kfree_offset[eRFPath] = 5;
1789
		break;
1790

1791
	default:
1792
		break;
1793
	}
1794

1795
	if (bOdd == FALSE) {		/* that means Kfree offset is negative, we need to record it. */
1796
		pRFCalibrateInfo->kfree_offset[eRFPath] = (-1) * pRFCalibrateInfo->kfree_offset[eRFPath];
1797
	}
1798

1799
}
1800

1801

1802
void
1803
phy_ConfigKFree8814A(
1804
		PADAPTER	Adapter,
1805
		u8		channelToSW,
1806
		BAND_TYPE	bandType
1807
)
1808
{
1809
	u8			targetval_A = 0xFF;
1810
	u8			targetval_B = 0xFF;
1811
	u8			targetval_C = 0xFF;
1812
	u8			targetval_D = 0xFF;
1813
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
1814

1815
	/* RTW_INFO("===>phy_ConfigKFree8814A()\n"); */
1816

1817
	if (Adapter->registrypriv.RegPwrTrimEnable == 2) {
1818
		/*RTW_INFO("phy_ConfigKFree8814A(): RegRfKFreeEnable == 2, Disable\n");*/
1819
		return;
1820
	} else if (Adapter->registrypriv.RegPwrTrimEnable == 1 || Adapter->registrypriv.RegPwrTrimEnable == 0) {
1821
		RTW_INFO("phy_ConfigKFree8814A(): RegPwrTrimEnable == TRUE\n");
1822
		if (bandType == BAND_ON_2_4G) {
1823
			RTW_INFO("phy_ConfigKFree8814A(): bandType == BAND_ON_2_4G, channelToSW= %d\n", channelToSW);
1824
			if (channelToSW <= 14 && channelToSW >= 1) {
1825
				efuse_OneByteRead(Adapter, 0x3F4, &targetval_A, FALSE);	/* for Path A and B */
1826
				efuse_OneByteRead(Adapter, 0x3F5, &targetval_B, FALSE);	/* for Path C and D */
1827
			}
1828

1829
		} else if (bandType == BAND_ON_5G) {
1830
			RTW_INFO("phy_ConfigKFree8814A(): bandType == BAND_ON_5G, channelToSW= %d\n", channelToSW);
1831
			if (channelToSW >= 36 && channelToSW < 50) { /* 5GLB_1 */
1832
				efuse_OneByteRead(Adapter, 0x3E0, &targetval_A, FALSE);
1833
				efuse_OneByteRead(Adapter, 0x3E1, &targetval_B, FALSE);
1834
				efuse_OneByteRead(Adapter, 0x3E2, &targetval_C, FALSE);
1835
				efuse_OneByteRead(Adapter, 0x3E3, &targetval_D, FALSE);
1836
			} else if (channelToSW >= 50 && channelToSW <= 64) { /* 5GLB_2 */
1837
				efuse_OneByteRead(Adapter, 0x3E4, &targetval_A, FALSE);
1838
				efuse_OneByteRead(Adapter, 0x3E5, &targetval_B, FALSE);
1839
				efuse_OneByteRead(Adapter, 0x3E6, &targetval_C, FALSE);
1840
				efuse_OneByteRead(Adapter, 0x3E7, &targetval_D, FALSE);
1841
			} else if (channelToSW >= 100 && channelToSW <= 118) { /* 5GMB_1 */
1842
				efuse_OneByteRead(Adapter, 0x3E8, &targetval_A, FALSE);
1843
				efuse_OneByteRead(Adapter, 0x3E9, &targetval_B, FALSE);
1844
				efuse_OneByteRead(Adapter, 0x3EA, &targetval_C, FALSE);
1845
				efuse_OneByteRead(Adapter, 0x3EB, &targetval_D, FALSE);
1846
			} else if (channelToSW >= 120 && channelToSW <= 140) { /* 5GMB_2 */
1847
				efuse_OneByteRead(Adapter, 0x3EC, &targetval_A, FALSE);
1848
				efuse_OneByteRead(Adapter, 0x3ED, &targetval_B, FALSE);
1849
				efuse_OneByteRead(Adapter, 0x3EE, &targetval_C, FALSE);
1850
				efuse_OneByteRead(Adapter, 0x3EF, &targetval_D, FALSE);
1851
			} else if (channelToSW >= 149 && channelToSW <= 165) { /* 5GHB */
1852
				efuse_OneByteRead(Adapter, 0x3F0, &targetval_A, FALSE);
1853
				efuse_OneByteRead(Adapter, 0x3F1, &targetval_B, FALSE);
1854
				efuse_OneByteRead(Adapter, 0x3F2, &targetval_C, FALSE);
1855
				efuse_OneByteRead(Adapter, 0x3F3, &targetval_D, FALSE);
1856
			}
1857
		}
1858
		RTW_INFO("phy_ConfigKFree8814A(): targetval_A= %#x\n", targetval_A);
1859
		RTW_INFO("phy_ConfigKFree8814A(): targetval_B= %#x\n", targetval_B);
1860
		RTW_INFO("phy_ConfigKFree8814A(): targetval_C= %#x\n", targetval_C);
1861
		RTW_INFO("phy_ConfigKFree8814A(): targetval_D= %#x\n", targetval_D);
1862

1863
		/* Make sure the targetval is defined */
1864
		if ((Adapter->registrypriv.RegPwrTrimEnable == 1) && ((targetval_A != 0xFF) || (pHalData->RfKFreeEnable == TRUE))) {
1865
			if (bandType == BAND_ON_2_4G) { /* 2G */
1866
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_A, targetval_A & 0x0F);
1867
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_B, (targetval_A & 0xF0) >> 4);
1868
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_C, targetval_B & 0x0F);
1869
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_D, (targetval_B & 0xF0) >> 4);
1870
			} else if (bandType == BAND_ON_5G) {
1871
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_A, targetval_A & 0x1F);
1872
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_B, targetval_B & 0x1F);
1873
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_C, targetval_C & 0x1F);
1874
				phy_SetKfreeToRF_8814A(Adapter, RF_PATH_D, targetval_D & 0x1F);
1875
			}
1876
		} else {
1877
			return;
1878
		}
1879
	}
1880
}
1881

1882
void
1883
phy_SwChnl8814A(
1884
		PADAPTER					pAdapter
1885
)
1886
{
1887
	enum rf_path		eRFPath = RF_PATH_A, channelIdx = 0;
1888
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
1889
#ifdef CONFIG_RF_POWER_TRIM
1890
	struct kfree_data_t *kfree_data = &pHalData->kfree_data;
1891
#endif
1892
	u8			channelToSW = pHalData->current_channel;
1893
	u32			RFValToWR , RFTmpVal, BitShift, BitMask;
1894

1895
	/* RTW_INFO("[BW:CHNL], phy_SwChnl8814A(), switch to channel %d !!\n", channelToSW); */
1896

1897
	if (phy_SwBand8814A(pAdapter, channelToSW) == FALSE)
1898
		RTW_INFO("error Chnl %d", channelToSW);
1899

1900
	if (pHalData->rf_chip == RF_PSEUDO_11N) {
1901
		return;
1902
	}
1903

1904
#ifdef CONFIG_RF_POWER_TRIM
1905
	/* <YuChen, 140529> Add for KFree Feature Requested by RF David. */
1906
	if (kfree_data->flag & KFREE_FLAG_ON) {
1907

1908
		channelIdx = rtw_ch_to_bb_gain_sel(channelToSW);
1909
#if 0
1910
		if (pHalData->RfKFree_ch_group != channelIdx) {
1911
			/* Todo: wait for new phydm ready */
1912
			phy_ConfigKFree8814A(pAdapter, channelToSW, pHalData->current_band_type);
1913
			phydm_ConfigKFree(pDM_Odm, channelToSW, kfree_data->bb_gain);
1914
			RTW_INFO("RfKFree_ch_group =%d\n", channelIdx);
1915
		}
1916
#endif
1917

1918
		pHalData->RfKFree_ch_group = channelIdx;
1919

1920
	}
1921
#endif /*CONFIG_RF_POWER_TRIM*/
1922
	if (pHalData->RegFWOffload == 2)
1923
		FillH2CCmd_8814(pAdapter, H2C_CHNL_SWITCH_OFFLOAD, 1, &channelToSW);
1924
	else {
1925
		/* fc_area		 */
1926
		if (36 <= channelToSW && channelToSW <= 48)
1927
			phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x494);
1928
		else if (50 <= channelToSW && channelToSW <= 64)
1929
			phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x453);
1930
		else if (100 <= channelToSW && channelToSW <= 116)
1931
			phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x452);
1932
		else if (118 <= channelToSW)
1933
			phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x412);
1934
		else
1935
			phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x96a);
1936

1937
		for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
1938
			/* RF_MOD_AG */
1939
			if (36 <= channelToSW && channelToSW <= 64)
1940
				RFValToWR = 0x101;	 /* 5'b00101 */
1941
			else if (100 <= channelToSW && channelToSW <= 140)
1942
				RFValToWR = 0x301;	/* 5'b01101 */
1943
			else if (140 < channelToSW)
1944
				RFValToWR = 0x501;	/* 5'b10101 */
1945
			else
1946
				RFValToWR = 0x000;	/* 5'b00000 */
1947

1948
			/* Channel to switch */
1949
			BitMask = BIT18 | BIT17 | BIT16 | BIT9 | BIT8;
1950
			BitShift =  PHY_CalculateBitShift(BitMask);
1951
			RFTmpVal = channelToSW | (RFValToWR << BitShift);
1952

1953
			BitMask = BIT18 | BIT17 | BIT16 | BIT9 | BIT8 | bMaskByte0;
1954

1955
			phy_set_rf_reg(pAdapter, eRFPath, RF_CHNLBW_Jaguar, BitMask, RFTmpVal);
1956
		}
1957

1958
		if (36 <= channelToSW && channelToSW <= 64)				/* Band 1 & Band 2 */
1959
			phy_set_bb_reg(pAdapter, rAGC_table_Jaguar2, 0x1F, 1);	/* 0x958[4:0] = 0x1 */
1960
		else if (100 <= channelToSW && channelToSW <= 144) 			/* Band 3 */
1961
			phy_set_bb_reg(pAdapter, rAGC_table_Jaguar2, 0x1F, 2);	/* 0x958[4:0] = 0x2 */
1962
		else	if (channelToSW >= 149)								/* Band 4 */
1963
			phy_set_bb_reg(pAdapter, rAGC_table_Jaguar2, 0x1F, 3);	/* 0x958[4:0] = 0x3 */
1964
	}
1965

1966
	if (pAdapter->registrypriv.mp_mode == 1) {
1967
		if (!pHalData->bSetChnlBW)
1968
			phy_ADC_CLK_8814A(pAdapter);
1969
		phy_SpurCalibration_8814A(pAdapter);
1970
		phy_ModifyInitialGain_8814A(pAdapter);
1971
	}
1972

1973
	/* 2.4G CCK TX DFIR */
1974
	if (channelToSW >= 1 && channelToSW <= 11) {
1975
		phy_set_bb_reg(pAdapter, rCCK0_TxFilter1, bMaskDWord, 0x1a1b0030);
1976
		phy_set_bb_reg(pAdapter, rCCK0_TxFilter2, bMaskDWord, 0x090e1317);
1977
		phy_set_bb_reg(pAdapter, rCCK0_DebugPort, bMaskDWord, 0x00000204);
1978
	} else if (channelToSW >= 12 && channelToSW <= 13) {
1979
		phy_set_bb_reg(pAdapter, rCCK0_TxFilter1, bMaskDWord, 0x1a1b0030);
1980
		phy_set_bb_reg(pAdapter, rCCK0_TxFilter2, bMaskDWord, 0x090e1217);
1981
		phy_set_bb_reg(pAdapter, rCCK0_DebugPort, bMaskDWord, 0x00000305);
1982
	} else if (channelToSW == 14) {
1983
		phy_set_bb_reg(pAdapter, rCCK0_TxFilter1, bMaskDWord, 0x1a1b0030);
1984
		phy_set_bb_reg(pAdapter, rCCK0_TxFilter2, bMaskDWord, 0x00000E17);
1985
		phy_set_bb_reg(pAdapter, rCCK0_DebugPort, bMaskDWord, 0x00000000);
1986
	}
1987

1988
}
1989

1990
#if 0
1991
/* void
1992
 * PHY_SwChnlTimerCallback8814A( */
1993
/* 	PRT_TIMER		pTimer */
1994
/* ) */
1995
{
1996
	/* PADAPTER		pAdapter = (PADAPTER)pTimer->Adapter; */
1997
	/* HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter); */
1998

1999

2000
	if (rtw_is_drv_stopped(padapter))
2001
		return;
2002

2003
	if (pHalData->rf_chip == RF_PSEUDO_11N) {
2004
		pHalData->SwChnlInProgress = FALSE;
2005
		return; 								/* return immediately if it is peudo-phy	 */
2006
	}
2007

2008

2009
	PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2010
	pHalData->SwChnlInProgress = TRUE;
2011
	PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2012

2013
	phy_SwChnl8814A(pAdapter);
2014

2015
	PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2016
	pHalData->SwChnlInProgress = FALSE;
2017
	PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2018

2019
}
2020

2021

2022
void
2023
PHY_SwChnlWorkItemCallback8814A(
2024
	void *pContext
2025
)
2026
{
2027
	PADAPTER		pAdapter = (PADAPTER)pContext;
2028
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(pAdapter);
2029

2030
	if (pAdapter->bInSetPower && RT_USB_CANNOT_IO(pAdapter)) {
2031

2032
		pHalData->SwChnlInProgress = FALSE;
2033
		return;
2034
	}
2035

2036
	if (rtw_is_drv_stopped(padapter))
2037
		return;
2038

2039
	if (pHalData->rf_chip == RF_PSEUDO_11N) {
2040
		pHalData->SwChnlInProgress = FALSE;
2041
		return; 								/* return immediately if it is peudo-phy	 */
2042
	}
2043

2044
	PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2045
	pHalData->SwChnlInProgress = TRUE;
2046
	PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2047

2048
	phy_SwChnl8814A(pAdapter);
2049

2050
	PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2051
	pHalData->SwChnlInProgress = FALSE;
2052
	PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK);
2053

2054
}
2055

2056

2057
void
2058
HAL_HandleSwChnl8814A(/*  Call after initialization */
2059
		PADAPTER	pAdapter,
2060
		u8		channel
2061
)
2062
{
2063
	PADAPTER Adapter =  GetDefaultAdapter(pAdapter);
2064
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
2065
	pHalData->current_channel = channel;
2066
	phy_SwChnl8814A(Adapter);
2067

2068

2069
#if (MP_DRIVER == 1)
2070
	/*  <20120712, Kordan> IQK on each channel, asked by James. */
2071
	phy_iq_calibrate_8814a(pAdapter, FALSE);
2072
#endif
2073

2074
}
2075
#endif
2076

2077
void
2078
phy_SwChnlAndSetBwMode8814A(
2079
		PADAPTER		Adapter
2080
)
2081
{
2082
	HAL_DATA_TYPE		*pHalData = GET_HAL_DATA(Adapter);
2083
	struct dm_struct		*pDM_Odm = &pHalData->odmpriv;
2084

2085
	/* RTW_INFO("phy_SwChnlAndSetBwMode8814A(): bSwChnl %d, bSetChnlBW %d\n", pHalData->bSwChnl, pHalData->bSetChnlBW); */
2086
	if (Adapter->bNotifyChannelChange) {
2087
		RTW_INFO("[%s] bSwChnl=%d, ch=%d, bSetChnlBW=%d, bw=%d\n",
2088
			 __FUNCTION__,
2089
			 pHalData->bSwChnl,
2090
			 pHalData->current_channel,
2091
			 pHalData->bSetChnlBW,
2092
			 pHalData->current_channel_bw);
2093
	}
2094

2095
	if (RTW_CANNOT_RUN(Adapter)) {
2096
		pHalData->bSwChnlAndSetBWInProgress = FALSE;
2097
		return;
2098
	}
2099

2100
	if (pHalData->bSwChnl) {
2101
		phy_SwChnl8814A(Adapter);
2102
		pHalData->bSwChnl = FALSE;
2103
	}
2104

2105
	if (pHalData->bSetChnlBW) {
2106
		phy_SetBwMode8814A(Adapter);
2107
		pHalData->bSetChnlBW = FALSE;
2108
	}
2109

2110
	if (Adapter->registrypriv.mp_mode == 0) {
2111
		odm_clear_txpowertracking_state(pDM_Odm);
2112
		rtw_hal_set_tx_power_level(Adapter, pHalData->current_channel);
2113
		if (pHalData->bNeedIQK == _TRUE) {
2114
			/*phy_iq_calibrate_8814a(pDM_Odm, _FALSE);*/
2115
			halrf_iqk_trigger(&pHalData->odmpriv, _FALSE);
2116
			pHalData->bNeedIQK = _FALSE;
2117
		}
2118
	} else
2119
		halrf_iqk_trigger(&pHalData->odmpriv, _FALSE);
2120
		/*phy_iq_calibrate_8814a(pDM_Odm, _FALSE);*/
2121
#if 0 /* todo */
2122
#if (AUTO_CHNL_SEL_NHM == 1)
2123
	if (IS_AUTO_CHNL_SUPPORT(Adapter) &&
2124
	    P2PIsSocialChannel(pHalData->current_channel)) {
2125

2126
		/* Reset NHM counter		 */
2127
		odm_auto_channel_select_reset(GET_PDM_ODM(Adapter));
2128

2129
		SET_AUTO_CHNL_STATE(Adapter, ACS_BEFORE_NHM);/* Before NHM measurement */
2130
	}
2131
#endif
2132
#endif /* 0 */
2133
	pHalData->bSwChnlAndSetBWInProgress = FALSE;
2134
}
2135

2136

2137
void
2138
PHY_SwChnlAndSetBWModeCallback8814A(
2139
	void *pContext
2140
)
2141
{
2142
	PADAPTER		Adapter = (PADAPTER)pContext;
2143
	phy_SwChnlAndSetBwMode8814A(Adapter);
2144
}
2145

2146
#if 0
2147
/* */
2148
/*  Description: */
2149
/*	Switch channel synchronously. Called by SwChnlByDelayHandler. */
2150
/* */
2151
/*  Implemented by Bruce, 2008-02-14. */
2152
/*  The following procedure is operted according to SwChanlCallback8190Pci(). */
2153
/*  However, this procedure is performed synchronously  which should be running under */
2154
/*  passive level. */
2155
/*  */
2156
void
2157
PHY_SwChnlSynchronously8814A(/*  Only called during initialize */
2158
		PADAPTER	Adapter,
2159
		u8		channel
2160
)
2161
{
2162
	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(Adapter);
2163

2164

2165
	/*  Cannot IO. */
2166
	if (RT_CANNOT_IO(Adapter))
2167
		return;
2168

2169
	/*  Channel Switching is in progress. */
2170
	if (pHalData->bSwChnlAndSetBWInProgress)
2171
		return;
2172

2173
	/* return immediately if it is peudo-phy */
2174
	if (pHalData->rf_chip == RF_PSEUDO_11N) {
2175
		pHalData->bSwChnlAndSetBWInProgress = FALSE;
2176
		return;
2177
	}
2178

2179
	switch (pHalData->CurrentWirelessMode) {
2180
	case WIRELESS_MODE_A:
2181
	case WIRELESS_MODE_N_5G:
2182
	case WIRELESS_MODE_AC_5G:
2183
		/* Get first channel error when change between 5G and 2.4G band. */
2184
		/* FIX ME!!! */
2185
		if (channel <= 14)
2186
			return;
2187
		RT_ASSERT((channel > 14), ("WIRELESS_MODE_A but channel<=14"));
2188
		break;
2189

2190
	case WIRELESS_MODE_B:
2191
	case WIRELESS_MODE_G:
2192
	case WIRELESS_MODE_N_24G:
2193
	case WIRELESS_MODE_AC_24G:
2194
		/* Get first channel error when change between 5G and 2.4G band. */
2195
		/* FIX ME!!! */
2196
		if (channel > 14)
2197
			return;
2198
		RT_ASSERT((channel <= 14), ("WIRELESS_MODE_G but channel>14"));
2199
		break;
2200

2201
	default:
2202
		RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode));
2203
		break;
2204

2205
	}
2206

2207
	pHalData->bSwChnlAndSetBWInProgress = TRUE;
2208
	if (channel == 0)
2209
		channel = 1;
2210

2211
	pHalData->bSwChnl = TRUE;
2212
	pHalData->bSetChnlBW = FALSE;
2213
	pHalData->current_channel = channel;
2214

2215
	phy_SwChnlAndSetBwMode8814A(Adapter);
2216

2217

2218
}
2219
#endif
2220

2221
void
2222
PHY_HandleSwChnlAndSetBW8814A(
2223
		PADAPTER			Adapter,
2224
		BOOLEAN				bSwitchChannel,
2225
		BOOLEAN				bSetBandWidth,
2226
		u8					ChannelNum,
2227
		enum channel_width	ChnlWidth,
2228
		u8					ChnlOffsetOf40MHz,
2229
		u8					ChnlOffsetOf80MHz,
2230
		u8					CenterFrequencyIndex1
2231
)
2232
{
2233
	PADAPTER			pDefAdapter =  GetDefaultAdapter(Adapter);
2234
	PHAL_DATA_TYPE		pHalData = GET_HAL_DATA(pDefAdapter);
2235
	u8					tmpChannel = pHalData->current_channel;
2236
	enum channel_width	tmpBW = pHalData->current_channel_bw;
2237
	u8					tmpnCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC;
2238
	u8					tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC;
2239
	u8					tmpCenterFrequencyIndex1 = pHalData->CurrentCenterFrequencyIndex1;
2240
	struct mlme_ext_priv	*pmlmeext = &Adapter->mlmeextpriv;
2241

2242
	/* check is swchnl or setbw */
2243
	if (!bSwitchChannel && !bSetBandWidth) {
2244
		RTW_INFO("PHY_HandleSwChnlAndSetBW8812:  not switch channel and not set bandwidth\n");
2245
		return;
2246
	}
2247

2248
	/* skip change for channel or bandwidth is the same */
2249
	if (bSwitchChannel) {
2250
		if (pHalData->current_channel != ChannelNum) {
2251
			if (HAL_IsLegalChannel(Adapter, ChannelNum))
2252
				pHalData->bSwChnl = _TRUE;
2253
			else
2254
				return;
2255
		}
2256
	}
2257

2258
	if (bSetBandWidth) {
2259
		if (pHalData->bChnlBWInitialized == _FALSE) {
2260
			pHalData->bChnlBWInitialized = _TRUE;
2261
			pHalData->bSetChnlBW = _TRUE;
2262
		} else if ((pHalData->current_channel_bw != ChnlWidth) ||
2263
			   (pHalData->nCur40MhzPrimeSC != ChnlOffsetOf40MHz) ||
2264
			   (pHalData->nCur80MhzPrimeSC != ChnlOffsetOf80MHz) ||
2265
			(pHalData->CurrentCenterFrequencyIndex1 != CenterFrequencyIndex1))
2266
			pHalData->bSetChnlBW = _TRUE;
2267
	}
2268

2269
	if (!pHalData->bSetChnlBW && !pHalData->bSwChnl && pHalData->bNeedIQK != _TRUE) {
2270
		/* RTW_INFO("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n",pHalData->bSwChnl,pHalData->bSetChnlBW); */
2271
		return;
2272
	}
2273

2274

2275
	if (pHalData->bSwChnl) {
2276
		pHalData->current_channel = ChannelNum;
2277
		pHalData->CurrentCenterFrequencyIndex1 = ChannelNum;
2278
	}
2279

2280

2281
	if (pHalData->bSetChnlBW) {
2282
		pHalData->current_channel_bw = ChnlWidth;
2283
#if 0
2284
		if (ExtChnlOffsetOf40MHz == EXTCHNL_OFFSET_LOWER)
2285
			pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
2286
		else if (ExtChnlOffsetOf40MHz == EXTCHNL_OFFSET_UPPER)
2287
			pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
2288
		else
2289
			pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
2290

2291
		if (ExtChnlOffsetOf80MHz == EXTCHNL_OFFSET_LOWER)
2292
			pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
2293
		else if (ExtChnlOffsetOf80MHz == EXTCHNL_OFFSET_UPPER)
2294
			pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
2295
		else
2296
			pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
2297
#else
2298
		pHalData->nCur40MhzPrimeSC = ChnlOffsetOf40MHz;
2299
		pHalData->nCur80MhzPrimeSC = ChnlOffsetOf80MHz;
2300
#endif
2301

2302
		pHalData->CurrentCenterFrequencyIndex1 = CenterFrequencyIndex1;
2303
	}
2304

2305
	/* Switch workitem or set timer to do switch channel or setbandwidth operation */
2306
	if (!RTW_CANNOT_RUN(Adapter))
2307
		phy_SwChnlAndSetBwMode8814A(Adapter);
2308
	else {
2309
		if (pHalData->bSwChnl) {
2310
			pHalData->current_channel = tmpChannel;
2311
			pHalData->CurrentCenterFrequencyIndex1 = tmpChannel;
2312
		}
2313
		if (pHalData->bSetChnlBW) {
2314
			pHalData->current_channel_bw = tmpBW;
2315
			pHalData->nCur40MhzPrimeSC = tmpnCur40MhzPrimeSC;
2316
			pHalData->nCur80MhzPrimeSC = tmpnCur80MhzPrimeSC;
2317
			pHalData->CurrentCenterFrequencyIndex1 = tmpCenterFrequencyIndex1;
2318
		}
2319
	}
2320

2321
	/* RTW_INFO("Channel %d ChannelBW %d ",pHalData->current_channel, pHalData->current_channel_bw); */
2322
	/* RTW_INFO("40MhzPrimeSC %d 80MhzPrimeSC %d ",pHalData->nCur40MhzPrimeSC, pHalData->nCur80MhzPrimeSC); */
2323
	/* RTW_INFO("CenterFrequencyIndex1 %d\n",pHalData->CurrentCenterFrequencyIndex1); */
2324

2325
	/* RTW_INFO("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d\n",pHalData->bSwChnl,pHalData->bSetChnlBW); */
2326

2327
}
2328

2329

2330
BOOLEAN
2331
SetAntennaConfig8814A(
2332
		PADAPTER		pAdapter,
2333
		u8			DefaultAnt		/* 0: Main, 1: Aux. */
2334
)
2335
{
2336
	return TRUE;
2337
}
2338

2339
void
2340
PHY_SetSwChnlBWMode8814(
2341
		PADAPTER			Adapter,
2342
		u8					channel,
2343
		enum channel_width	Bandwidth,
2344
		u8					Offset40,
2345
		u8					Offset80
2346
)
2347
{
2348
	/* RTW_INFO("%s()===>\n",__FUNCTION__); */
2349

2350
	PHY_HandleSwChnlAndSetBW8814A(Adapter, _TRUE, _TRUE, channel, Bandwidth, Offset40, Offset80, channel);
2351

2352
	/* RTW_INFO("<==%s()\n",__FUNCTION__); */
2353
}
2354

2355
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