Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
nu11secur1ty
GitHub Repository: nu11secur1ty/Kali-Linux
Path: blob/master/ALFA-W1F1/RTL8814AU/hal/rtl8814a/usb/usb_halinit.c
1308 views
1
/******************************************************************************
2
*
3
* Copyright(c) 2007 - 2017 Realtek Corporation.
4
*
5
* This program is free software; you can redistribute it and/or modify it
6
* under the terms of version 2 of the GNU General Public License as
7
* published by the Free Software Foundation.
8
*
9
* This program is distributed in the hope that it will be useful, but WITHOUT
10
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12
* more details.
13
*
14
*****************************************************************************/
15
#define _HCI_HAL_INIT_C_
16
17
/* #include <drv_types.h> */
18
#include <rtl8814a_hal.h>
19
20
#ifndef CONFIG_USB_HCI
21
22
#error "CONFIG_USB_HCI shall be on!\n"
23
24
#endif
25
26
static void
27
_ConfigChipOutEP_8814(
28
PADAPTER pAdapter,
29
u8 NumOutPipe
30
)
31
{
32
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
33
34
35
pHalData->OutEpQueueSel = 0;
36
pHalData->OutEpNumber = 0;
37
38
switch (NumOutPipe) {
39
case 4:
40
pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
41
pHalData->OutEpNumber = 4;
42
break;
43
case 3:
44
pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
45
pHalData->OutEpNumber = 3;
46
break;
47
case 2:
48
pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
49
pHalData->OutEpNumber = 2;
50
break;
51
case 1:
52
pHalData->OutEpQueueSel = TX_SELE_HQ;
53
pHalData->OutEpNumber = 1;
54
break;
55
default:
56
break;
57
58
}
59
RTW_INFO("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __FUNCTION__, pHalData->OutEpQueueSel, pHalData->OutEpNumber);
60
61
}
62
63
static BOOLEAN HalUsbSetQueuePipeMapping8814AUsb(
64
PADAPTER pAdapter,
65
u8 NumInPipe,
66
u8 NumOutPipe
67
)
68
{
69
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
70
BOOLEAN result = _FALSE;
71
72
_ConfigChipOutEP_8814(pAdapter, NumOutPipe);
73
74
/* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
75
if (1 == pHalData->OutEpNumber) {
76
if (1 != NumInPipe)
77
return result;
78
}
79
80
/* All config other than above support one Bulk IN and one Interrupt IN. */
81
/* if(2 != NumInPipe){ */
82
/* return result; */
83
/* } */
84
85
result = Hal_MappingOutPipe(pAdapter, NumOutPipe);
86
87
return result;
88
89
}
90
91
void rtl8814au_interface_configure(_adapter *padapter)
92
{
93
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
94
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
95
96
if (IS_SUPER_SPEED_USB(padapter)) {
97
pHalData->UsbBulkOutSize = USB_SUPER_SPEED_BULK_SIZE;/* 1024 bytes */
98
} else if (IS_HIGH_SPEED_USB(padapter)) {
99
pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
100
} else {
101
pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
102
}
103
104
#ifdef CONFIG_USB_TX_AGGREGATION
105
pHalData->UsbTxAggMode = 1;
106
pHalData->UsbTxAggDescNum = 3; /* only 4 bits */
107
#endif /* CONFIG_USB_TX_AGGREGATION */
108
109
#ifdef CONFIG_USB_RX_AGGREGATION
110
pHalData->rxagg_mode = RX_AGG_DMA;
111
pHalData->rxagg_usb_size = 8; /* unit: 512b */
112
pHalData->rxagg_usb_timeout = 0x6;
113
pHalData->rxagg_dma_size = 16; /* uint: 128b, 0x0A = 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize */
114
pHalData->rxagg_dma_timeout = 0x6; /* 6, absolute time = 34ms/(2^6) */
115
#endif /* CONFIG_USB_RX_AGGREGATION */
116
117
HalUsbSetQueuePipeMapping8814AUsb(padapter,
118
pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
119
120
}
121
122
static void
123
_InitBurstPktLen(PADAPTER Adapter)
124
{
125
u8 u1bTmp;
126
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
127
128
/* yx_qi 131128 move to 0x1448, 144c */
129
rtw_write32(Adapter, REG_FAST_EDCA_VOVI_SETTING_8814A, 0x08070807); /* yx_qi 131128 */
130
rtw_write32(Adapter, REG_FAST_EDCA_BEBK_SETTING_8814A, 0x08070807); /* yx_qi 131128 */
131
132
u1bTmp = rtw_read8(Adapter, 0xff); /* check device operation speed: SS 0xff bit7 */
133
134
if (u1bTmp & BIT7) /* USB2/1.1 Mode */
135
pHalData->bSupportUSB3 = FALSE;
136
else /* USB3 Mode */
137
pHalData->bSupportUSB3 = TRUE;
138
139
if (pHalData->bSupportUSB3 == _FALSE) { /* USB2/1.1 Mode */
140
if (pHalData->UsbBulkOutSize == 512) {
141
/* set burst pkt len=512B */
142
rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x1e);
143
} else {
144
/* set burst pkt len=64B */
145
rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x2e);
146
}
147
148
rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH_8814A, 0x2005); /* dmc agg th 20K */
149
} else { /* USB3 Mode */
150
/* set burst pkt len=1k */
151
rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x0e);
152
rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH_8814A, 0x0a05); /* dmc agg th 20K */
153
154
/* set Reg 0xf008[3:4] to 2'00 to disable U1/U2 Mode to avoid 2.5G spur in USB3.0. added by page, 20120712 */
155
rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008) & 0xE7);
156
/* to avoid usb 3.0 H2C fail */
157
rtw_write16(Adapter, 0xf002, 0);
158
159
rtw_write8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A, rtw_read8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A) & ~BIT(6));
160
RTW_INFO("turn off the LDPC pre-TX\n");
161
162
}
163
164
if (pHalData->AMPDUBurstMode)
165
rtw_write8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A, 0x5F);
166
}
167
168
169
void
170
_InitQueueReservedPage_8814AUsb(
171
PADAPTER Adapter
172
)
173
{
174
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
175
u16 txpktbuf_bndy;
176
177
RTW_INFO("===>_InitQueueReservedPage_8814AUsb()\n");
178
179
/* ---- Set Fifo page for each Queue under Mac Direct LPBK nonsec mode ------------ */
180
rtw_write32(Adapter, REG_FIFOPAGE_INFO_1_8814A, HPQ_PGNUM_8814A);
181
rtw_write32(Adapter, REG_FIFOPAGE_INFO_2_8814A, LPQ_PGNUM_8814A);
182
rtw_write32(Adapter, REG_FIFOPAGE_INFO_3_8814A, NPQ_PGNUM_8814A);
183
rtw_write32(Adapter, REG_FIFOPAGE_INFO_4_8814A, EPQ_PGNUM_8814A);
184
185
rtw_write32(Adapter, REG_FIFOPAGE_INFO_5_8814A, PUB_PGNUM_8814A);
186
187
rtw_write32(Adapter, REG_RQPN_CTRL_2_8814A, 0x80000000);
188
189
if (!pregistrypriv->wifi_spec)
190
txpktbuf_bndy = TX_PAGE_BOUNDARY_8814A;
191
else /* for WMM */
192
txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8814A;
193
194
/* Set page boundary and header */
195
rtw_write16(Adapter, REG_TXPKTBUF_BCNQ_BDNY_8814A, txpktbuf_bndy);
196
rtw_write16(Adapter, REG_TXPKTBUF_BCNQ1_BDNY_8814A, txpktbuf_bndy);
197
rtw_write16(Adapter, REG_MGQ_PGBNDY_8814A, txpktbuf_bndy);
198
199
/* Set The head page of packet of Bcnq */
200
rtw_write16(Adapter, REG_FIFOPAGE_CTRL_2_8814A, txpktbuf_bndy);
201
/* The head page of packet of Bcnq1 */
202
rtw_write16(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2, txpktbuf_bndy);
203
204
RTW_INFO("<===_InitQueueReservedPage_8814AUsb()\n");
205
}
206
207
208
static u32 _InitPowerOn_8814AU(_adapter *padapter)
209
{
210
int status = _SUCCESS;
211
u16 u2btmp = 0;
212
213
/* YX sugguested 2014.06.03 */
214
u8 u1btmp = rtw_read8(padapter, 0x10C2);
215
rtw_write8(padapter, 0x10C2, (u1btmp | BIT1));
216
217
if (!HalPwrSeqCmdParsing(padapter, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8814A_NIC_ENABLE_FLOW))
218
return _FAIL;
219
220
221
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
222
/* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
223
rtw_write16(padapter, REG_CR_8814A, 0x00); /* suggseted by zhouzhou, by page, 20111230 */
224
u2btmp = PlatformEFIORead2Byte(padapter, REG_CR_8814A);
225
u2btmp |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
226
| PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
227
rtw_write16(padapter, REG_CR_8814A, u2btmp);
228
229
_InitQueueReservedPage_8814AUsb(padapter);
230
return status;
231
}
232
233
234
235
236
237
/* ---------------------------------------------------------------
238
*
239
* MAC init functions
240
*
241
* --------------------------------------------------------------- */
242
243
/* Shall USB interface init this? */
244
static void
245
_InitInterrupt_8814AU(
246
PADAPTER Adapter
247
)
248
{
249
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
250
251
/* HIMR */
252
rtw_write32(Adapter, REG_HIMR0_8814A, pHalData->IntrMask[0] & 0xFFFFFFFF);
253
rtw_write32(Adapter, REG_HIMR1_8814A, pHalData->IntrMask[1] & 0xFFFFFFFF);
254
}
255
256
static void
257
_InitPageBoundary_8814AUsb(
258
PADAPTER Adapter
259
)
260
{
261
/* 20130416 KaiYuan modified for 8814 */
262
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
263
264
rtw_write16(Adapter, REG_RXFF_PTR_8814A, RX_DMA_BOUNDARY_8814A); /*yx_qi 20140331*/
265
266
}
267
268
269
static void
270
_InitNormalChipRegPriority_8814AUsb(
271
PADAPTER Adapter,
272
u16 beQ,
273
u16 bkQ,
274
u16 viQ,
275
u16 voQ,
276
u16 mgtQ,
277
u16 hiQ
278
)
279
{
280
u16 value16 = (PlatformEFIORead2Byte(Adapter, REG_TRXDMA_CTRL_8814A) & 0x7);
281
282
value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
283
_TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
284
_TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ) | BIT2;
285
286
rtw_write16(Adapter, REG_TRXDMA_CTRL_8814A, value16);
287
}
288
289
static void
290
_InitNormalChipTwoOutEpPriority_8814AUsb(
291
PADAPTER Adapter
292
)
293
{
294
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
295
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
296
u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
297
298
299
u16 valueHi = 0;
300
u16 valueLow = 0;
301
302
switch (pHalData->OutEpQueueSel) {
303
case (TX_SELE_HQ | TX_SELE_LQ):
304
valueHi = QUEUE_HIGH;
305
valueLow = QUEUE_LOW;
306
break;
307
case (TX_SELE_NQ | TX_SELE_LQ):
308
valueHi = QUEUE_NORMAL;
309
valueLow = QUEUE_LOW;
310
break;
311
case (TX_SELE_HQ | TX_SELE_NQ):
312
valueHi = QUEUE_HIGH;
313
valueLow = QUEUE_NORMAL;
314
break;
315
default:
316
valueHi = QUEUE_HIGH;
317
valueLow = QUEUE_NORMAL;
318
break;
319
}
320
321
if (!pregistrypriv->wifi_spec) {
322
beQ = valueLow;
323
bkQ = valueLow;
324
viQ = valueHi;
325
voQ = valueHi;
326
mgtQ = valueHi;
327
hiQ = valueHi;
328
} else { /* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
329
beQ = valueLow;
330
bkQ = valueHi;
331
viQ = valueHi;
332
voQ = valueLow;
333
mgtQ = valueHi;
334
hiQ = valueHi;
335
}
336
337
_InitNormalChipRegPriority_8814AUsb(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
338
}
339
340
static void
341
_InitNormalChipThreeOutEpPriority_8814AUsb(
342
PADAPTER Adapter
343
)
344
{
345
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
346
u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
347
348
if (!pregistrypriv->wifi_spec) { /* typical setting */
349
beQ = QUEUE_LOW;
350
bkQ = QUEUE_LOW;
351
viQ = QUEUE_NORMAL;
352
voQ = QUEUE_HIGH;
353
mgtQ = QUEUE_HIGH;
354
hiQ = QUEUE_HIGH;
355
} else { /* for WMM */
356
beQ = QUEUE_LOW;
357
bkQ = QUEUE_NORMAL;
358
viQ = QUEUE_NORMAL;
359
voQ = QUEUE_HIGH;
360
mgtQ = QUEUE_HIGH;
361
hiQ = QUEUE_HIGH;
362
}
363
_InitNormalChipRegPriority_8814AUsb(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
364
}
365
366
static void
367
_InitQueuePriority_8814AUsb(
368
PADAPTER Adapter
369
)
370
{
371
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
372
373
switch (pHalData->OutEpNumber) {
374
case 2:
375
_InitNormalChipTwoOutEpPriority_8814AUsb(Adapter);
376
break;
377
case 3:
378
case 4:
379
_InitNormalChipThreeOutEpPriority_8814AUsb(Adapter);
380
break;
381
default:
382
RTW_INFO("_InitQueuePriority_8812AUsb(): Shall not reach here!\n");
383
break;
384
}
385
}
386
387
388
389
static void
390
_InitHardwareDropIncorrectBulkOut_8814A(
391
PADAPTER Adapter
392
)
393
{
394
#ifdef ENABLE_USB_DROP_INCORRECT_OUT
395
u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);
396
value32 |= DROP_DATA_EN;
397
rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);
398
#endif /* ENABLE_USB_DROP_INCORRECT_OUT */
399
}
400
401
static void
402
_InitNetworkType_8814A(
403
PADAPTER Adapter
404
)
405
{
406
u32 value32;
407
408
value32 = rtw_read32(Adapter, REG_CR);
409
/* TODO: use the other function to set network type */
410
value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
411
412
rtw_write32(Adapter, REG_CR, value32);
413
}
414
415
static void
416
_InitTransferPageSize_8814AUsb(
417
PADAPTER Adapter
418
)
419
{
420
/* 8814 doesn't need this by Alex */
421
}
422
423
static void
424
_InitDriverInfoSize_8814A(
425
PADAPTER Adapter,
426
u8 drvInfoSize
427
)
428
{
429
rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
430
}
431
#if 0
432
/* static void
433
* _InitWMACSetting_8814A( */
434
/* PADAPTER Adapter */
435
/* ) */
436
{
437
/* u32 value32; */
438
u16 value16;
439
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
440
u32 rcr;
441
442
/* rcr = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; */
443
rcr =
444
RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF;
445
446
#if (1 == RTL8812A_RX_PACKET_INCLUDE_CRC)
447
rcr |= ACRC32;
448
#endif /* (1 == RTL8812A_RX_PACKET_INCLUDE_CRC) */
449
450
#ifdef CONFIG_RX_PACKET_APPEND_FCS
451
rcr |= RCR_APPFCS;
452
#endif /* CONFIG_RX_PACKET_APPEND_FCS */
453
454
rcr |= FORCEACK;
455
456
rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&rcr);
457
458
/* Accept all multicast address */
459
rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);
460
rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
461
462
463
/* Accept all data frames */
464
/* value16 = 0xFFFF; */
465
/* rtw_write16(Adapter, REG_RXFLTMAP2, value16); */
466
467
/* 2010.09.08 hpfan */
468
/* Since ADF is removed from RCR, ps-poll will not be indicate to driver, */
469
/* RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */
470
value16 = BIT10;
471
#ifdef CONFIG_BEAMFORMING
472
/* NDPA packet subtype is 0x0101 */
473
value16 |= BIT5;
474
#endif
475
rtw_write16(Adapter, REG_RXFLTMAP1, value16);
476
477
/* Accept all management frames */
478
/* value16 = 0xFFFF; */
479
/* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */
480
481
/* enable RX_SHIFT bits */
482
/* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); */
483
484
}
485
#endif
486
487
/* old _InitWMACSetting_8812A + _InitAdaptiveCtrl_8812AUsb = new _InitMacConfigure_8814A */
488
static void
489
_InitMacConfigure_8814A(
490
PADAPTER Adapter
491
)
492
{
493
u16 value16;
494
u32 regRRSR;
495
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
496
u32 rcr;
497
498
switch (Adapter->registrypriv.wireless_mode) {
499
case WIRELESS_11B:
500
regRRSR = RATE_ALL_CCK;
501
break;
502
503
case WIRELESS_11G:
504
case WIRELESS_11A:
505
case WIRELESS_11_5N:
506
case WIRELESS_11A_5N: /* Todo: no basic rate for ofdm ? */
507
case WIRELESS_11_5AC:
508
regRRSR = RATE_ALL_OFDM_AG;
509
break;
510
511
case WIRELESS_11BG:
512
case WIRELESS_11G_24N:
513
case WIRELESS_11_24N:
514
case WIRELESS_11BG_24N:
515
default:
516
regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
517
break;
518
519
}
520
521
/* Init value for RRSR. */
522
rtw_phydm_set_rrsr(Adapter, regRRSR, TRUE);
523
524
525
/* Retry Limit */
526
value16 = BIT_LRL(RL_VAL_STA) | BIT_SRL(RL_VAL_STA);
527
rtw_write16(Adapter, REG_RETRY_LIMIT, value16);
528
529
rcr = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF;
530
rcr |= FORCEACK;
531
#if (1 == RTL8812A_RX_PACKET_INCLUDE_CRC)
532
rcr |= ACRC32;
533
#endif /* (1 == RTL8812A_RX_PACKET_INCLUDE_CRC) */
534
535
#ifdef CONFIG_RX_PACKET_APPEND_FCS
536
rcr |= RCR_APPFCS;
537
#endif /* CONFIG_RX_PACKET_APPEND_FCS */
538
rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&rcr);
539
540
/* 2010.09.08 hpfan */
541
/* Since ADF is removed from RCR, ps-poll will not be indicate to driver, */
542
/* RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */
543
value16 = BIT10;
544
#ifdef CONFIG_BEAMFORMING
545
/* NDPA packet subtype is 0x0101 */
546
value16 |= BIT5;
547
#endif /*CONFIG_BEAMFORMING*/
548
rtw_write16(Adapter, REG_RXFLTMAP1, value16);
549
550
/* 201409/25 MH When RA is enabled, we need to reduce the value. */
551
rtw_write8(Adapter, REG_MAX_AGGR_NUM_8814A, 0x36);
552
rtw_write8(Adapter, REG_RTS_MAX_AGGR_NUM_8814A, 0x36);
553
554
}
555
556
static void
557
_InitEDCA_8814AUsb(
558
PADAPTER Adapter
559
)
560
{
561
/* Set Spec SIFS (used in NAV) */
562
rtw_write16(Adapter, REG_SPEC_SIFS, 0x100a);
563
rtw_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
564
565
/* Set SIFS for CCK */
566
rtw_write16(Adapter, REG_SIFS_CTX, 0x100a);
567
568
/* Set SIFS for OFDM */
569
rtw_write16(Adapter, REG_SIFS_TRX, 0x100a);
570
571
/* TXOP */
572
rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
573
rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
574
rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
575
rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
576
577
/* 0x50 for 80MHz clock */
578
/* rtw_write8(Adapter, REG_USTIME_TSF, 0x50); */
579
/* rtw_write8(Adapter, REG_USTIME_EDCA, 0x50); */
580
}
581
582
583
static void
584
_InitBeaconMaxError_8814A(
585
PADAPTER Adapter,
586
BOOLEAN InfraMode
587
)
588
{
589
#ifdef CONFIG_ADHOC_WORKAROUND_SETTING
590
rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);
591
#else
592
/* rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); */
593
#endif
594
}
595
596
597
#ifdef CONFIG_RTW_LED
598
static void _InitHWLed(PADAPTER Adapter)
599
{
600
struct led_priv *pledpriv = adapter_to_led(Adapter);
601
602
if (pledpriv->LedStrategy != HW_LED)
603
return;
604
605
/* HW led control
606
* to do ....
607
* must consider cases of antenna diversity/ commbo card/solo card/mini card */
608
609
}
610
#endif /* CONFIG_RTW_LED */
611
612
/*
613
static void
614
_InitRDGSetting_8812A(
615
PADAPTER Adapter
616
)
617
{
618
rtw_write8(Adapter,REG_RD_CTRL,0xFF);
619
rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200);
620
rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05);
621
}*/
622
623
static void
624
_InitRetryFunction_8814A(
625
PADAPTER Adapter
626
)
627
{
628
u8 value8;
629
630
value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
631
value8 |= EN_AMPDU_RTY_NEW;
632
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
633
634
/* Set ACK timeout */
635
/* rtw_write8(Adapter, REG_ACKTO, 0x40); */ /* masked by page for BCM IOT issue temporally */
636
rtw_write8(Adapter, REG_ACKTO, 0x80);
637
}
638
639
/*-----------------------------------------------------------------------------
640
* Function: usb_AggSettingTxUpdate()
641
*
642
* Overview: Seperate TX/RX parameters update independent for TP detection and
643
* dynamic TX/RX aggreagtion parameters update.
644
*
645
* Input: PADAPTER
646
*
647
* Output/Return: NONE
648
*
649
* Revised History:
650
* When Who Remark
651
* 12/10/2010 MHC Seperate to smaller function.
652
*
653
*---------------------------------------------------------------------------*/
654
static void
655
usb_AggSettingTxUpdate_8814A(
656
PADAPTER Adapter
657
)
658
{
659
#ifdef CONFIG_USB_TX_AGGREGATION
660
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
661
u32 value32;
662
663
if (Adapter->registrypriv.wifi_spec)
664
pHalData->UsbTxAggDescNum = 1;
665
666
if (pHalData->UsbTxAggMode) {
667
value32 = rtw_read32(Adapter, REG_TDECTRL);
668
value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
669
value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
670
671
rtw_write32(Adapter, REG_TDECTRL, value32);
672
rtw_write8(Adapter, REG_TDECTRL + 3, pHalData->UsbTxAggDescNum << 1);
673
}
674
675
#endif /* CONFIG_USB_TX_AGGREGATION */
676
} /* usb_AggSettingTxUpdate */
677
678
679
/*-----------------------------------------------------------------------------
680
* Function: usb_AggSettingRxUpdate()
681
*
682
* Overview: Seperate TX/RX parameters update independent for TP detection and
683
* dynamic TX/RX aggreagtion parameters update.
684
*
685
* Input: PADAPTER
686
*
687
* Output/Return: NONE
688
*
689
* Revised History:
690
* When Who Remark
691
* 12/10/2010 MHC Seperate to smaller function.
692
*
693
*---------------------------------------------------------------------------*/
694
static void
695
usb_AggSettingRxUpdate_8814A(
696
PADAPTER Adapter
697
)
698
{
699
#ifdef CONFIG_USB_RX_AGGREGATION
700
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
701
u8 valueDMA;
702
u8 valueUSB;
703
704
valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL_8814A);
705
valueUSB = rtw_read8(Adapter, REG_RXDMA_AGG_PG_TH_8814A + 3);
706
switch (pHalData->rxagg_mode) {
707
case RX_AGG_DMA:
708
valueDMA |= RXDMA_AGG_EN;
709
valueUSB &= ~USB_AGG_EN_8814A;
710
break;
711
case RX_AGG_USB:
712
valueDMA &= ~RXDMA_AGG_EN;
713
valueUSB |= USB_AGG_EN_8814A;
714
break;
715
case RX_AGG_MIX:
716
valueDMA |= RXDMA_AGG_EN;
717
valueUSB |= USB_AGG_EN_8814A;
718
break;
719
case RX_AGG_DISABLE:
720
default:
721
valueDMA &= ~RXDMA_AGG_EN;
722
valueUSB &= ~USB_AGG_EN_8814A;
723
break;
724
}
725
726
rtw_write8(Adapter, REG_TRXDMA_CTRL_8814A, valueDMA);
727
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH_8814A + 3, valueUSB); /* yx_qi 131128 */
728
#endif /* CONFIG_USB_RX_AGGREGATION */
729
} /* usb_AggSettingRxUpdate */
730
731
static void
732
init_UsbAggregationSetting_8814A(
733
PADAPTER Adapter
734
)
735
{
736
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
737
738
/* Tx aggregation setting */
739
usb_AggSettingTxUpdate_8814A(Adapter);
740
741
/* Rx aggregation setting */
742
usb_AggSettingRxUpdate_8814A(Adapter);
743
744
/* 201/12/10 MH Add for USB agg mode dynamic switch. */
745
pHalData->UsbRxHighSpeedMode = _FALSE;
746
pHalData->UsbTxVeryHighSpeedMode = _FALSE;
747
}
748
749
/*-----------------------------------------------------------------------------
750
* Function: USB_AggModeSwitch()
751
*
752
* Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase
753
* RX speed by increasing batch indication size. This will decrease TCP ACK speed, we
754
* need to monitor the influence of FTP/network share.
755
* For TX mode, we are still ubder investigation.
756
*
757
* Input: PADAPTER
758
*
759
* Output: NONE
760
*
761
* Return: NONE
762
*
763
* Revised History:
764
* When Who Remark
765
* 12/10/2010 MHC Create Version 0.
766
*
767
*---------------------------------------------------------------------------*/
768
void
769
USB_AggModeSwitch(
770
PADAPTER Adapter
771
)
772
{
773
#if 0
774
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
775
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
776
777
/* pHalData->UsbRxHighSpeedMode = _FALSE; */
778
/* How to measure the RX speed? We assume that when traffic is more than */
779
if (pMgntInfo->bRegAggDMEnable == _FALSE) {
780
return; /* Inf not support. */
781
}
782
783
784
if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == _TRUE &&
785
pHalData->UsbRxHighSpeedMode == _FALSE) {
786
pHalData->UsbRxHighSpeedMode = _TRUE;
787
} else if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == _FALSE &&
788
pHalData->UsbRxHighSpeedMode == _TRUE) {
789
pHalData->UsbRxHighSpeedMode = _FALSE;
790
} else
791
return;
792
793
794
#if USB_RX_AGGREGATION_92C
795
if (pHalData->UsbRxHighSpeedMode == _TRUE) {
796
/* 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. */
797
/* USB mode */
798
#if (RT_PLATFORM == PLATFORM_LINUX)
799
if (pMgntInfo->LinkDetectInfo.bTxBusyTraffic) {
800
pHalData->RxAggBlockCount = 16;
801
pHalData->RxAggBlockTimeout = 7;
802
} else
803
#endif
804
{
805
pHalData->RxAggBlockCount = 40;
806
pHalData->RxAggBlockTimeout = 5;
807
}
808
/* Mix mode */
809
pHalData->RxAggPageCount = 72;
810
pHalData->RxAggPageTimeout = 6;
811
} else {
812
/* USB mode */
813
pHalData->RxAggBlockCount = pMgntInfo->RegRxAggBlockCount;
814
pHalData->RxAggBlockTimeout = pMgntInfo->RegRxAggBlockTimeout;
815
/* Mix mode */
816
pHalData->RxAggPageCount = pMgntInfo->RegRxAggPageCount;
817
pHalData->RxAggPageTimeout = pMgntInfo->RegRxAggPageTimeout;
818
}
819
820
if (pHalData->RxAggBlockCount > MAX_RX_AGG_BLKCNT)
821
pHalData->RxAggBlockCount = MAX_RX_AGG_BLKCNT;
822
#if (OS_WIN_FROM_VISTA(OS_VERSION)) || (RT_PLATFORM == PLATFORM_LINUX) /* do not support WINXP to prevent usbehci.sys BSOD */
823
if (IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter)) {
824
/* */
825
/* 2010/12/24 MH According to V1012 QC IOT test, XP BSOD happen when running chariot test */
826
/* with the aggregation dynamic change!! We need to disable the function to prevent it is broken */
827
/* in usbehci.sys. */
828
/* */
829
usb_AggSettingRxUpdate_8188E(Adapter);
830
831
/* 2010/12/27 MH According to designer's suggstion, we can only modify Timeout value. Otheriwse */
832
/* there might many HW incorrect behavior, the XP BSOD at usbehci.sys may be relative to the */
833
/* issue. Base on the newest test, we can not enable block cnt > 30, otherwise XP usbehci.sys may */
834
/* BSOD. */
835
}
836
#endif
837
838
#endif
839
#endif
840
} /* USB_AggModeSwitch */
841
842
843
#if 0
844
/* static void _BBTurnOnBlock( */
845
/* PADAPTER Adapter */
846
/* ) */
847
{
848
#if (DISABLE_BB_RF)
849
return;
850
#endif
851
852
phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
853
phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
854
}
855
#endif
856
857
858
/*
859
* 2010/08/26 MH Add for selective suspend mode check.
860
* If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and
861
* slim card.
862
* */
863
#if 0
864
static void
865
HalDetectSelectiveSuspendMode(
866
PADAPTER Adapter
867
)
868
{
869
u8 tmpvalue;
870
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
871
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
872
873
/* If support HW radio detect, we need to enable WOL ability, otherwise, we */
874
/* can not use FW to notify host the power state switch. */
875
876
EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue);
877
878
RTW_INFO("HalDetectSelectiveSuspendMode(): SS ");
879
if (tmpvalue & BIT1)
880
RTW_INFO("Enable\n");
881
else {
882
RTW_INFO("Disable\n");
883
pdvobjpriv->RegUsbSS = _FALSE;
884
}
885
886
/* 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. */
887
if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) {
888
/* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */
889
890
/* if (!pMgntInfo->bRegDongleSS) */
891
/* { */
892
pdvobjpriv->RegUsbSS = _FALSE;
893
/* } */
894
}
895
} /* HalDetectSelectiveSuspendMode */
896
#endif
897
898
rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter)
899
{
900
rt_rf_power_state rfpowerstate = rf_on;
901
902
return rfpowerstate;
903
} /* HalDetectPwrDownMode */
904
905
void _ps_open_RF(_adapter *padapter)
906
{
907
/* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */
908
/* phy_SsPwrSwitch92CU(padapter, rf_on, 1); */
909
}
910
911
void _ps_close_RF(_adapter *padapter)
912
{
913
/* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */
914
/* phy_SsPwrSwitch92CU(padapter, rf_off, 1); */
915
}
916
917
918
/* A lightweight deinit function */
919
static void rtl8814au_hw_reset(_adapter *Adapter)
920
{
921
#if 0
922
u8 reg_val = 0;
923
if (rtw_read8(Adapter, REG_MCUFWDL) & BIT7) {
924
_8051Reset8812(Adapter);
925
rtw_write8(Adapter, REG_MCUFWDL, 0x00);
926
/* before BB reset should do clock gated */
927
rtw_write32(Adapter, rFPGA0_XCD_RFPara,
928
rtw_read32(Adapter, rFPGA0_XCD_RFPara) | (BIT6));
929
/* reset BB */
930
reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN);
931
reg_val &= ~(BIT(0) | BIT(1));
932
rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val);
933
/* reset RF */
934
rtw_write8(Adapter, REG_RF_CTRL, 0);
935
/* reset TRX path */
936
rtw_write16(Adapter, REG_CR, 0);
937
/* reset MAC */
938
reg_val = rtw_read8(Adapter, REG_APS_FSMCO + 1);
939
reg_val |= BIT(1);
940
reg_val = rtw_write8(Adapter, REG_APS_FSMCO + 1, reg_val); /* reg0x5[1] ,auto FSM off */
941
942
reg_val = rtw_read8(Adapter, REG_APS_FSMCO + 1);
943
944
/* check if reg0x5[1] auto cleared */
945
while (reg_val & BIT(1)) {
946
rtw_udelay_os(1);
947
reg_val = rtw_read8(Adapter, REG_APS_FSMCO + 1);
948
}
949
reg_val |= BIT(0);
950
reg_val = rtw_write8(Adapter, REG_APS_FSMCO + 1, reg_val); /* reg0x5[0] ,auto FSM on */
951
952
reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1);
953
reg_val &= ~(BIT(4) | BIT(7));
954
rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, reg_val);
955
reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1);
956
reg_val |= BIT(4) | BIT(7);
957
rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, reg_val);
958
}
959
#endif /* 0 */
960
}
961
962
u32 rtl8814au_hal_init(PADAPTER Adapter)
963
{
964
u8 value8 = 0, u1bRegCR;
965
u16 value16;
966
u8 txpktbuf_bndy;
967
u32 status = _SUCCESS;
968
u32 NavUpper = WiFiNavUpperUs;
969
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
970
struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter);
971
struct registry_priv *pregistrypriv = &Adapter->registrypriv;
972
973
rt_rf_power_state eRfPowerStateToSet;
974
975
systime init_start_time = rtw_get_current_time();
976
977
978
#ifdef DBG_HAL_INIT_PROFILING
979
980
enum HAL_INIT_STAGES {
981
HAL_INIT_STAGES_BEGIN = 0,
982
HAL_INIT_STAGES_INIT_PW_ON,
983
HAL_INIT_STAGES_INIT_LLTT,
984
HAL_INIT_STAGES_DOWNLOAD_FW,
985
HAL_INIT_STAGES_MAC,
986
HAL_INIT_STAGES_MISC01,
987
HAL_INIT_STAGES_MISC02,
988
HAL_INIT_STAGES_BB,
989
HAL_INIT_STAGES_RF,
990
HAL_INIT_STAGES_TURN_ON_BLOCK,
991
HAL_INIT_STAGES_INIT_SECURITY,
992
HAL_INIT_STAGES_MISC11,
993
HAL_INIT_STAGES_INIT_HAL_DM,
994
/* HAL_INIT_STAGES_RF_PS, */
995
HAL_INIT_STAGES_IQK,
996
HAL_INIT_STAGES_PW_TRACK,
997
HAL_INIT_STAGES_LCK,
998
HAL_INIT_STAGES_MISC21,
999
/* HAL_INIT_STAGES_INIT_PABIAS, */
1000
#ifdef CONFIG_BT_COEXIST
1001
HAL_INIT_STAGES_BT_COEXIST,
1002
#endif
1003
/* HAL_INIT_STAGES_ANTENNA_SEL, */
1004
HAL_INIT_STAGES_MISC31,
1005
HAL_INIT_STAGES_END,
1006
HAL_INIT_STAGES_NUM
1007
};
1008
1009
char *hal_init_stages_str[] = {
1010
"HAL_INIT_STAGES_BEGIN",
1011
"HAL_INIT_STAGES_INIT_PW_ON",
1012
"HAL_INIT_STAGES_INIT_LLTT",
1013
"HAL_INIT_STAGES_DOWNLOAD_FW",
1014
"HAL_INIT_STAGES_MAC",
1015
"HAL_INIT_STAGES_MISC01",
1016
"HAL_INIT_STAGES_MISC02",
1017
"HAL_INIT_STAGES_BB",
1018
"HAL_INIT_STAGES_RF",
1019
"HAL_INIT_STAGES_TURN_ON_BLOCK",
1020
"HAL_INIT_STAGES_INIT_SECURITY",
1021
"HAL_INIT_STAGES_MISC11",
1022
"HAL_INIT_STAGES_INIT_HAL_DM",
1023
/* "HAL_INIT_STAGES_RF_PS", */
1024
"HAL_INIT_STAGES_IQK",
1025
"HAL_INIT_STAGES_PW_TRACK",
1026
"HAL_INIT_STAGES_LCK",
1027
"HAL_INIT_STAGES_MISC21",
1028
#ifdef CONFIG_BT_COEXIST
1029
"HAL_INIT_STAGES_BT_COEXIST",
1030
#endif
1031
/* "HAL_INIT_STAGES_ANTENNA_SEL", */
1032
"HAL_INIT_STAGES_MISC31",
1033
"HAL_INIT_STAGES_END",
1034
};
1035
1036
int hal_init_profiling_i;
1037
systime hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; /* used to record the time of each stage's starting point */
1038
1039
for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM; hal_init_profiling_i++)
1040
hal_init_stages_timestamp[hal_init_profiling_i] = 0;
1041
1042
#define HAL_INIT_PROFILE_TAG(stage) do { hal_init_stages_timestamp[(stage)] = rtw_get_current_time(); } while (0)
1043
#else /* DBG_HAL_INIT_PROFILING */
1044
#define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
1045
#endif /* DBG_HAL_INIT_PROFILING */
1046
1047
1048
1049
1050
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
1051
if (pwrctrlpriv->bkeepfwalive) {
1052
_ps_open_RF(Adapter);
1053
1054
if (pHalData->bIQKInitialized) {
1055
/* phy_iq_calibrate_8812a(Adapter,_TRUE); */
1056
} else {
1057
/* phy_iq_calibrate_8812a(Adapter,_FALSE); */
1058
/* pHalData->bIQKInitialized = _TRUE; */
1059
}
1060
1061
/* odm_txpowertracking_check(&pHalData->odmpriv ); */
1062
/* phy_lc_calibrate_8812a(Adapter); */
1063
1064
goto exit;
1065
}
1066
1067
/* Check if MAC has already power on. by tynli. 2011.05.27. */
1068
value8 = rtw_read8(Adapter, REG_SYS_CLKR + 1);
1069
u1bRegCR = rtw_read8(Adapter, REG_CR);
1070
RTW_INFO(" power-on :REG_SYS_CLKR 0x09=0x%02x. REG_CR 0x100=0x%02x.\n", value8, u1bRegCR);
1071
if ((value8 & BIT3) && (u1bRegCR != 0 && u1bRegCR != 0xEA)) {
1072
/* pHalData->bMACFuncEnable = _TRUE; */
1073
RTW_INFO(" MAC has already power on.\n");
1074
} else {
1075
/* pHalData->bMACFuncEnable = _FALSE; */
1076
/* Set FwPSState to ALL_ON mode to prevent from the I/O be return because of 32k */
1077
/* state which is set before sleep under wowlan mode. 2012.01.04. by tynli. */
1078
/* pHalData->FwPSState = FW_PS_STATE_ALL_ON_88E; */
1079
RTW_INFO(" MAC has not been powered on yet.\n");
1080
}
1081
1082
/* */
1083
/* 2012/11/13 MH Revise for U2/U3 switch we can not update RF-A/B reset. */
1084
/* After discuss with BB team YN, reset after MAC power on to prevent RF */
1085
/* R/W error. Is it a right method? */
1086
/* */
1087
/*if(!IS_HARDWARE_TYPE_8821(Adapter))
1088
{
1089
rtw_write8(Adapter, REG_RF_CTRL, 5);
1090
rtw_write8(Adapter, REG_RF_CTRL, 7);
1091
rtw_write8(Adapter, REG_RF_B_CTRL_8812, 5);
1092
rtw_write8(Adapter, REG_RF_B_CTRL_8812, 7);
1093
}*/
1094
1095
/*
1096
If HW didn't go through a complete de-initial procedure,
1097
it probably occurs some problem for double initial procedure.
1098
Like "CONFIG_DEINIT_BEFORE_INIT" in 92du chip
1099
*/
1100
rtl8814au_hw_reset(Adapter); /* todo */
1101
1102
1103
1104
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
1105
status = rtw_hal_power_on(Adapter);
1106
if (status == _FAIL) {
1107
RTW_INFO("Failed to init power on!\n");
1108
goto exit;
1109
}
1110
1111
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
1112
1113
status = InitLLTTable8814A(Adapter);
1114
if (status == _FAIL) {
1115
RTW_INFO("Failed to init LLT table\n");
1116
goto exit;
1117
}
1118
1119
_InitHardwareDropIncorrectBulkOut_8814A(Adapter);
1120
1121
/*if(pHalData->bRDGEnable){
1122
_InitRDGSetting_8812A(Adapter);
1123
}*/
1124
1125
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
1126
if (Adapter->registrypriv.mp_mode == 0) {
1127
status = FirmwareDownload8814A(Adapter, _FALSE);
1128
if (status != _SUCCESS) {
1129
RTW_INFO("%s: Download Firmware failed!!\n", __FUNCTION__);
1130
pHalData->bFWReady = _FALSE;
1131
pHalData->fw_ractrl = _FALSE;
1132
/* return status; */
1133
} else {
1134
RTW_INFO("%s: Download Firmware Success!!\n", __FUNCTION__);
1135
pHalData->bFWReady = _TRUE;
1136
pHalData->fw_ractrl = _TRUE;
1137
}
1138
}
1139
1140
if (pwrctrlpriv->reg_rfoff == _TRUE)
1141
pwrctrlpriv->rf_pwrstate = rf_off;
1142
1143
/* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
1144
/* HW GPIO pin. Before PHY_RFConfig8192C. */
1145
/* HalDetectPwrDownMode(Adapter); */
1146
/* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
1147
/* HalDetectSelectiveSuspendMode(Adapter); */
1148
1149
/* Save target channel */
1150
/* <Roger_Notes> Current Channel will be updated again later. */
1151
pHalData->current_channel = 0;/* set 0 to trigger switch correct channel */
1152
1153
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
1154
#if (HAL_MAC_ENABLE == 1)
1155
status = PHY_MACConfig8814(Adapter);
1156
if (status == _FAIL)
1157
goto exit;
1158
#endif /* HAL_MAC_ENABLE */
1159
1160
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
1161
1162
_InitQueuePriority_8814AUsb(Adapter);
1163
_InitPageBoundary_8814AUsb(Adapter);
1164
1165
_InitTransferPageSize_8814AUsb(Adapter);
1166
1167
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
1168
/* Get Rx PHY status in order to report RSSI and others. */
1169
_InitDriverInfoSize_8814A(Adapter, DRVINFO_SZ);
1170
1171
_InitInterrupt_8814AU(Adapter);
1172
_InitNetworkType_8814A(Adapter);/* set msr */
1173
_InitMacConfigure_8814A(Adapter);
1174
/* _InitWMACSetting_8814A(Adapter); */
1175
/* _InitAdaptiveCtrl_8814AUsb(Adapter); */
1176
_InitEDCA_8814AUsb(Adapter);
1177
1178
_InitRetryFunction_8814A(Adapter);
1179
init_UsbAggregationSetting_8814A(Adapter);
1180
1181
_InitBeaconParameters_8814A(Adapter);
1182
_InitBeaconMaxError_8814A(Adapter, _TRUE);
1183
1184
_InitBurstPktLen(Adapter); /* added by page. 20110919 */
1185
1186
/* */
1187
/* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
1188
/* Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. */
1189
/* 2011.08.05. by tynli. */
1190
/* */
1191
value8 = rtw_read8(Adapter, REG_CR);
1192
rtw_write8(Adapter, REG_CR, (value8 | MACTXEN | MACRXEN));
1193
1194
#ifdef CONFIG_RTW_LED
1195
_InitHWLed(Adapter);
1196
#endif /* CONFIG_RTW_LED */
1197
1198
/* */
1199
/* d. Initialize BB related configurations. */
1200
/* */
1201
1202
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
1203
#if (HAL_BB_ENABLE == 1)
1204
status = PHY_BBConfig8814(Adapter);
1205
if (status == _FAIL)
1206
goto exit;
1207
#endif /* HAL_BB_ENABLE */
1208
1209
/* 92CU use 3-wire to r/w RF */
1210
/* pHalData->Rf_Mode = RF_OP_By_SW_3wire; */
1211
1212
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
1213
#if (HAL_RF_ENABLE == 1)
1214
status = PHY_RFConfig8814A(Adapter);
1215
if (status == _FAIL)
1216
goto exit;
1217
1218
/* todo: */
1219
/* if(pHalData->rf_type == RF_1T1R && IS_HARDWARE_TYPE_8812AU(Adapter)) */
1220
/* PHY_BB8812_Config_1T(Adapter); */
1221
#endif
1222
1223
PHY_ConfigBB_8814A(Adapter);
1224
1225
if (Adapter->registrypriv.channel <= 14)
1226
PHY_SwitchWirelessBand8814A(Adapter, BAND_ON_2_4G);
1227
else
1228
PHY_SwitchWirelessBand8814A(Adapter, BAND_ON_5G);
1229
1230
rtw_hal_set_chnl_bw(Adapter, Adapter->registrypriv.channel,
1231
CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE);
1232
1233
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
1234
1235
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
1236
invalidate_cam_all(Adapter);
1237
1238
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
1239
1240
/* HW SEQ CTRL */
1241
/* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
1242
rtw_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
1243
1244
/* */
1245
/* Disable BAR, suggested by Scott */
1246
/* 2010.04.09 add by hpfan */
1247
/* */
1248
rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
1249
1250
rtw_write8(Adapter, REG_SECONDARY_CCA_CTRL_8814A, 0x03);
1251
1252
if (pregistrypriv->wifi_spec)
1253
rtw_write16(Adapter, REG_FAST_EDCA_CTRL , 0);
1254
/* adjust EDCCA to avoid collision */
1255
/*if(pregistrypriv->wifi_spec)
1256
{
1257
rtw_write16(Adapter, rEDCCA_Jaguar, 0xfe01);
1258
}*/
1259
/* Nav limit , suggest by scott */
1260
rtw_write8(Adapter, 0x652, 0x0);
1261
1262
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
1263
rtl8814_InitHalDm(Adapter);
1264
1265
/* */
1266
/* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
1267
/* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
1268
/* call init_adapter. May cause some problem?? */
1269
/* */
1270
/* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
1271
/* in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState */
1272
/* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
1273
/* Added by tynli. 2010.03.30. */
1274
pwrctrlpriv->rf_pwrstate = rf_on;
1275
1276
/*phy_iq_calibrate_8814a_init(&pHalData->odmpriv);*/
1277
1278
#if (HAL_BB_ENABLE == 1)
1279
PHY_SetRFEReg8814A(Adapter, _TRUE, pHalData->current_band_type);
1280
#endif /* HAL_BB_ENABLE */
1281
1282
/* 0x4c6[3] 1: RTS BW = Data BW */
1283
/* 0: RTS BW depends on CCA / secondary CCA result. */
1284
rtw_write8(Adapter, REG_QUEUE_CTRL, rtw_read8(Adapter, REG_QUEUE_CTRL) & 0xF7);
1285
1286
rtw_hal_set_hwreg(Adapter, HW_VAR_NAV_UPPER, ((u8 *)&NavUpper));
1287
1288
/* enable Tx report. */
1289
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F);
1290
1291
/* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
1292
/* rtw_write8(Adapter, REG_EARLY_MODE_CONTROL_8812+3, 0x01); */ /* Pretx_en, for WEP/TKIP SEC */
1293
1294
/* tynli_test_tx_report. */
1295
/* rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); */
1296
1297
/* Reset USB mode switch setting */
1298
rtw_write8(Adapter, REG_SDIO_CTRL_8814A, 0x0);
1299
rtw_write8(Adapter, REG_ACLK_MON, 0x0);
1300
1301
1302
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
1303
/* 2010/08/26 MH Merge from 8192CE. */
1304
if (pwrctrlpriv->rf_pwrstate == rf_on) {
1305
/* if(IS_HARDWARE_TYPE_8812AU(Adapter))
1306
{
1307
#if (RTL8812A_SUPPORT == 1)
1308
pHalData->bNeedIQK = _TRUE;
1309
if(pHalData->bIQKInitialized)
1310
phy_iq_calibrate_8812a(Adapter, _TRUE);
1311
else
1312
{
1313
phy_iq_calibrate_8812a(Adapter, _FALSE);
1314
pHalData->bIQKInitialized = _TRUE;
1315
}
1316
#endif
1317
}*/
1318
/* this should be done by rf team using phydm code */
1319
/* phy_iq_calibrate_8814a(&pHalData->odmpriv, _FALSE); */
1320
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
1321
1322
/* odm_txpowertracking_check(&pHalData->odmpriv ); */
1323
1324
1325
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
1326
/* phy_lc_calibrate_8812a(Adapter); */
1327
}
1328
1329
1330
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21);
1331
1332
#if (MP_DRIVER == 1)
1333
if (Adapter->registrypriv.mp_mode == 1) {
1334
Adapter->mppriv.channel = pHalData->current_channel;
1335
MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel);
1336
}
1337
#endif /* #if (MP_DRIVER == 1) */
1338
1339
#ifdef CONFIG_BT_COEXIST
1340
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST);
1341
/* _InitBTCoexist(Adapter); */
1342
1343
if (_TRUE == pHalData->EEPROMBluetoothCoexist) {
1344
/* Init BT hw config. */
1345
rtw_btcoex_HAL_Initialize(Adapter, _FALSE);
1346
} else {
1347
/* In combo card run wifi only , must setting some hardware reg. */
1348
rtl8812a_combo_card_WifiOnlyHwInit(Adapter);
1349
}
1350
#endif /* CONFIG_BT_COEXIST */
1351
1352
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31);
1353
1354
/* rtw_write8(Adapter, REG_USB_HRPWM, 0); */
1355
1356
#ifdef CONFIG_XMIT_ACK
1357
/* ack for xmit mgmt frames. */
1358
rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
1359
#endif /* CONFIG_XMIT_ACK */
1360
1361
1362
exit:
1363
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
1364
1365
RTW_INFO("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time));
1366
1367
#ifdef DBG_HAL_INIT_PROFILING
1368
hal_init_stages_timestamp[HAL_INIT_STAGES_END] = rtw_get_current_time();
1369
1370
for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM - 1; hal_init_profiling_i++) {
1371
RTW_INFO("DBG_HAL_INIT_PROFILING: %35s, %u, %5u, %5u\n"
1372
, hal_init_stages_str[hal_init_profiling_i]
1373
, hal_init_stages_timestamp[hal_init_profiling_i]
1374
, (hal_init_stages_timestamp[hal_init_profiling_i + 1] - hal_init_stages_timestamp[hal_init_profiling_i])
1375
, rtw_get_time_interval_ms(hal_init_stages_timestamp[hal_init_profiling_i], hal_init_stages_timestamp[hal_init_profiling_i + 1])
1376
);
1377
}
1378
#endif
1379
1380
1381
1382
return status;
1383
}
1384
1385
void
1386
hal_carddisable_8814(
1387
PADAPTER Adapter
1388
)
1389
{
1390
u8 u1bTmp;
1391
1392
RTW_INFO("CardDisableRTL8814AU\n");
1393
1394
/* stop rx */
1395
rtw_write8(Adapter, REG_CR_8814A, 0x0);
1396
1397
/* Card disable power action flow */
1398
HalPwrSeqCmdParsing(Adapter, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8814A_NIC_DISABLE_FLOW);
1399
1400
GET_HAL_DATA(Adapter)->bFWReady = _FALSE;
1401
1402
}
1403
1404
static void rtl8814au_hw_power_down(_adapter *padapter)
1405
{
1406
/* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
1407
/* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
1408
1409
/* Enable register area 0x0-0xc. */
1410
rtw_write8(padapter, REG_RSV_CTRL, 0x0);
1411
rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
1412
}
1413
1414
u32 rtl8814au_hal_deinit(PADAPTER Adapter)
1415
{
1416
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter);
1417
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1418
RTW_INFO("==> %s\n", __FUNCTION__);
1419
1420
#ifdef CONFIG_BT_COEXIST
1421
if (hal_btcoex_IsBtExist(Adapter)) {
1422
RTW_INFO("BT module enable SIC\n");
1423
/* Only under WIN7 we can support selective suspend and enter D3 state when system call halt adapter. */
1424
1425
/* rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)|BIT12); */
1426
/* 2010/10/13 MH If we enable SIC in the position and then call _ResetDigitalProcedure1. in XP, */
1427
/* the system will hang due to 8051 reset fail. */
1428
} else
1429
#endif /* CONFIG_BT_COEXIST */
1430
{
1431
rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG) & (~BIT12));
1432
}
1433
1434
if (pHalData->bSupportUSB3 == _TRUE) {
1435
/* set Reg 0xf008[3:4] to 2'11 to eable U1/U2 Mode in USB3.0. added by page, 20120712 */
1436
rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008) | 0x18);
1437
}
1438
1439
rtw_write32(Adapter, REG_HISR, 0xFFFFFFFF);
1440
rtw_write32(Adapter, REG_HISRE, 0xFFFFFFFF);
1441
rtw_write32(Adapter, REG_HIMR, 0);
1442
rtw_write32(Adapter, REG_HIMRE, 0);
1443
1444
#ifdef SUPPORT_HW_RFOFF_DETECTED
1445
RTW_INFO("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive);
1446
if (pwrctl->bkeepfwalive) {
1447
_ps_close_RF(Adapter);
1448
if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown))
1449
rtl8814au_hw_power_down(Adapter);
1450
} else
1451
#endif
1452
{
1453
if (rtw_is_hw_init_completed(Adapter)) {
1454
rtw_hal_power_off(Adapter);
1455
1456
if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown))
1457
rtl8814au_hw_power_down(Adapter);
1458
}
1459
}
1460
return _SUCCESS;
1461
}
1462
1463
1464
unsigned int rtl8814au_inirp_init(PADAPTER Adapter)
1465
{
1466
u8 i;
1467
struct recv_buf *precvbuf;
1468
uint status;
1469
struct dvobj_priv *pdev = adapter_to_dvobj(Adapter);
1470
struct intf_hdl *pintfhdl = &Adapter->iopriv.intf;
1471
struct recv_priv *precvpriv = &(Adapter->recvpriv);
1472
u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
1473
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
1474
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1475
u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
1476
#endif
1477
1478
1479
_read_port = pintfhdl->io_ops._read_port;
1480
1481
status = _SUCCESS;
1482
1483
1484
precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
1485
1486
/* issue Rx irp to receive data */
1487
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1488
for (i = 0; i < NR_RECVBUFF; i++) {
1489
if (_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE) {
1490
status = _FAIL;
1491
goto exit;
1492
}
1493
1494
precvbuf++;
1495
precvpriv->free_recv_buf_queue_cnt--;
1496
}
1497
1498
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
1499
if (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] != 0x05) {
1500
status = _FAIL;
1501
RTW_INFO("%s =>Warning !! Have not USB Int-IN pipe, RtIntInPipe(%d)!!!\n", __func__, pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX]);
1502
goto exit;
1503
}
1504
_read_interrupt = pintfhdl->io_ops._read_interrupt;
1505
if (_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE) {
1506
status = _FAIL;
1507
}
1508
#endif
1509
1510
exit:
1511
1512
1513
1514
return status;
1515
1516
}
1517
1518
unsigned int rtl8814au_inirp_deinit(PADAPTER Adapter)
1519
{
1520
1521
rtw_read_port_cancel(Adapter);
1522
1523
1524
return _SUCCESS;
1525
}
1526
1527
/* -------------------------------------------------------------------
1528
*
1529
* EEPROM/EFUSE Content Parsing
1530
*
1531
* ------------------------------------------------------------------- */
1532
void
1533
hal_ReadIDs_8814AU(
1534
PADAPTER Adapter,
1535
u8 *PROMContent,
1536
BOOLEAN AutoloadFail
1537
)
1538
{
1539
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1540
1541
if (!AutoloadFail) {
1542
pHalData->EEPROMVID = ReadLE2Byte(&PROMContent[EEPROM_VID_8814AU]);
1543
pHalData->EEPROMPID = ReadLE2Byte(&PROMContent[EEPROM_PID_8814AU]);
1544
1545
/* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1546
pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CustomID_8814];
1547
pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1548
} else {
1549
pHalData->EEPROMVID = EEPROM_Default_VID;
1550
pHalData->EEPROMPID = EEPROM_Default_PID;
1551
1552
/* Customer ID, 0x00 and 0xff are reserved for Realtek. */
1553
pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID;
1554
pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1555
}
1556
1557
RTW_INFO("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID);
1558
RTW_INFO("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID);
1559
}
1560
1561
1562
void
1563
hal_CustomizedBehavior_8814AU(
1564
PADAPTER Adapter
1565
)
1566
{
1567
#ifdef CONFIG_RTW_SW_LED
1568
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1569
struct led_priv *pledpriv = adapter_to_led(Adapter);
1570
1571
1572
/* Led mode */
1573
switch (pHalData->CustomerID) {
1574
case RT_CID_DEFAULT:
1575
pledpriv->LedStrategy = SW_LED_MODE9;
1576
pledpriv->bRegUseLed = _TRUE;
1577
break;
1578
1579
default:
1580
pledpriv->LedStrategy = SW_LED_MODE9;
1581
break;
1582
}
1583
#endif
1584
}
1585
1586
static void
1587
hal_CustomizeByCustomerID_8814AU(
1588
PADAPTER pAdapter
1589
)
1590
{
1591
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1592
1593
RTW_INFO("PID= 0x%x, VID= %x\n", pHalData->EEPROMPID, pHalData->EEPROMVID);
1594
1595
/* Decide CustomerID according to VID/DID or EEPROM */
1596
switch (pHalData->EEPROMCustomerID) {
1597
case EEPROM_CID_DEFAULT:
1598
if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308))
1599
pHalData->CustomerID = RT_CID_DLINK;
1600
else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309))
1601
pHalData->CustomerID = RT_CID_DLINK;
1602
else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a))
1603
pHalData->CustomerID = RT_CID_DLINK;
1604
else if ((pHalData->EEPROMVID == 0x0BFF) && (pHalData->EEPROMPID == 0x8160))
1605
pHalData->CustomerID = RT_CID_CHINA_MOBILE;
1606
else if ((pHalData->EEPROMVID == 0x0BDA) && (pHalData->EEPROMPID == 0x5088))
1607
pHalData->CustomerID = RT_CID_CC_C;
1608
1609
break;
1610
case EEPROM_CID_WHQL:
1611
/* padapter->bInHctTest = _TRUE; */
1612
1613
/* pMgntInfo->bSupportTurboMode = _FALSE; */
1614
/* pMgntInfo->bAutoTurboBy8186 = _FALSE; */
1615
1616
/* pMgntInfo->PowerSaveControl.bInactivePs = _FALSE; */
1617
/* pMgntInfo->PowerSaveControl.bIPSModeBackup = _FALSE; */
1618
/* pMgntInfo->PowerSaveControl.bLeisurePs = _FALSE; */
1619
/* pMgntInfo->PowerSaveControl.bLeisurePsModeBackup = _FALSE; */
1620
/* pMgntInfo->keepAliveLevel = 0; */
1621
1622
/* padapter->bUnloadDriverwhenS3S4 = _FALSE; */
1623
break;
1624
default:
1625
pHalData->CustomerID = RT_CID_DEFAULT;
1626
break;
1627
1628
}
1629
RTW_INFO("Customer ID: 0x%2x\n", pHalData->CustomerID);
1630
1631
hal_CustomizedBehavior_8814AU(pAdapter);
1632
}
1633
1634
void
1635
hal_ReadUsbModeSwitch_8814AU(
1636
PADAPTER Adapter,
1637
u8 *PROMContent,
1638
BOOLEAN AutoloadFail
1639
)
1640
{
1641
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1642
1643
if (AutoloadFail)
1644
pHalData->EEPROMUsbSwitch = _FALSE;
1645
else
1646
/* check efuse 0x0e bit4 */
1647
pHalData->EEPROMUsbSwitch = (PROMContent[EEPROM_USB_MODE_8814A] & BIT4) >> 4;
1648
1649
RTW_INFO("Usb Switch: %d\n", pHalData->EEPROMUsbSwitch);
1650
}
1651
1652
static void
1653
ReadLEDSetting_8814AU(
1654
PADAPTER Adapter,
1655
u8 *PROMContent,
1656
BOOLEAN AutoloadFail
1657
)
1658
{
1659
#ifdef CONFIG_RTW_LED
1660
struct led_priv *pledpriv = adapter_to_led(Adapter);
1661
1662
#ifdef CONFIG_RTW_SW_LED
1663
pledpriv->bRegUseLed = _TRUE;
1664
#else /* HW LED */
1665
pledpriv->LedStrategy = HW_LED;
1666
#endif /* CONFIG_RTW_SW_LED */
1667
#endif
1668
}
1669
1670
void
1671
InitAdapterVariablesByPROM_8814AU(
1672
PADAPTER Adapter
1673
)
1674
{
1675
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
1676
1677
hal_InitPGData_8814A(Adapter, pHalData->efuse_eeprom_data);
1678
1679
/* Hal_EfuseParseIDCode8812A(Adapter, pHalData->efuse_eeprom_data); */
1680
hal_ReadPROMVersion8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1681
hal_ReadIDs_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1682
hal_config_macaddr(Adapter, pHalData->bautoload_fail_flag);
1683
hal_ReadTxPowerInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1684
hal_ReadBoardType8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1685
hal_Read_TRX_antenna_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1686
1687
/* */
1688
/* Read Bluetooth co-exist and initialize */
1689
/* */
1690
hal_EfuseParseBTCoexistInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1691
1692
hal_ReadChannelPlan8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1693
hal_EfuseParseXtal_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1694
hal_ReadThermalMeter_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1695
hal_ReadRemoteWakeup_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1696
hal_ReadAntennaDiversity8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1697
hal_ReadRFEType_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1698
hal_ReadPowerTrackingType_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1699
ReadLEDSetting_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1700
1701
hal_ReadUsbModeSwitch_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1702
hal_CustomizeByCustomerID_8814AU(Adapter);
1703
1704
hal_GetRxGainOffset_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1705
1706
Hal_EfuseParseKFreeData_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);
1707
1708
/* set coex. ant info once efuse parsing is done */
1709
rtw_btcoex_set_ant_info(Adapter);
1710
}
1711
1712
static void hal_ReadPROMContent_8814A(
1713
PADAPTER Adapter
1714
)
1715
{
1716
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
1717
u8 eeValue;
1718
1719
/* check system boot selection */
1720
eeValue = rtw_read8(Adapter, REG_9346CR);
1721
pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE;
1722
pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE;
1723
1724
RTW_INFO("Boot from %s, Autoload %s !\n", (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1725
(pHalData->bautoload_fail_flag ? "Fail" : "OK"));
1726
1727
/* pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; */
1728
1729
InitAdapterVariablesByPROM_8814AU(Adapter);
1730
}
1731
1732
u8
1733
ReadAdapterInfo8814AU(
1734
PADAPTER Adapter
1735
)
1736
{
1737
Hal_InitEfuseVars_8814A(Adapter);
1738
1739
/* Read all content in Efuse/EEPROM. */
1740
hal_ReadPROMContent_8814A(Adapter);
1741
1742
/* We need to define the RF type after all PROM value is recognized. */
1743
ReadRFType8814A(Adapter);
1744
1745
return _SUCCESS;
1746
}
1747
1748
void UpdateInterruptMask8814AU(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)
1749
{
1750
HAL_DATA_TYPE *pHalData;
1751
1752
u32 *himr;
1753
pHalData = GET_HAL_DATA(padapter);
1754
1755
if (bHIMR0)
1756
himr = &(pHalData->IntrMask[0]);
1757
else
1758
himr = &(pHalData->IntrMask[1]);
1759
1760
if (AddMSR)
1761
*himr |= AddMSR;
1762
1763
if (RemoveMSR)
1764
*himr &= (~RemoveMSR);
1765
1766
if (bHIMR0)
1767
rtw_write32(padapter, REG_HIMR0_8814A, *himr);
1768
else
1769
rtw_write32(padapter, REG_HIMR1_8814A, *himr);
1770
1771
}
1772
1773
u8 SetHwReg8814AU(PADAPTER Adapter, u8 variable, u8 *val)
1774
{
1775
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1776
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter);
1777
struct registry_priv *registry_par = &Adapter->registrypriv;
1778
u8 ret = _SUCCESS;
1779
1780
switch (variable) {
1781
case HW_VAR_RXDMA_AGG_PG_TH:
1782
#ifdef CONFIG_USB_RX_AGGREGATION
1783
{
1784
/*u8 threshold = *((u8 *)val);
1785
if( threshold == 0)
1786
{
1787
threshold = pHalData->UsbRxAggPageCount;
1788
}
1789
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);*/
1790
}
1791
#endif
1792
break;
1793
case HW_VAR_SET_RPWM:
1794
#ifdef CONFIG_LPS_LCLK
1795
{
1796
u8 ps_state = *((u8 *)val);
1797
/* rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. */
1798
/* BIT0 value - 1: 32k, 0:40MHz. */
1799
/* BIT6 value - 1: report cpwm value after success set, 0:do not report. */
1800
/* BIT7 value - Toggle bit change. */
1801
/* modify by Thomas. 2012/4/2. */
1802
ps_state = ps_state & 0xC1;
1803
/* RTW_INFO("##### Change RPWM value to = %x for switch clk #####\n",ps_state); */
1804
rtw_write8(Adapter, REG_USB_HRPWM, ps_state);
1805
}
1806
#endif
1807
#ifdef CONFIG_AP_WOWLAN
1808
if (pwrctl->wowlan_ap_mode == _TRUE) {
1809
u8 ps_state = *((u8 *)val);
1810
1811
RTW_INFO("%s, RPWM\n", __func__);
1812
ps_state = ps_state & 0xC1;
1813
rtw_write8(Adapter, REG_USB_HRPWM, ps_state);
1814
}
1815
#endif
1816
break;
1817
case HW_VAR_USB_MODE:
1818
/* U2 to U3 */
1819
if (registry_par->switch_usb_mode == 1) {
1820
if (IS_HIGH_SPEED_USB(Adapter)) {
1821
if ((rtw_read8(Adapter, 0x74) & (BIT(2) | BIT(3))) != BIT(3)) {
1822
rtw_write8(Adapter, 0x74, 0x8);
1823
rtw_write8(Adapter, 0x70, 0x2);
1824
rtw_write8(Adapter, 0x3e, 0x1);
1825
rtw_write8(Adapter, 0x3d, 0x3);
1826
/* usb disconnect */
1827
rtw_write8(Adapter, 0x5, 0x80);
1828
*val = _TRUE;
1829
}
1830
} else if (IS_SUPER_SPEED_USB(Adapter)) {
1831
rtw_write8(Adapter, 0x70, rtw_read8(Adapter, 0x70) & (~BIT(1)));
1832
rtw_write8(Adapter, 0x3e, rtw_read8(Adapter, 0x3e) & (~BIT(0)));
1833
}
1834
} else if (registry_par->switch_usb_mode == 2) {
1835
/* U3 to U2 */
1836
if (IS_SUPER_SPEED_USB(Adapter)) {
1837
if ((rtw_read8(Adapter, 0x74) & (BIT(2) | BIT(3))) != BIT(2)) {
1838
rtw_write8(Adapter, 0x74, 0x4);
1839
rtw_write8(Adapter, 0x70, 0x2);
1840
rtw_write8(Adapter, 0x3e, 0x1);
1841
rtw_write8(Adapter, 0x3d, 0x3);
1842
/* usb disconnect */
1843
rtw_write8(Adapter, 0x5, 0x80);
1844
*val = _TRUE;
1845
}
1846
} else if (IS_HIGH_SPEED_USB(Adapter)) {
1847
rtw_write8(Adapter, 0x70, rtw_read8(Adapter, 0x70) & (~BIT(1)));
1848
rtw_write8(Adapter, 0x3e, rtw_read8(Adapter, 0x3e) & (~BIT(0)));
1849
}
1850
}
1851
break;
1852
default:
1853
ret = SetHwReg8814A(Adapter, variable, val);
1854
break;
1855
}
1856
1857
return ret;
1858
}
1859
1860
void GetHwReg8814AU(PADAPTER Adapter, u8 variable, u8 *val)
1861
{
1862
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1863
1864
switch (variable) {
1865
default:
1866
GetHwReg8814A(Adapter, variable, val);
1867
break;
1868
}
1869
1870
}
1871
1872
/*
1873
* Description:
1874
* Change default setting of specified variable.
1875
* */
1876
u8
1877
SetHalDefVar8814AUsb(
1878
PADAPTER Adapter,
1879
HAL_DEF_VARIABLE eVariable,
1880
void *pValue
1881
)
1882
{
1883
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1884
u8 bResult = _SUCCESS;
1885
1886
switch (eVariable) {
1887
default:
1888
SetHalDefVar8814A(Adapter, eVariable, pValue);
1889
break;
1890
}
1891
1892
return bResult;
1893
}
1894
1895
/*
1896
* Description:
1897
* Query setting of specified variable.
1898
* */
1899
u8
1900
GetHalDefVar8814AUsb(
1901
PADAPTER Adapter,
1902
HAL_DEF_VARIABLE eVariable,
1903
void *pValue
1904
)
1905
{
1906
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1907
u8 bResult = _SUCCESS;
1908
1909
switch (eVariable) {
1910
default:
1911
GetHalDefVar8814A(Adapter, eVariable, pValue);
1912
break;
1913
}
1914
1915
return bResult;
1916
}
1917
1918
static void rtl8814au_init_default_value(_adapter *padapter)
1919
{
1920
PHAL_DATA_TYPE pHalData;
1921
1922
pHalData = GET_HAL_DATA(padapter);
1923
1924
InitDefaultValue8814A(padapter);
1925
1926
pHalData->IntrMask[0] = (u32)(\
1927
/* IMR_ROK | */
1928
/* IMR_RDU | */
1929
/* IMR_VODOK | */
1930
/* IMR_VIDOK | */
1931
/* IMR_BEDOK | */
1932
/* IMR_BKDOK | */
1933
/* IMR_MGNTDOK | */
1934
/* IMR_HIGHDOK | */
1935
/* IMR_CPWM | */
1936
/* IMR_CPWM2 | */
1937
/* IMR_C2HCMD | */
1938
/* IMR_HISR1_IND_INT | */
1939
/* IMR_ATIMEND | */
1940
/* IMR_BCNDMAINT_E | */
1941
/* IMR_HSISR_IND_ON_INT | */
1942
/* IMR_BCNDOK0 | */
1943
/* IMR_BCNDMAINT0 | */
1944
/* IMR_TSF_BIT32_TOGGLE | */
1945
/* IMR_TXBCN0OK | */
1946
/* IMR_TXBCN0ERR | */
1947
/* IMR_GTINT3 | */
1948
/* IMR_GTINT4 | */
1949
/* IMR_TXCCK | */
1950
0);
1951
1952
pHalData->IntrMask[1] = (u32)(\
1953
/* IMR_RXFOVW | */
1954
/* IMR_TXFOVW | */
1955
/* IMR_RXERR | */
1956
/* IMR_TXERR | */
1957
/* IMR_ATIMEND_E | */
1958
/* IMR_BCNDOK1 | */
1959
/* IMR_BCNDOK2 | */
1960
/* IMR_BCNDOK3 | */
1961
/* IMR_BCNDOK4 | */
1962
/* IMR_BCNDOK5 | */
1963
/* IMR_BCNDOK6 | */
1964
/* IMR_BCNDOK7 | */
1965
/* IMR_BCNDMAINT1 | */
1966
/* IMR_BCNDMAINT2 | */
1967
/* IMR_BCNDMAINT3 | */
1968
/* IMR_BCNDMAINT4 | */
1969
/* IMR_BCNDMAINT5 | */
1970
/* IMR_BCNDMAINT6 | */
1971
/* IMR_BCNDMAINT7 | */
1972
0);
1973
}
1974
1975
static u8 rtl8814au_ps_func(PADAPTER Adapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)
1976
{
1977
u8 bResult = _TRUE;
1978
switch (efunc_id) {
1979
1980
#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
1981
case HAL_USB_SELECT_SUSPEND: {
1982
u8 bfwpoll = *((u8 *)val);
1983
/* rtl8188e_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500); */ /* note fw to support hw power down ping detect */
1984
}
1985
break;
1986
#endif /* CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED */
1987
1988
default:
1989
break;
1990
}
1991
return bResult;
1992
}
1993
1994
void rtl8814au_set_hal_ops(_adapter *padapter)
1995
{
1996
struct hal_ops *pHalFunc = &padapter->hal_func;
1997
1998
1999
pHalFunc->hal_power_on = _InitPowerOn_8814AU;
2000
pHalFunc->hal_power_off = hal_carddisable_8814;
2001
2002
pHalFunc->hal_init = &rtl8814au_hal_init;
2003
pHalFunc->hal_deinit = &rtl8814au_hal_deinit;
2004
2005
pHalFunc->inirp_init = &rtl8814au_inirp_init;
2006
pHalFunc->inirp_deinit = &rtl8814au_inirp_deinit;
2007
2008
pHalFunc->init_xmit_priv = &rtl8814au_init_xmit_priv;
2009
pHalFunc->free_xmit_priv = &rtl8814au_free_xmit_priv;
2010
2011
pHalFunc->init_recv_priv = &rtl8814au_init_recv_priv;
2012
pHalFunc->free_recv_priv = &rtl8814au_free_recv_priv;
2013
#ifdef CONFIG_RTW_SW_LED
2014
pHalFunc->InitSwLeds = &rtl8814au_InitSwLeds;
2015
pHalFunc->DeInitSwLeds = &rtl8814au_DeInitSwLeds;
2016
#endif/* CONFIG_RTW_SW_LED */
2017
2018
pHalFunc->init_default_value = &rtl8814au_init_default_value;
2019
pHalFunc->intf_chip_configure = &rtl8814au_interface_configure;
2020
pHalFunc->read_adapter_info = &ReadAdapterInfo8814AU;
2021
2022
pHalFunc->set_hw_reg_handler = &SetHwReg8814AU;
2023
pHalFunc->GetHwRegHandler = &GetHwReg8814AU;
2024
pHalFunc->get_hal_def_var_handler = &GetHalDefVar8814AUsb;
2025
pHalFunc->SetHalDefVarHandler = &SetHalDefVar8814AUsb;
2026
2027
2028
pHalFunc->hal_xmit = &rtl8814au_hal_xmit;
2029
pHalFunc->mgnt_xmit = &rtl8814au_mgnt_xmit;
2030
pHalFunc->hal_xmitframe_enqueue = &rtl8814au_hal_xmitframe_enqueue;
2031
2032
#ifdef CONFIG_HOSTAPD_MLME
2033
pHalFunc->hostap_mgnt_xmit_entry = &rtl8812au_hostap_mgnt_xmit_entry;
2034
#endif
2035
pHalFunc->interface_ps_func = &rtl8814au_ps_func;
2036
#ifdef CONFIG_XMIT_THREAD_MODE
2037
pHalFunc->xmit_thread_handler = &rtl8814au_xmit_buf_handler;
2038
#endif
2039
#ifdef CONFIG_SUPPORT_USB_INT
2040
pHalFunc->interrupt_handler = interrupt_handler_8814au;
2041
#endif
2042
#ifdef CONFIG_FW_CORRECT_BCN
2043
pHalFunc->fw_correct_bcn = &rtl8814_fw_update_beacon_cmd;
2044
#endif
2045
rtl8814_set_hal_ops(pHalFunc);
2046
2047
}
2048
2049