Path: blob/master/ALFA-W1F1/RTL8814AU/hal/rtl8814a/usb/usb_halinit.c
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/******************************************************************************1*2* Copyright(c) 2007 - 2017 Realtek Corporation.3*4* This program is free software; you can redistribute it and/or modify it5* under the terms of version 2 of the GNU General Public License as6* published by the Free Software Foundation.7*8* This program is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for11* more details.12*13*****************************************************************************/14#define _HCI_HAL_INIT_C_1516/* #include <drv_types.h> */17#include <rtl8814a_hal.h>1819#ifndef CONFIG_USB_HCI2021#error "CONFIG_USB_HCI shall be on!\n"2223#endif2425static void26_ConfigChipOutEP_8814(27PADAPTER pAdapter,28u8 NumOutPipe29)30{31HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);323334pHalData->OutEpQueueSel = 0;35pHalData->OutEpNumber = 0;3637switch (NumOutPipe) {38case 4:39pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;40pHalData->OutEpNumber = 4;41break;42case 3:43pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;44pHalData->OutEpNumber = 3;45break;46case 2:47pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;48pHalData->OutEpNumber = 2;49break;50case 1:51pHalData->OutEpQueueSel = TX_SELE_HQ;52pHalData->OutEpNumber = 1;53break;54default:55break;5657}58RTW_INFO("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __FUNCTION__, pHalData->OutEpQueueSel, pHalData->OutEpNumber);5960}6162static BOOLEAN HalUsbSetQueuePipeMapping8814AUsb(63PADAPTER pAdapter,64u8 NumInPipe,65u8 NumOutPipe66)67{68HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);69BOOLEAN result = _FALSE;7071_ConfigChipOutEP_8814(pAdapter, NumOutPipe);7273/* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */74if (1 == pHalData->OutEpNumber) {75if (1 != NumInPipe)76return result;77}7879/* All config other than above support one Bulk IN and one Interrupt IN. */80/* if(2 != NumInPipe){ */81/* return result; */82/* } */8384result = Hal_MappingOutPipe(pAdapter, NumOutPipe);8586return result;8788}8990void rtl8814au_interface_configure(_adapter *padapter)91{92HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);93struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);9495if (IS_SUPER_SPEED_USB(padapter)) {96pHalData->UsbBulkOutSize = USB_SUPER_SPEED_BULK_SIZE;/* 1024 bytes */97} else if (IS_HIGH_SPEED_USB(padapter)) {98pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */99} else {100pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */101}102103#ifdef CONFIG_USB_TX_AGGREGATION104pHalData->UsbTxAggMode = 1;105pHalData->UsbTxAggDescNum = 3; /* only 4 bits */106#endif /* CONFIG_USB_TX_AGGREGATION */107108#ifdef CONFIG_USB_RX_AGGREGATION109pHalData->rxagg_mode = RX_AGG_DMA;110pHalData->rxagg_usb_size = 8; /* unit: 512b */111pHalData->rxagg_usb_timeout = 0x6;112pHalData->rxagg_dma_size = 16; /* uint: 128b, 0x0A = 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize */113pHalData->rxagg_dma_timeout = 0x6; /* 6, absolute time = 34ms/(2^6) */114#endif /* CONFIG_USB_RX_AGGREGATION */115116HalUsbSetQueuePipeMapping8814AUsb(padapter,117pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);118119}120121static void122_InitBurstPktLen(PADAPTER Adapter)123{124u8 u1bTmp;125HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);126127/* yx_qi 131128 move to 0x1448, 144c */128rtw_write32(Adapter, REG_FAST_EDCA_VOVI_SETTING_8814A, 0x08070807); /* yx_qi 131128 */129rtw_write32(Adapter, REG_FAST_EDCA_BEBK_SETTING_8814A, 0x08070807); /* yx_qi 131128 */130131u1bTmp = rtw_read8(Adapter, 0xff); /* check device operation speed: SS 0xff bit7 */132133if (u1bTmp & BIT7) /* USB2/1.1 Mode */134pHalData->bSupportUSB3 = FALSE;135else /* USB3 Mode */136pHalData->bSupportUSB3 = TRUE;137138if (pHalData->bSupportUSB3 == _FALSE) { /* USB2/1.1 Mode */139if (pHalData->UsbBulkOutSize == 512) {140/* set burst pkt len=512B */141rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x1e);142} else {143/* set burst pkt len=64B */144rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x2e);145}146147rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH_8814A, 0x2005); /* dmc agg th 20K */148} else { /* USB3 Mode */149/* set burst pkt len=1k */150rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x0e);151rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH_8814A, 0x0a05); /* dmc agg th 20K */152153/* set Reg 0xf008[3:4] to 2'00 to disable U1/U2 Mode to avoid 2.5G spur in USB3.0. added by page, 20120712 */154rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008) & 0xE7);155/* to avoid usb 3.0 H2C fail */156rtw_write16(Adapter, 0xf002, 0);157158rtw_write8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A, rtw_read8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A) & ~BIT(6));159RTW_INFO("turn off the LDPC pre-TX\n");160161}162163if (pHalData->AMPDUBurstMode)164rtw_write8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A, 0x5F);165}166167168void169_InitQueueReservedPage_8814AUsb(170PADAPTER Adapter171)172{173struct registry_priv *pregistrypriv = &Adapter->registrypriv;174u16 txpktbuf_bndy;175176RTW_INFO("===>_InitQueueReservedPage_8814AUsb()\n");177178/* ---- Set Fifo page for each Queue under Mac Direct LPBK nonsec mode ------------ */179rtw_write32(Adapter, REG_FIFOPAGE_INFO_1_8814A, HPQ_PGNUM_8814A);180rtw_write32(Adapter, REG_FIFOPAGE_INFO_2_8814A, LPQ_PGNUM_8814A);181rtw_write32(Adapter, REG_FIFOPAGE_INFO_3_8814A, NPQ_PGNUM_8814A);182rtw_write32(Adapter, REG_FIFOPAGE_INFO_4_8814A, EPQ_PGNUM_8814A);183184rtw_write32(Adapter, REG_FIFOPAGE_INFO_5_8814A, PUB_PGNUM_8814A);185186rtw_write32(Adapter, REG_RQPN_CTRL_2_8814A, 0x80000000);187188if (!pregistrypriv->wifi_spec)189txpktbuf_bndy = TX_PAGE_BOUNDARY_8814A;190else /* for WMM */191txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8814A;192193/* Set page boundary and header */194rtw_write16(Adapter, REG_TXPKTBUF_BCNQ_BDNY_8814A, txpktbuf_bndy);195rtw_write16(Adapter, REG_TXPKTBUF_BCNQ1_BDNY_8814A, txpktbuf_bndy);196rtw_write16(Adapter, REG_MGQ_PGBNDY_8814A, txpktbuf_bndy);197198/* Set The head page of packet of Bcnq */199rtw_write16(Adapter, REG_FIFOPAGE_CTRL_2_8814A, txpktbuf_bndy);200/* The head page of packet of Bcnq1 */201rtw_write16(Adapter, REG_FIFOPAGE_CTRL_2_8814A + 2, txpktbuf_bndy);202203RTW_INFO("<===_InitQueueReservedPage_8814AUsb()\n");204}205206207static u32 _InitPowerOn_8814AU(_adapter *padapter)208{209int status = _SUCCESS;210u16 u2btmp = 0;211212/* YX sugguested 2014.06.03 */213u8 u1btmp = rtw_read8(padapter, 0x10C2);214rtw_write8(padapter, 0x10C2, (u1btmp | BIT1));215216if (!HalPwrSeqCmdParsing(padapter, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8814A_NIC_ENABLE_FLOW))217return _FAIL;218219220/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */221/* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */222rtw_write16(padapter, REG_CR_8814A, 0x00); /* suggseted by zhouzhou, by page, 20111230 */223u2btmp = PlatformEFIORead2Byte(padapter, REG_CR_8814A);224u2btmp |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN225| PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);226rtw_write16(padapter, REG_CR_8814A, u2btmp);227228_InitQueueReservedPage_8814AUsb(padapter);229return status;230}231232233234235236/* ---------------------------------------------------------------237*238* MAC init functions239*240* --------------------------------------------------------------- */241242/* Shall USB interface init this? */243static void244_InitInterrupt_8814AU(245PADAPTER Adapter246)247{248HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);249250/* HIMR */251rtw_write32(Adapter, REG_HIMR0_8814A, pHalData->IntrMask[0] & 0xFFFFFFFF);252rtw_write32(Adapter, REG_HIMR1_8814A, pHalData->IntrMask[1] & 0xFFFFFFFF);253}254255static void256_InitPageBoundary_8814AUsb(257PADAPTER Adapter258)259{260/* 20130416 KaiYuan modified for 8814 */261HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);262263rtw_write16(Adapter, REG_RXFF_PTR_8814A, RX_DMA_BOUNDARY_8814A); /*yx_qi 20140331*/264265}266267268static void269_InitNormalChipRegPriority_8814AUsb(270PADAPTER Adapter,271u16 beQ,272u16 bkQ,273u16 viQ,274u16 voQ,275u16 mgtQ,276u16 hiQ277)278{279u16 value16 = (PlatformEFIORead2Byte(Adapter, REG_TRXDMA_CTRL_8814A) & 0x7);280281value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |282_TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |283_TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ) | BIT2;284285rtw_write16(Adapter, REG_TRXDMA_CTRL_8814A, value16);286}287288static void289_InitNormalChipTwoOutEpPriority_8814AUsb(290PADAPTER Adapter291)292{293HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);294struct registry_priv *pregistrypriv = &Adapter->registrypriv;295u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;296297298u16 valueHi = 0;299u16 valueLow = 0;300301switch (pHalData->OutEpQueueSel) {302case (TX_SELE_HQ | TX_SELE_LQ):303valueHi = QUEUE_HIGH;304valueLow = QUEUE_LOW;305break;306case (TX_SELE_NQ | TX_SELE_LQ):307valueHi = QUEUE_NORMAL;308valueLow = QUEUE_LOW;309break;310case (TX_SELE_HQ | TX_SELE_NQ):311valueHi = QUEUE_HIGH;312valueLow = QUEUE_NORMAL;313break;314default:315valueHi = QUEUE_HIGH;316valueLow = QUEUE_NORMAL;317break;318}319320if (!pregistrypriv->wifi_spec) {321beQ = valueLow;322bkQ = valueLow;323viQ = valueHi;324voQ = valueHi;325mgtQ = valueHi;326hiQ = valueHi;327} else { /* for WMM ,CONFIG_OUT_EP_WIFI_MODE */328beQ = valueLow;329bkQ = valueHi;330viQ = valueHi;331voQ = valueLow;332mgtQ = valueHi;333hiQ = valueHi;334}335336_InitNormalChipRegPriority_8814AUsb(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);337}338339static void340_InitNormalChipThreeOutEpPriority_8814AUsb(341PADAPTER Adapter342)343{344struct registry_priv *pregistrypriv = &Adapter->registrypriv;345u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;346347if (!pregistrypriv->wifi_spec) { /* typical setting */348beQ = QUEUE_LOW;349bkQ = QUEUE_LOW;350viQ = QUEUE_NORMAL;351voQ = QUEUE_HIGH;352mgtQ = QUEUE_HIGH;353hiQ = QUEUE_HIGH;354} else { /* for WMM */355beQ = QUEUE_LOW;356bkQ = QUEUE_NORMAL;357viQ = QUEUE_NORMAL;358voQ = QUEUE_HIGH;359mgtQ = QUEUE_HIGH;360hiQ = QUEUE_HIGH;361}362_InitNormalChipRegPriority_8814AUsb(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);363}364365static void366_InitQueuePriority_8814AUsb(367PADAPTER Adapter368)369{370HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);371372switch (pHalData->OutEpNumber) {373case 2:374_InitNormalChipTwoOutEpPriority_8814AUsb(Adapter);375break;376case 3:377case 4:378_InitNormalChipThreeOutEpPriority_8814AUsb(Adapter);379break;380default:381RTW_INFO("_InitQueuePriority_8812AUsb(): Shall not reach here!\n");382break;383}384}385386387388static void389_InitHardwareDropIncorrectBulkOut_8814A(390PADAPTER Adapter391)392{393#ifdef ENABLE_USB_DROP_INCORRECT_OUT394u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK);395value32 |= DROP_DATA_EN;396rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32);397#endif /* ENABLE_USB_DROP_INCORRECT_OUT */398}399400static void401_InitNetworkType_8814A(402PADAPTER Adapter403)404{405u32 value32;406407value32 = rtw_read32(Adapter, REG_CR);408/* TODO: use the other function to set network type */409value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);410411rtw_write32(Adapter, REG_CR, value32);412}413414static void415_InitTransferPageSize_8814AUsb(416PADAPTER Adapter417)418{419/* 8814 doesn't need this by Alex */420}421422static void423_InitDriverInfoSize_8814A(424PADAPTER Adapter,425u8 drvInfoSize426)427{428rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);429}430#if 0431/* static void432* _InitWMACSetting_8814A( */433/* PADAPTER Adapter */434/* ) */435{436/* u32 value32; */437u16 value16;438HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);439u32 rcr;440441/* rcr = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; */442rcr =443RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF;444445#if (1 == RTL8812A_RX_PACKET_INCLUDE_CRC)446rcr |= ACRC32;447#endif /* (1 == RTL8812A_RX_PACKET_INCLUDE_CRC) */448449#ifdef CONFIG_RX_PACKET_APPEND_FCS450rcr |= RCR_APPFCS;451#endif /* CONFIG_RX_PACKET_APPEND_FCS */452453rcr |= FORCEACK;454455rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&rcr);456457/* Accept all multicast address */458rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF);459rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);460461462/* Accept all data frames */463/* value16 = 0xFFFF; */464/* rtw_write16(Adapter, REG_RXFLTMAP2, value16); */465466/* 2010.09.08 hpfan */467/* Since ADF is removed from RCR, ps-poll will not be indicate to driver, */468/* RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */469value16 = BIT10;470#ifdef CONFIG_BEAMFORMING471/* NDPA packet subtype is 0x0101 */472value16 |= BIT5;473#endif474rtw_write16(Adapter, REG_RXFLTMAP1, value16);475476/* Accept all management frames */477/* value16 = 0xFFFF; */478/* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */479480/* enable RX_SHIFT bits */481/* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); */482483}484#endif485486/* old _InitWMACSetting_8812A + _InitAdaptiveCtrl_8812AUsb = new _InitMacConfigure_8814A */487static void488_InitMacConfigure_8814A(489PADAPTER Adapter490)491{492u16 value16;493u32 regRRSR;494HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);495u32 rcr;496497switch (Adapter->registrypriv.wireless_mode) {498case WIRELESS_11B:499regRRSR = RATE_ALL_CCK;500break;501502case WIRELESS_11G:503case WIRELESS_11A:504case WIRELESS_11_5N:505case WIRELESS_11A_5N: /* Todo: no basic rate for ofdm ? */506case WIRELESS_11_5AC:507regRRSR = RATE_ALL_OFDM_AG;508break;509510case WIRELESS_11BG:511case WIRELESS_11G_24N:512case WIRELESS_11_24N:513case WIRELESS_11BG_24N:514default:515regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;516break;517518}519520/* Init value for RRSR. */521rtw_phydm_set_rrsr(Adapter, regRRSR, TRUE);522523524/* Retry Limit */525value16 = BIT_LRL(RL_VAL_STA) | BIT_SRL(RL_VAL_STA);526rtw_write16(Adapter, REG_RETRY_LIMIT, value16);527528rcr = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF;529rcr |= FORCEACK;530#if (1 == RTL8812A_RX_PACKET_INCLUDE_CRC)531rcr |= ACRC32;532#endif /* (1 == RTL8812A_RX_PACKET_INCLUDE_CRC) */533534#ifdef CONFIG_RX_PACKET_APPEND_FCS535rcr |= RCR_APPFCS;536#endif /* CONFIG_RX_PACKET_APPEND_FCS */537rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&rcr);538539/* 2010.09.08 hpfan */540/* Since ADF is removed from RCR, ps-poll will not be indicate to driver, */541/* RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */542value16 = BIT10;543#ifdef CONFIG_BEAMFORMING544/* NDPA packet subtype is 0x0101 */545value16 |= BIT5;546#endif /*CONFIG_BEAMFORMING*/547rtw_write16(Adapter, REG_RXFLTMAP1, value16);548549/* 201409/25 MH When RA is enabled, we need to reduce the value. */550rtw_write8(Adapter, REG_MAX_AGGR_NUM_8814A, 0x36);551rtw_write8(Adapter, REG_RTS_MAX_AGGR_NUM_8814A, 0x36);552553}554555static void556_InitEDCA_8814AUsb(557PADAPTER Adapter558)559{560/* Set Spec SIFS (used in NAV) */561rtw_write16(Adapter, REG_SPEC_SIFS, 0x100a);562rtw_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);563564/* Set SIFS for CCK */565rtw_write16(Adapter, REG_SIFS_CTX, 0x100a);566567/* Set SIFS for OFDM */568rtw_write16(Adapter, REG_SIFS_TRX, 0x100a);569570/* TXOP */571rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);572rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);573rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);574rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);575576/* 0x50 for 80MHz clock */577/* rtw_write8(Adapter, REG_USTIME_TSF, 0x50); */578/* rtw_write8(Adapter, REG_USTIME_EDCA, 0x50); */579}580581582static void583_InitBeaconMaxError_8814A(584PADAPTER Adapter,585BOOLEAN InfraMode586)587{588#ifdef CONFIG_ADHOC_WORKAROUND_SETTING589rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF);590#else591/* rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); */592#endif593}594595596#ifdef CONFIG_RTW_LED597static void _InitHWLed(PADAPTER Adapter)598{599struct led_priv *pledpriv = adapter_to_led(Adapter);600601if (pledpriv->LedStrategy != HW_LED)602return;603604/* HW led control605* to do ....606* must consider cases of antenna diversity/ commbo card/solo card/mini card */607608}609#endif /* CONFIG_RTW_LED */610611/*612static void613_InitRDGSetting_8812A(614PADAPTER Adapter615)616{617rtw_write8(Adapter,REG_RD_CTRL,0xFF);618rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200);619rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05);620}*/621622static void623_InitRetryFunction_8814A(624PADAPTER Adapter625)626{627u8 value8;628629value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);630value8 |= EN_AMPDU_RTY_NEW;631rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);632633/* Set ACK timeout */634/* rtw_write8(Adapter, REG_ACKTO, 0x40); */ /* masked by page for BCM IOT issue temporally */635rtw_write8(Adapter, REG_ACKTO, 0x80);636}637638/*-----------------------------------------------------------------------------639* Function: usb_AggSettingTxUpdate()640*641* Overview: Seperate TX/RX parameters update independent for TP detection and642* dynamic TX/RX aggreagtion parameters update.643*644* Input: PADAPTER645*646* Output/Return: NONE647*648* Revised History:649* When Who Remark650* 12/10/2010 MHC Seperate to smaller function.651*652*---------------------------------------------------------------------------*/653static void654usb_AggSettingTxUpdate_8814A(655PADAPTER Adapter656)657{658#ifdef CONFIG_USB_TX_AGGREGATION659HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);660u32 value32;661662if (Adapter->registrypriv.wifi_spec)663pHalData->UsbTxAggDescNum = 1;664665if (pHalData->UsbTxAggMode) {666value32 = rtw_read32(Adapter, REG_TDECTRL);667value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);668value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);669670rtw_write32(Adapter, REG_TDECTRL, value32);671rtw_write8(Adapter, REG_TDECTRL + 3, pHalData->UsbTxAggDescNum << 1);672}673674#endif /* CONFIG_USB_TX_AGGREGATION */675} /* usb_AggSettingTxUpdate */676677678/*-----------------------------------------------------------------------------679* Function: usb_AggSettingRxUpdate()680*681* Overview: Seperate TX/RX parameters update independent for TP detection and682* dynamic TX/RX aggreagtion parameters update.683*684* Input: PADAPTER685*686* Output/Return: NONE687*688* Revised History:689* When Who Remark690* 12/10/2010 MHC Seperate to smaller function.691*692*---------------------------------------------------------------------------*/693static void694usb_AggSettingRxUpdate_8814A(695PADAPTER Adapter696)697{698#ifdef CONFIG_USB_RX_AGGREGATION699HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);700u8 valueDMA;701u8 valueUSB;702703valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL_8814A);704valueUSB = rtw_read8(Adapter, REG_RXDMA_AGG_PG_TH_8814A + 3);705switch (pHalData->rxagg_mode) {706case RX_AGG_DMA:707valueDMA |= RXDMA_AGG_EN;708valueUSB &= ~USB_AGG_EN_8814A;709break;710case RX_AGG_USB:711valueDMA &= ~RXDMA_AGG_EN;712valueUSB |= USB_AGG_EN_8814A;713break;714case RX_AGG_MIX:715valueDMA |= RXDMA_AGG_EN;716valueUSB |= USB_AGG_EN_8814A;717break;718case RX_AGG_DISABLE:719default:720valueDMA &= ~RXDMA_AGG_EN;721valueUSB &= ~USB_AGG_EN_8814A;722break;723}724725rtw_write8(Adapter, REG_TRXDMA_CTRL_8814A, valueDMA);726rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH_8814A + 3, valueUSB); /* yx_qi 131128 */727#endif /* CONFIG_USB_RX_AGGREGATION */728} /* usb_AggSettingRxUpdate */729730static void731init_UsbAggregationSetting_8814A(732PADAPTER Adapter733)734{735HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);736737/* Tx aggregation setting */738usb_AggSettingTxUpdate_8814A(Adapter);739740/* Rx aggregation setting */741usb_AggSettingRxUpdate_8814A(Adapter);742743/* 201/12/10 MH Add for USB agg mode dynamic switch. */744pHalData->UsbRxHighSpeedMode = _FALSE;745pHalData->UsbTxVeryHighSpeedMode = _FALSE;746}747748/*-----------------------------------------------------------------------------749* Function: USB_AggModeSwitch()750*751* Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase752* RX speed by increasing batch indication size. This will decrease TCP ACK speed, we753* need to monitor the influence of FTP/network share.754* For TX mode, we are still ubder investigation.755*756* Input: PADAPTER757*758* Output: NONE759*760* Return: NONE761*762* Revised History:763* When Who Remark764* 12/10/2010 MHC Create Version 0.765*766*---------------------------------------------------------------------------*/767void768USB_AggModeSwitch(769PADAPTER Adapter770)771{772#if 0773HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);774PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);775776/* pHalData->UsbRxHighSpeedMode = _FALSE; */777/* How to measure the RX speed? We assume that when traffic is more than */778if (pMgntInfo->bRegAggDMEnable == _FALSE) {779return; /* Inf not support. */780}781782783if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == _TRUE &&784pHalData->UsbRxHighSpeedMode == _FALSE) {785pHalData->UsbRxHighSpeedMode = _TRUE;786} else if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == _FALSE &&787pHalData->UsbRxHighSpeedMode == _TRUE) {788pHalData->UsbRxHighSpeedMode = _FALSE;789} else790return;791792793#if USB_RX_AGGREGATION_92C794if (pHalData->UsbRxHighSpeedMode == _TRUE) {795/* 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. */796/* USB mode */797#if (RT_PLATFORM == PLATFORM_LINUX)798if (pMgntInfo->LinkDetectInfo.bTxBusyTraffic) {799pHalData->RxAggBlockCount = 16;800pHalData->RxAggBlockTimeout = 7;801} else802#endif803{804pHalData->RxAggBlockCount = 40;805pHalData->RxAggBlockTimeout = 5;806}807/* Mix mode */808pHalData->RxAggPageCount = 72;809pHalData->RxAggPageTimeout = 6;810} else {811/* USB mode */812pHalData->RxAggBlockCount = pMgntInfo->RegRxAggBlockCount;813pHalData->RxAggBlockTimeout = pMgntInfo->RegRxAggBlockTimeout;814/* Mix mode */815pHalData->RxAggPageCount = pMgntInfo->RegRxAggPageCount;816pHalData->RxAggPageTimeout = pMgntInfo->RegRxAggPageTimeout;817}818819if (pHalData->RxAggBlockCount > MAX_RX_AGG_BLKCNT)820pHalData->RxAggBlockCount = MAX_RX_AGG_BLKCNT;821#if (OS_WIN_FROM_VISTA(OS_VERSION)) || (RT_PLATFORM == PLATFORM_LINUX) /* do not support WINXP to prevent usbehci.sys BSOD */822if (IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter)) {823/* */824/* 2010/12/24 MH According to V1012 QC IOT test, XP BSOD happen when running chariot test */825/* with the aggregation dynamic change!! We need to disable the function to prevent it is broken */826/* in usbehci.sys. */827/* */828usb_AggSettingRxUpdate_8188E(Adapter);829830/* 2010/12/27 MH According to designer's suggstion, we can only modify Timeout value. Otheriwse */831/* there might many HW incorrect behavior, the XP BSOD at usbehci.sys may be relative to the */832/* issue. Base on the newest test, we can not enable block cnt > 30, otherwise XP usbehci.sys may */833/* BSOD. */834}835#endif836837#endif838#endif839} /* USB_AggModeSwitch */840841842#if 0843/* static void _BBTurnOnBlock( */844/* PADAPTER Adapter */845/* ) */846{847#if (DISABLE_BB_RF)848return;849#endif850851phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);852phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);853}854#endif855856857/*858* 2010/08/26 MH Add for selective suspend mode check.859* If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and860* slim card.861* */862#if 0863static void864HalDetectSelectiveSuspendMode(865PADAPTER Adapter866)867{868u8 tmpvalue;869HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);870struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);871872/* If support HW radio detect, we need to enable WOL ability, otherwise, we */873/* can not use FW to notify host the power state switch. */874875EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue);876877RTW_INFO("HalDetectSelectiveSuspendMode(): SS ");878if (tmpvalue & BIT1)879RTW_INFO("Enable\n");880else {881RTW_INFO("Disable\n");882pdvobjpriv->RegUsbSS = _FALSE;883}884885/* 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. */886if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) {887/* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */888889/* if (!pMgntInfo->bRegDongleSS) */890/* { */891pdvobjpriv->RegUsbSS = _FALSE;892/* } */893}894} /* HalDetectSelectiveSuspendMode */895#endif896897rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter)898{899rt_rf_power_state rfpowerstate = rf_on;900901return rfpowerstate;902} /* HalDetectPwrDownMode */903904void _ps_open_RF(_adapter *padapter)905{906/* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */907/* phy_SsPwrSwitch92CU(padapter, rf_on, 1); */908}909910void _ps_close_RF(_adapter *padapter)911{912/* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */913/* phy_SsPwrSwitch92CU(padapter, rf_off, 1); */914}915916917/* A lightweight deinit function */918static void rtl8814au_hw_reset(_adapter *Adapter)919{920#if 0921u8 reg_val = 0;922if (rtw_read8(Adapter, REG_MCUFWDL) & BIT7) {923_8051Reset8812(Adapter);924rtw_write8(Adapter, REG_MCUFWDL, 0x00);925/* before BB reset should do clock gated */926rtw_write32(Adapter, rFPGA0_XCD_RFPara,927rtw_read32(Adapter, rFPGA0_XCD_RFPara) | (BIT6));928/* reset BB */929reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN);930reg_val &= ~(BIT(0) | BIT(1));931rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val);932/* reset RF */933rtw_write8(Adapter, REG_RF_CTRL, 0);934/* reset TRX path */935rtw_write16(Adapter, REG_CR, 0);936/* reset MAC */937reg_val = rtw_read8(Adapter, REG_APS_FSMCO + 1);938reg_val |= BIT(1);939reg_val = rtw_write8(Adapter, REG_APS_FSMCO + 1, reg_val); /* reg0x5[1] ,auto FSM off */940941reg_val = rtw_read8(Adapter, REG_APS_FSMCO + 1);942943/* check if reg0x5[1] auto cleared */944while (reg_val & BIT(1)) {945rtw_udelay_os(1);946reg_val = rtw_read8(Adapter, REG_APS_FSMCO + 1);947}948reg_val |= BIT(0);949reg_val = rtw_write8(Adapter, REG_APS_FSMCO + 1, reg_val); /* reg0x5[0] ,auto FSM on */950951reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1);952reg_val &= ~(BIT(4) | BIT(7));953rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, reg_val);954reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1);955reg_val |= BIT(4) | BIT(7);956rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, reg_val);957}958#endif /* 0 */959}960961u32 rtl8814au_hal_init(PADAPTER Adapter)962{963u8 value8 = 0, u1bRegCR;964u16 value16;965u8 txpktbuf_bndy;966u32 status = _SUCCESS;967u32 NavUpper = WiFiNavUpperUs;968HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);969struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter);970struct registry_priv *pregistrypriv = &Adapter->registrypriv;971972rt_rf_power_state eRfPowerStateToSet;973974systime init_start_time = rtw_get_current_time();975976977#ifdef DBG_HAL_INIT_PROFILING978979enum HAL_INIT_STAGES {980HAL_INIT_STAGES_BEGIN = 0,981HAL_INIT_STAGES_INIT_PW_ON,982HAL_INIT_STAGES_INIT_LLTT,983HAL_INIT_STAGES_DOWNLOAD_FW,984HAL_INIT_STAGES_MAC,985HAL_INIT_STAGES_MISC01,986HAL_INIT_STAGES_MISC02,987HAL_INIT_STAGES_BB,988HAL_INIT_STAGES_RF,989HAL_INIT_STAGES_TURN_ON_BLOCK,990HAL_INIT_STAGES_INIT_SECURITY,991HAL_INIT_STAGES_MISC11,992HAL_INIT_STAGES_INIT_HAL_DM,993/* HAL_INIT_STAGES_RF_PS, */994HAL_INIT_STAGES_IQK,995HAL_INIT_STAGES_PW_TRACK,996HAL_INIT_STAGES_LCK,997HAL_INIT_STAGES_MISC21,998/* HAL_INIT_STAGES_INIT_PABIAS, */999#ifdef CONFIG_BT_COEXIST1000HAL_INIT_STAGES_BT_COEXIST,1001#endif1002/* HAL_INIT_STAGES_ANTENNA_SEL, */1003HAL_INIT_STAGES_MISC31,1004HAL_INIT_STAGES_END,1005HAL_INIT_STAGES_NUM1006};10071008char *hal_init_stages_str[] = {1009"HAL_INIT_STAGES_BEGIN",1010"HAL_INIT_STAGES_INIT_PW_ON",1011"HAL_INIT_STAGES_INIT_LLTT",1012"HAL_INIT_STAGES_DOWNLOAD_FW",1013"HAL_INIT_STAGES_MAC",1014"HAL_INIT_STAGES_MISC01",1015"HAL_INIT_STAGES_MISC02",1016"HAL_INIT_STAGES_BB",1017"HAL_INIT_STAGES_RF",1018"HAL_INIT_STAGES_TURN_ON_BLOCK",1019"HAL_INIT_STAGES_INIT_SECURITY",1020"HAL_INIT_STAGES_MISC11",1021"HAL_INIT_STAGES_INIT_HAL_DM",1022/* "HAL_INIT_STAGES_RF_PS", */1023"HAL_INIT_STAGES_IQK",1024"HAL_INIT_STAGES_PW_TRACK",1025"HAL_INIT_STAGES_LCK",1026"HAL_INIT_STAGES_MISC21",1027#ifdef CONFIG_BT_COEXIST1028"HAL_INIT_STAGES_BT_COEXIST",1029#endif1030/* "HAL_INIT_STAGES_ANTENNA_SEL", */1031"HAL_INIT_STAGES_MISC31",1032"HAL_INIT_STAGES_END",1033};10341035int hal_init_profiling_i;1036systime hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; /* used to record the time of each stage's starting point */10371038for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM; hal_init_profiling_i++)1039hal_init_stages_timestamp[hal_init_profiling_i] = 0;10401041#define HAL_INIT_PROFILE_TAG(stage) do { hal_init_stages_timestamp[(stage)] = rtw_get_current_time(); } while (0)1042#else /* DBG_HAL_INIT_PROFILING */1043#define HAL_INIT_PROFILE_TAG(stage) do {} while (0)1044#endif /* DBG_HAL_INIT_PROFILING */10451046104710481049HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);1050if (pwrctrlpriv->bkeepfwalive) {1051_ps_open_RF(Adapter);10521053if (pHalData->bIQKInitialized) {1054/* phy_iq_calibrate_8812a(Adapter,_TRUE); */1055} else {1056/* phy_iq_calibrate_8812a(Adapter,_FALSE); */1057/* pHalData->bIQKInitialized = _TRUE; */1058}10591060/* odm_txpowertracking_check(&pHalData->odmpriv ); */1061/* phy_lc_calibrate_8812a(Adapter); */10621063goto exit;1064}10651066/* Check if MAC has already power on. by tynli. 2011.05.27. */1067value8 = rtw_read8(Adapter, REG_SYS_CLKR + 1);1068u1bRegCR = rtw_read8(Adapter, REG_CR);1069RTW_INFO(" power-on :REG_SYS_CLKR 0x09=0x%02x. REG_CR 0x100=0x%02x.\n", value8, u1bRegCR);1070if ((value8 & BIT3) && (u1bRegCR != 0 && u1bRegCR != 0xEA)) {1071/* pHalData->bMACFuncEnable = _TRUE; */1072RTW_INFO(" MAC has already power on.\n");1073} else {1074/* pHalData->bMACFuncEnable = _FALSE; */1075/* Set FwPSState to ALL_ON mode to prevent from the I/O be return because of 32k */1076/* state which is set before sleep under wowlan mode. 2012.01.04. by tynli. */1077/* pHalData->FwPSState = FW_PS_STATE_ALL_ON_88E; */1078RTW_INFO(" MAC has not been powered on yet.\n");1079}10801081/* */1082/* 2012/11/13 MH Revise for U2/U3 switch we can not update RF-A/B reset. */1083/* After discuss with BB team YN, reset after MAC power on to prevent RF */1084/* R/W error. Is it a right method? */1085/* */1086/*if(!IS_HARDWARE_TYPE_8821(Adapter))1087{1088rtw_write8(Adapter, REG_RF_CTRL, 5);1089rtw_write8(Adapter, REG_RF_CTRL, 7);1090rtw_write8(Adapter, REG_RF_B_CTRL_8812, 5);1091rtw_write8(Adapter, REG_RF_B_CTRL_8812, 7);1092}*/10931094/*1095If HW didn't go through a complete de-initial procedure,1096it probably occurs some problem for double initial procedure.1097Like "CONFIG_DEINIT_BEFORE_INIT" in 92du chip1098*/1099rtl8814au_hw_reset(Adapter); /* todo */1100110111021103HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);1104status = rtw_hal_power_on(Adapter);1105if (status == _FAIL) {1106RTW_INFO("Failed to init power on!\n");1107goto exit;1108}11091110HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);11111112status = InitLLTTable8814A(Adapter);1113if (status == _FAIL) {1114RTW_INFO("Failed to init LLT table\n");1115goto exit;1116}11171118_InitHardwareDropIncorrectBulkOut_8814A(Adapter);11191120/*if(pHalData->bRDGEnable){1121_InitRDGSetting_8812A(Adapter);1122}*/11231124HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);1125if (Adapter->registrypriv.mp_mode == 0) {1126status = FirmwareDownload8814A(Adapter, _FALSE);1127if (status != _SUCCESS) {1128RTW_INFO("%s: Download Firmware failed!!\n", __FUNCTION__);1129pHalData->bFWReady = _FALSE;1130pHalData->fw_ractrl = _FALSE;1131/* return status; */1132} else {1133RTW_INFO("%s: Download Firmware Success!!\n", __FUNCTION__);1134pHalData->bFWReady = _TRUE;1135pHalData->fw_ractrl = _TRUE;1136}1137}11381139if (pwrctrlpriv->reg_rfoff == _TRUE)1140pwrctrlpriv->rf_pwrstate = rf_off;11411142/* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */1143/* HW GPIO pin. Before PHY_RFConfig8192C. */1144/* HalDetectPwrDownMode(Adapter); */1145/* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */1146/* HalDetectSelectiveSuspendMode(Adapter); */11471148/* Save target channel */1149/* <Roger_Notes> Current Channel will be updated again later. */1150pHalData->current_channel = 0;/* set 0 to trigger switch correct channel */11511152HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);1153#if (HAL_MAC_ENABLE == 1)1154status = PHY_MACConfig8814(Adapter);1155if (status == _FAIL)1156goto exit;1157#endif /* HAL_MAC_ENABLE */11581159HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);11601161_InitQueuePriority_8814AUsb(Adapter);1162_InitPageBoundary_8814AUsb(Adapter);11631164_InitTransferPageSize_8814AUsb(Adapter);11651166HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);1167/* Get Rx PHY status in order to report RSSI and others. */1168_InitDriverInfoSize_8814A(Adapter, DRVINFO_SZ);11691170_InitInterrupt_8814AU(Adapter);1171_InitNetworkType_8814A(Adapter);/* set msr */1172_InitMacConfigure_8814A(Adapter);1173/* _InitWMACSetting_8814A(Adapter); */1174/* _InitAdaptiveCtrl_8814AUsb(Adapter); */1175_InitEDCA_8814AUsb(Adapter);11761177_InitRetryFunction_8814A(Adapter);1178init_UsbAggregationSetting_8814A(Adapter);11791180_InitBeaconParameters_8814A(Adapter);1181_InitBeaconMaxError_8814A(Adapter, _TRUE);11821183_InitBurstPktLen(Adapter); /* added by page. 20110919 */11841185/* */1186/* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */1187/* Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. */1188/* 2011.08.05. by tynli. */1189/* */1190value8 = rtw_read8(Adapter, REG_CR);1191rtw_write8(Adapter, REG_CR, (value8 | MACTXEN | MACRXEN));11921193#ifdef CONFIG_RTW_LED1194_InitHWLed(Adapter);1195#endif /* CONFIG_RTW_LED */11961197/* */1198/* d. Initialize BB related configurations. */1199/* */12001201HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);1202#if (HAL_BB_ENABLE == 1)1203status = PHY_BBConfig8814(Adapter);1204if (status == _FAIL)1205goto exit;1206#endif /* HAL_BB_ENABLE */12071208/* 92CU use 3-wire to r/w RF */1209/* pHalData->Rf_Mode = RF_OP_By_SW_3wire; */12101211HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);1212#if (HAL_RF_ENABLE == 1)1213status = PHY_RFConfig8814A(Adapter);1214if (status == _FAIL)1215goto exit;12161217/* todo: */1218/* if(pHalData->rf_type == RF_1T1R && IS_HARDWARE_TYPE_8812AU(Adapter)) */1219/* PHY_BB8812_Config_1T(Adapter); */1220#endif12211222PHY_ConfigBB_8814A(Adapter);12231224if (Adapter->registrypriv.channel <= 14)1225PHY_SwitchWirelessBand8814A(Adapter, BAND_ON_2_4G);1226else1227PHY_SwitchWirelessBand8814A(Adapter, BAND_ON_5G);12281229rtw_hal_set_chnl_bw(Adapter, Adapter->registrypriv.channel,1230CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE);12311232HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);12331234HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);1235invalidate_cam_all(Adapter);12361237HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);12381239/* HW SEQ CTRL */1240/* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */1241rtw_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);12421243/* */1244/* Disable BAR, suggested by Scott */1245/* 2010.04.09 add by hpfan */1246/* */1247rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);12481249rtw_write8(Adapter, REG_SECONDARY_CCA_CTRL_8814A, 0x03);12501251if (pregistrypriv->wifi_spec)1252rtw_write16(Adapter, REG_FAST_EDCA_CTRL , 0);1253/* adjust EDCCA to avoid collision */1254/*if(pregistrypriv->wifi_spec)1255{1256rtw_write16(Adapter, rEDCCA_Jaguar, 0xfe01);1257}*/1258/* Nav limit , suggest by scott */1259rtw_write8(Adapter, 0x652, 0x0);12601261HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);1262rtl8814_InitHalDm(Adapter);12631264/* */1265/* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */1266/* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */1267/* call init_adapter. May cause some problem?? */1268/* */1269/* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */1270/* in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState */1271/* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */1272/* Added by tynli. 2010.03.30. */1273pwrctrlpriv->rf_pwrstate = rf_on;12741275/*phy_iq_calibrate_8814a_init(&pHalData->odmpriv);*/12761277#if (HAL_BB_ENABLE == 1)1278PHY_SetRFEReg8814A(Adapter, _TRUE, pHalData->current_band_type);1279#endif /* HAL_BB_ENABLE */12801281/* 0x4c6[3] 1: RTS BW = Data BW */1282/* 0: RTS BW depends on CCA / secondary CCA result. */1283rtw_write8(Adapter, REG_QUEUE_CTRL, rtw_read8(Adapter, REG_QUEUE_CTRL) & 0xF7);12841285rtw_hal_set_hwreg(Adapter, HW_VAR_NAV_UPPER, ((u8 *)&NavUpper));12861287/* enable Tx report. */1288rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F);12891290/* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */1291/* rtw_write8(Adapter, REG_EARLY_MODE_CONTROL_8812+3, 0x01); */ /* Pretx_en, for WEP/TKIP SEC */12921293/* tynli_test_tx_report. */1294/* rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); */12951296/* Reset USB mode switch setting */1297rtw_write8(Adapter, REG_SDIO_CTRL_8814A, 0x0);1298rtw_write8(Adapter, REG_ACLK_MON, 0x0);129913001301HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);1302/* 2010/08/26 MH Merge from 8192CE. */1303if (pwrctrlpriv->rf_pwrstate == rf_on) {1304/* if(IS_HARDWARE_TYPE_8812AU(Adapter))1305{1306#if (RTL8812A_SUPPORT == 1)1307pHalData->bNeedIQK = _TRUE;1308if(pHalData->bIQKInitialized)1309phy_iq_calibrate_8812a(Adapter, _TRUE);1310else1311{1312phy_iq_calibrate_8812a(Adapter, _FALSE);1313pHalData->bIQKInitialized = _TRUE;1314}1315#endif1316}*/1317/* this should be done by rf team using phydm code */1318/* phy_iq_calibrate_8814a(&pHalData->odmpriv, _FALSE); */1319HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);13201321/* odm_txpowertracking_check(&pHalData->odmpriv ); */132213231324HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);1325/* phy_lc_calibrate_8812a(Adapter); */1326}132713281329HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21);13301331#if (MP_DRIVER == 1)1332if (Adapter->registrypriv.mp_mode == 1) {1333Adapter->mppriv.channel = pHalData->current_channel;1334MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel);1335}1336#endif /* #if (MP_DRIVER == 1) */13371338#ifdef CONFIG_BT_COEXIST1339HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST);1340/* _InitBTCoexist(Adapter); */13411342if (_TRUE == pHalData->EEPROMBluetoothCoexist) {1343/* Init BT hw config. */1344rtw_btcoex_HAL_Initialize(Adapter, _FALSE);1345} else {1346/* In combo card run wifi only , must setting some hardware reg. */1347rtl8812a_combo_card_WifiOnlyHwInit(Adapter);1348}1349#endif /* CONFIG_BT_COEXIST */13501351HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31);13521353/* rtw_write8(Adapter, REG_USB_HRPWM, 0); */13541355#ifdef CONFIG_XMIT_ACK1356/* ack for xmit mgmt frames. */1357rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));1358#endif /* CONFIG_XMIT_ACK */135913601361exit:1362HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);13631364RTW_INFO("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time));13651366#ifdef DBG_HAL_INIT_PROFILING1367hal_init_stages_timestamp[HAL_INIT_STAGES_END] = rtw_get_current_time();13681369for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM - 1; hal_init_profiling_i++) {1370RTW_INFO("DBG_HAL_INIT_PROFILING: %35s, %u, %5u, %5u\n"1371, hal_init_stages_str[hal_init_profiling_i]1372, hal_init_stages_timestamp[hal_init_profiling_i]1373, (hal_init_stages_timestamp[hal_init_profiling_i + 1] - hal_init_stages_timestamp[hal_init_profiling_i])1374, rtw_get_time_interval_ms(hal_init_stages_timestamp[hal_init_profiling_i], hal_init_stages_timestamp[hal_init_profiling_i + 1])1375);1376}1377#endif1378137913801381return status;1382}13831384void1385hal_carddisable_8814(1386PADAPTER Adapter1387)1388{1389u8 u1bTmp;13901391RTW_INFO("CardDisableRTL8814AU\n");13921393/* stop rx */1394rtw_write8(Adapter, REG_CR_8814A, 0x0);13951396/* Card disable power action flow */1397HalPwrSeqCmdParsing(Adapter, (u8)(~PWR_CUT_TESTCHIP_MSK), PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8814A_NIC_DISABLE_FLOW);13981399GET_HAL_DATA(Adapter)->bFWReady = _FALSE;14001401}14021403static void rtl8814au_hw_power_down(_adapter *padapter)1404{1405/* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */1406/* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */14071408/* Enable register area 0x0-0xc. */1409rtw_write8(padapter, REG_RSV_CTRL, 0x0);1410rtw_write16(padapter, REG_APS_FSMCO, 0x8812);1411}14121413u32 rtl8814au_hal_deinit(PADAPTER Adapter)1414{1415struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter);1416HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);1417RTW_INFO("==> %s\n", __FUNCTION__);14181419#ifdef CONFIG_BT_COEXIST1420if (hal_btcoex_IsBtExist(Adapter)) {1421RTW_INFO("BT module enable SIC\n");1422/* Only under WIN7 we can support selective suspend and enter D3 state when system call halt adapter. */14231424/* rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)|BIT12); */1425/* 2010/10/13 MH If we enable SIC in the position and then call _ResetDigitalProcedure1. in XP, */1426/* the system will hang due to 8051 reset fail. */1427} else1428#endif /* CONFIG_BT_COEXIST */1429{1430rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG) & (~BIT12));1431}14321433if (pHalData->bSupportUSB3 == _TRUE) {1434/* set Reg 0xf008[3:4] to 2'11 to eable U1/U2 Mode in USB3.0. added by page, 20120712 */1435rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008) | 0x18);1436}14371438rtw_write32(Adapter, REG_HISR, 0xFFFFFFFF);1439rtw_write32(Adapter, REG_HISRE, 0xFFFFFFFF);1440rtw_write32(Adapter, REG_HIMR, 0);1441rtw_write32(Adapter, REG_HIMRE, 0);14421443#ifdef SUPPORT_HW_RFOFF_DETECTED1444RTW_INFO("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive);1445if (pwrctl->bkeepfwalive) {1446_ps_close_RF(Adapter);1447if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown))1448rtl8814au_hw_power_down(Adapter);1449} else1450#endif1451{1452if (rtw_is_hw_init_completed(Adapter)) {1453rtw_hal_power_off(Adapter);14541455if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown))1456rtl8814au_hw_power_down(Adapter);1457}1458}1459return _SUCCESS;1460}146114621463unsigned int rtl8814au_inirp_init(PADAPTER Adapter)1464{1465u8 i;1466struct recv_buf *precvbuf;1467uint status;1468struct dvobj_priv *pdev = adapter_to_dvobj(Adapter);1469struct intf_hdl *pintfhdl = &Adapter->iopriv.intf;1470struct recv_priv *precvpriv = &(Adapter->recvpriv);1471u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);1472#ifdef CONFIG_USB_INTERRUPT_IN_PIPE1473HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);1474u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);1475#endif147614771478_read_port = pintfhdl->io_ops._read_port;14791480status = _SUCCESS;148114821483precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;14841485/* issue Rx irp to receive data */1486precvbuf = (struct recv_buf *)precvpriv->precv_buf;1487for (i = 0; i < NR_RECVBUFF; i++) {1488if (_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE) {1489status = _FAIL;1490goto exit;1491}14921493precvbuf++;1494precvpriv->free_recv_buf_queue_cnt--;1495}14961497#ifdef CONFIG_USB_INTERRUPT_IN_PIPE1498if (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] != 0x05) {1499status = _FAIL;1500RTW_INFO("%s =>Warning !! Have not USB Int-IN pipe, RtIntInPipe(%d)!!!\n", __func__, pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX]);1501goto exit;1502}1503_read_interrupt = pintfhdl->io_ops._read_interrupt;1504if (_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE) {1505status = _FAIL;1506}1507#endif15081509exit:1510151115121513return status;15141515}15161517unsigned int rtl8814au_inirp_deinit(PADAPTER Adapter)1518{15191520rtw_read_port_cancel(Adapter);152115221523return _SUCCESS;1524}15251526/* -------------------------------------------------------------------1527*1528* EEPROM/EFUSE Content Parsing1529*1530* ------------------------------------------------------------------- */1531void1532hal_ReadIDs_8814AU(1533PADAPTER Adapter,1534u8 *PROMContent,1535BOOLEAN AutoloadFail1536)1537{1538HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);15391540if (!AutoloadFail) {1541pHalData->EEPROMVID = ReadLE2Byte(&PROMContent[EEPROM_VID_8814AU]);1542pHalData->EEPROMPID = ReadLE2Byte(&PROMContent[EEPROM_PID_8814AU]);15431544/* Customer ID, 0x00 and 0xff are reserved for Realtek. */1545pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CustomID_8814];1546pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;1547} else {1548pHalData->EEPROMVID = EEPROM_Default_VID;1549pHalData->EEPROMPID = EEPROM_Default_PID;15501551/* Customer ID, 0x00 and 0xff are reserved for Realtek. */1552pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID;1553pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;1554}15551556RTW_INFO("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID);1557RTW_INFO("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID);1558}155915601561void1562hal_CustomizedBehavior_8814AU(1563PADAPTER Adapter1564)1565{1566#ifdef CONFIG_RTW_SW_LED1567HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);1568struct led_priv *pledpriv = adapter_to_led(Adapter);156915701571/* Led mode */1572switch (pHalData->CustomerID) {1573case RT_CID_DEFAULT:1574pledpriv->LedStrategy = SW_LED_MODE9;1575pledpriv->bRegUseLed = _TRUE;1576break;15771578default:1579pledpriv->LedStrategy = SW_LED_MODE9;1580break;1581}1582#endif1583}15841585static void1586hal_CustomizeByCustomerID_8814AU(1587PADAPTER pAdapter1588)1589{1590HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);15911592RTW_INFO("PID= 0x%x, VID= %x\n", pHalData->EEPROMPID, pHalData->EEPROMVID);15931594/* Decide CustomerID according to VID/DID or EEPROM */1595switch (pHalData->EEPROMCustomerID) {1596case EEPROM_CID_DEFAULT:1597if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308))1598pHalData->CustomerID = RT_CID_DLINK;1599else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309))1600pHalData->CustomerID = RT_CID_DLINK;1601else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a))1602pHalData->CustomerID = RT_CID_DLINK;1603else if ((pHalData->EEPROMVID == 0x0BFF) && (pHalData->EEPROMPID == 0x8160))1604pHalData->CustomerID = RT_CID_CHINA_MOBILE;1605else if ((pHalData->EEPROMVID == 0x0BDA) && (pHalData->EEPROMPID == 0x5088))1606pHalData->CustomerID = RT_CID_CC_C;16071608break;1609case EEPROM_CID_WHQL:1610/* padapter->bInHctTest = _TRUE; */16111612/* pMgntInfo->bSupportTurboMode = _FALSE; */1613/* pMgntInfo->bAutoTurboBy8186 = _FALSE; */16141615/* pMgntInfo->PowerSaveControl.bInactivePs = _FALSE; */1616/* pMgntInfo->PowerSaveControl.bIPSModeBackup = _FALSE; */1617/* pMgntInfo->PowerSaveControl.bLeisurePs = _FALSE; */1618/* pMgntInfo->PowerSaveControl.bLeisurePsModeBackup = _FALSE; */1619/* pMgntInfo->keepAliveLevel = 0; */16201621/* padapter->bUnloadDriverwhenS3S4 = _FALSE; */1622break;1623default:1624pHalData->CustomerID = RT_CID_DEFAULT;1625break;16261627}1628RTW_INFO("Customer ID: 0x%2x\n", pHalData->CustomerID);16291630hal_CustomizedBehavior_8814AU(pAdapter);1631}16321633void1634hal_ReadUsbModeSwitch_8814AU(1635PADAPTER Adapter,1636u8 *PROMContent,1637BOOLEAN AutoloadFail1638)1639{1640HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);16411642if (AutoloadFail)1643pHalData->EEPROMUsbSwitch = _FALSE;1644else1645/* check efuse 0x0e bit4 */1646pHalData->EEPROMUsbSwitch = (PROMContent[EEPROM_USB_MODE_8814A] & BIT4) >> 4;16471648RTW_INFO("Usb Switch: %d\n", pHalData->EEPROMUsbSwitch);1649}16501651static void1652ReadLEDSetting_8814AU(1653PADAPTER Adapter,1654u8 *PROMContent,1655BOOLEAN AutoloadFail1656)1657{1658#ifdef CONFIG_RTW_LED1659struct led_priv *pledpriv = adapter_to_led(Adapter);16601661#ifdef CONFIG_RTW_SW_LED1662pledpriv->bRegUseLed = _TRUE;1663#else /* HW LED */1664pledpriv->LedStrategy = HW_LED;1665#endif /* CONFIG_RTW_SW_LED */1666#endif1667}16681669void1670InitAdapterVariablesByPROM_8814AU(1671PADAPTER Adapter1672)1673{1674PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);16751676hal_InitPGData_8814A(Adapter, pHalData->efuse_eeprom_data);16771678/* Hal_EfuseParseIDCode8812A(Adapter, pHalData->efuse_eeprom_data); */1679hal_ReadPROMVersion8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1680hal_ReadIDs_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1681hal_config_macaddr(Adapter, pHalData->bautoload_fail_flag);1682hal_ReadTxPowerInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1683hal_ReadBoardType8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1684hal_Read_TRX_antenna_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);16851686/* */1687/* Read Bluetooth co-exist and initialize */1688/* */1689hal_EfuseParseBTCoexistInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);16901691hal_ReadChannelPlan8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1692hal_EfuseParseXtal_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1693hal_ReadThermalMeter_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1694hal_ReadRemoteWakeup_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1695hal_ReadAntennaDiversity8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1696hal_ReadRFEType_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1697hal_ReadPowerTrackingType_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1698ReadLEDSetting_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);16991700hal_ReadUsbModeSwitch_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);1701hal_CustomizeByCustomerID_8814AU(Adapter);17021703hal_GetRxGainOffset_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);17041705Hal_EfuseParseKFreeData_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag);17061707/* set coex. ant info once efuse parsing is done */1708rtw_btcoex_set_ant_info(Adapter);1709}17101711static void hal_ReadPROMContent_8814A(1712PADAPTER Adapter1713)1714{1715PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);1716u8 eeValue;17171718/* check system boot selection */1719eeValue = rtw_read8(Adapter, REG_9346CR);1720pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE;1721pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE;17221723RTW_INFO("Boot from %s, Autoload %s !\n", (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"),1724(pHalData->bautoload_fail_flag ? "Fail" : "OK"));17251726/* pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; */17271728InitAdapterVariablesByPROM_8814AU(Adapter);1729}17301731u81732ReadAdapterInfo8814AU(1733PADAPTER Adapter1734)1735{1736Hal_InitEfuseVars_8814A(Adapter);17371738/* Read all content in Efuse/EEPROM. */1739hal_ReadPROMContent_8814A(Adapter);17401741/* We need to define the RF type after all PROM value is recognized. */1742ReadRFType8814A(Adapter);17431744return _SUCCESS;1745}17461747void UpdateInterruptMask8814AU(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR)1748{1749HAL_DATA_TYPE *pHalData;17501751u32 *himr;1752pHalData = GET_HAL_DATA(padapter);17531754if (bHIMR0)1755himr = &(pHalData->IntrMask[0]);1756else1757himr = &(pHalData->IntrMask[1]);17581759if (AddMSR)1760*himr |= AddMSR;17611762if (RemoveMSR)1763*himr &= (~RemoveMSR);17641765if (bHIMR0)1766rtw_write32(padapter, REG_HIMR0_8814A, *himr);1767else1768rtw_write32(padapter, REG_HIMR1_8814A, *himr);17691770}17711772u8 SetHwReg8814AU(PADAPTER Adapter, u8 variable, u8 *val)1773{1774HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);1775struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter);1776struct registry_priv *registry_par = &Adapter->registrypriv;1777u8 ret = _SUCCESS;17781779switch (variable) {1780case HW_VAR_RXDMA_AGG_PG_TH:1781#ifdef CONFIG_USB_RX_AGGREGATION1782{1783/*u8 threshold = *((u8 *)val);1784if( threshold == 0)1785{1786threshold = pHalData->UsbRxAggPageCount;1787}1788rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);*/1789}1790#endif1791break;1792case HW_VAR_SET_RPWM:1793#ifdef CONFIG_LPS_LCLK1794{1795u8 ps_state = *((u8 *)val);1796/* rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. */1797/* BIT0 value - 1: 32k, 0:40MHz. */1798/* BIT6 value - 1: report cpwm value after success set, 0:do not report. */1799/* BIT7 value - Toggle bit change. */1800/* modify by Thomas. 2012/4/2. */1801ps_state = ps_state & 0xC1;1802/* RTW_INFO("##### Change RPWM value to = %x for switch clk #####\n",ps_state); */1803rtw_write8(Adapter, REG_USB_HRPWM, ps_state);1804}1805#endif1806#ifdef CONFIG_AP_WOWLAN1807if (pwrctl->wowlan_ap_mode == _TRUE) {1808u8 ps_state = *((u8 *)val);18091810RTW_INFO("%s, RPWM\n", __func__);1811ps_state = ps_state & 0xC1;1812rtw_write8(Adapter, REG_USB_HRPWM, ps_state);1813}1814#endif1815break;1816case HW_VAR_USB_MODE:1817/* U2 to U3 */1818if (registry_par->switch_usb_mode == 1) {1819if (IS_HIGH_SPEED_USB(Adapter)) {1820if ((rtw_read8(Adapter, 0x74) & (BIT(2) | BIT(3))) != BIT(3)) {1821rtw_write8(Adapter, 0x74, 0x8);1822rtw_write8(Adapter, 0x70, 0x2);1823rtw_write8(Adapter, 0x3e, 0x1);1824rtw_write8(Adapter, 0x3d, 0x3);1825/* usb disconnect */1826rtw_write8(Adapter, 0x5, 0x80);1827*val = _TRUE;1828}1829} else if (IS_SUPER_SPEED_USB(Adapter)) {1830rtw_write8(Adapter, 0x70, rtw_read8(Adapter, 0x70) & (~BIT(1)));1831rtw_write8(Adapter, 0x3e, rtw_read8(Adapter, 0x3e) & (~BIT(0)));1832}1833} else if (registry_par->switch_usb_mode == 2) {1834/* U3 to U2 */1835if (IS_SUPER_SPEED_USB(Adapter)) {1836if ((rtw_read8(Adapter, 0x74) & (BIT(2) | BIT(3))) != BIT(2)) {1837rtw_write8(Adapter, 0x74, 0x4);1838rtw_write8(Adapter, 0x70, 0x2);1839rtw_write8(Adapter, 0x3e, 0x1);1840rtw_write8(Adapter, 0x3d, 0x3);1841/* usb disconnect */1842rtw_write8(Adapter, 0x5, 0x80);1843*val = _TRUE;1844}1845} else if (IS_HIGH_SPEED_USB(Adapter)) {1846rtw_write8(Adapter, 0x70, rtw_read8(Adapter, 0x70) & (~BIT(1)));1847rtw_write8(Adapter, 0x3e, rtw_read8(Adapter, 0x3e) & (~BIT(0)));1848}1849}1850break;1851default:1852ret = SetHwReg8814A(Adapter, variable, val);1853break;1854}18551856return ret;1857}18581859void GetHwReg8814AU(PADAPTER Adapter, u8 variable, u8 *val)1860{1861HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);18621863switch (variable) {1864default:1865GetHwReg8814A(Adapter, variable, val);1866break;1867}18681869}18701871/*1872* Description:1873* Change default setting of specified variable.1874* */1875u81876SetHalDefVar8814AUsb(1877PADAPTER Adapter,1878HAL_DEF_VARIABLE eVariable,1879void *pValue1880)1881{1882HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);1883u8 bResult = _SUCCESS;18841885switch (eVariable) {1886default:1887SetHalDefVar8814A(Adapter, eVariable, pValue);1888break;1889}18901891return bResult;1892}18931894/*1895* Description:1896* Query setting of specified variable.1897* */1898u81899GetHalDefVar8814AUsb(1900PADAPTER Adapter,1901HAL_DEF_VARIABLE eVariable,1902void *pValue1903)1904{1905HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);1906u8 bResult = _SUCCESS;19071908switch (eVariable) {1909default:1910GetHalDefVar8814A(Adapter, eVariable, pValue);1911break;1912}19131914return bResult;1915}19161917static void rtl8814au_init_default_value(_adapter *padapter)1918{1919PHAL_DATA_TYPE pHalData;19201921pHalData = GET_HAL_DATA(padapter);19221923InitDefaultValue8814A(padapter);19241925pHalData->IntrMask[0] = (u32)(\1926/* IMR_ROK | */1927/* IMR_RDU | */1928/* IMR_VODOK | */1929/* IMR_VIDOK | */1930/* IMR_BEDOK | */1931/* IMR_BKDOK | */1932/* IMR_MGNTDOK | */1933/* IMR_HIGHDOK | */1934/* IMR_CPWM | */1935/* IMR_CPWM2 | */1936/* IMR_C2HCMD | */1937/* IMR_HISR1_IND_INT | */1938/* IMR_ATIMEND | */1939/* IMR_BCNDMAINT_E | */1940/* IMR_HSISR_IND_ON_INT | */1941/* IMR_BCNDOK0 | */1942/* IMR_BCNDMAINT0 | */1943/* IMR_TSF_BIT32_TOGGLE | */1944/* IMR_TXBCN0OK | */1945/* IMR_TXBCN0ERR | */1946/* IMR_GTINT3 | */1947/* IMR_GTINT4 | */1948/* IMR_TXCCK | */19490);19501951pHalData->IntrMask[1] = (u32)(\1952/* IMR_RXFOVW | */1953/* IMR_TXFOVW | */1954/* IMR_RXERR | */1955/* IMR_TXERR | */1956/* IMR_ATIMEND_E | */1957/* IMR_BCNDOK1 | */1958/* IMR_BCNDOK2 | */1959/* IMR_BCNDOK3 | */1960/* IMR_BCNDOK4 | */1961/* IMR_BCNDOK5 | */1962/* IMR_BCNDOK6 | */1963/* IMR_BCNDOK7 | */1964/* IMR_BCNDMAINT1 | */1965/* IMR_BCNDMAINT2 | */1966/* IMR_BCNDMAINT3 | */1967/* IMR_BCNDMAINT4 | */1968/* IMR_BCNDMAINT5 | */1969/* IMR_BCNDMAINT6 | */1970/* IMR_BCNDMAINT7 | */19710);1972}19731974static u8 rtl8814au_ps_func(PADAPTER Adapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)1975{1976u8 bResult = _TRUE;1977switch (efunc_id) {19781979#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)1980case HAL_USB_SELECT_SUSPEND: {1981u8 bfwpoll = *((u8 *)val);1982/* rtl8188e_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500); */ /* note fw to support hw power down ping detect */1983}1984break;1985#endif /* CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED */19861987default:1988break;1989}1990return bResult;1991}19921993void rtl8814au_set_hal_ops(_adapter *padapter)1994{1995struct hal_ops *pHalFunc = &padapter->hal_func;199619971998pHalFunc->hal_power_on = _InitPowerOn_8814AU;1999pHalFunc->hal_power_off = hal_carddisable_8814;20002001pHalFunc->hal_init = &rtl8814au_hal_init;2002pHalFunc->hal_deinit = &rtl8814au_hal_deinit;20032004pHalFunc->inirp_init = &rtl8814au_inirp_init;2005pHalFunc->inirp_deinit = &rtl8814au_inirp_deinit;20062007pHalFunc->init_xmit_priv = &rtl8814au_init_xmit_priv;2008pHalFunc->free_xmit_priv = &rtl8814au_free_xmit_priv;20092010pHalFunc->init_recv_priv = &rtl8814au_init_recv_priv;2011pHalFunc->free_recv_priv = &rtl8814au_free_recv_priv;2012#ifdef CONFIG_RTW_SW_LED2013pHalFunc->InitSwLeds = &rtl8814au_InitSwLeds;2014pHalFunc->DeInitSwLeds = &rtl8814au_DeInitSwLeds;2015#endif/* CONFIG_RTW_SW_LED */20162017pHalFunc->init_default_value = &rtl8814au_init_default_value;2018pHalFunc->intf_chip_configure = &rtl8814au_interface_configure;2019pHalFunc->read_adapter_info = &ReadAdapterInfo8814AU;20202021pHalFunc->set_hw_reg_handler = &SetHwReg8814AU;2022pHalFunc->GetHwRegHandler = &GetHwReg8814AU;2023pHalFunc->get_hal_def_var_handler = &GetHalDefVar8814AUsb;2024pHalFunc->SetHalDefVarHandler = &SetHalDefVar8814AUsb;202520262027pHalFunc->hal_xmit = &rtl8814au_hal_xmit;2028pHalFunc->mgnt_xmit = &rtl8814au_mgnt_xmit;2029pHalFunc->hal_xmitframe_enqueue = &rtl8814au_hal_xmitframe_enqueue;20302031#ifdef CONFIG_HOSTAPD_MLME2032pHalFunc->hostap_mgnt_xmit_entry = &rtl8812au_hostap_mgnt_xmit_entry;2033#endif2034pHalFunc->interface_ps_func = &rtl8814au_ps_func;2035#ifdef CONFIG_XMIT_THREAD_MODE2036pHalFunc->xmit_thread_handler = &rtl8814au_xmit_buf_handler;2037#endif2038#ifdef CONFIG_SUPPORT_USB_INT2039pHalFunc->interrupt_handler = interrupt_handler_8814au;2040#endif2041#ifdef CONFIG_FW_CORRECT_BCN2042pHalFunc->fw_correct_bcn = &rtl8814_fw_update_beacon_cmd;2043#endif2044rtl8814_set_hal_ops(pHalFunc);20452046}204720482049