Path: blob/master/tools/android-sdk/renderscript/clang-include/__clang_cuda_intrinsics.h
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/*===--- __clang_cuda_intrinsics.h - Device-side CUDA intrinsic wrappers ---===1*2* Permission is hereby granted, free of charge, to any person obtaining a copy3* of this software and associated documentation files (the "Software"), to deal4* in the Software without restriction, including without limitation the rights5* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell6* copies of the Software, and to permit persons to whom the Software is7* furnished to do so, subject to the following conditions:8*9* The above copyright notice and this permission notice shall be included in10* all copies or substantial portions of the Software.11*12* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR13* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,14* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE15* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER16* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,17* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN18* THE SOFTWARE.19*20*===-----------------------------------------------------------------------===21*/22#ifndef __CLANG_CUDA_INTRINSICS_H__23#define __CLANG_CUDA_INTRINSICS_H__24#ifndef __CUDA__25#error "This file is for CUDA compilation only."26#endif2728// sm_30 intrinsics: __shfl_{up,down,xor}.2930#define __SM_30_INTRINSICS_H__31#define __SM_30_INTRINSICS_HPP__3233#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 3003435#pragma push_macro("__MAKE_SHUFFLES")36#define __MAKE_SHUFFLES(__FnName, __IntIntrinsic, __FloatIntrinsic, __Mask) \37inline __device__ int __FnName(int __in, int __offset, \38int __width = warpSize) { \39return __IntIntrinsic(__in, __offset, \40((warpSize - __width) << 8) | (__Mask)); \41} \42inline __device__ float __FnName(float __in, int __offset, \43int __width = warpSize) { \44return __FloatIntrinsic(__in, __offset, \45((warpSize - __width) << 8) | (__Mask)); \46} \47inline __device__ unsigned int __FnName(unsigned int __in, int __offset, \48int __width = warpSize) { \49return static_cast<unsigned int>( \50::__FnName(static_cast<int>(__in), __offset, __width)); \51} \52inline __device__ long long __FnName(long long __in, int __offset, \53int __width = warpSize) { \54struct __Bits { \55int __a, __b; \56}; \57_Static_assert(sizeof(__in) == sizeof(__Bits)); \58_Static_assert(sizeof(__Bits) == 2 * sizeof(int)); \59__Bits __tmp; \60memcpy(&__in, &__tmp, sizeof(__in)); \61__tmp.__a = ::__FnName(__tmp.__a, __offset, __width); \62__tmp.__b = ::__FnName(__tmp.__b, __offset, __width); \63long long __out; \64memcpy(&__out, &__tmp, sizeof(__tmp)); \65return __out; \66} \67inline __device__ unsigned long long __FnName( \68unsigned long long __in, int __offset, int __width = warpSize) { \69return static_cast<unsigned long long>( \70::__FnName(static_cast<unsigned long long>(__in), __offset, __width)); \71} \72inline __device__ double __FnName(double __in, int __offset, \73int __width = warpSize) { \74long long __tmp; \75_Static_assert(sizeof(__tmp) == sizeof(__in)); \76memcpy(&__tmp, &__in, sizeof(__in)); \77__tmp = ::__FnName(__tmp, __offset, __width); \78double __out; \79memcpy(&__out, &__tmp, sizeof(__out)); \80return __out; \81}8283__MAKE_SHUFFLES(__shfl, __nvvm_shfl_idx_i32, __nvvm_shfl_idx_f32, 0x1f);84// We use 0 rather than 31 as our mask, because shfl.up applies to lanes >=85// maxLane.86__MAKE_SHUFFLES(__shfl_up, __nvvm_shfl_up_i32, __nvvm_shfl_up_f32, 0);87__MAKE_SHUFFLES(__shfl_down, __nvvm_shfl_down_i32, __nvvm_shfl_down_f32, 0x1f);88__MAKE_SHUFFLES(__shfl_xor, __nvvm_shfl_bfly_i32, __nvvm_shfl_bfly_f32, 0x1f);8990#pragma pop_macro("__MAKE_SHUFFLES")9192#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 3009394// sm_32 intrinsics: __ldg and __funnelshift_{l,lc,r,rc}.9596// Prevent the vanilla sm_32 intrinsics header from being included.97#define __SM_32_INTRINSICS_H__98#define __SM_32_INTRINSICS_HPP__99100#if !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 320101102inline __device__ char __ldg(const char *ptr) { return __nvvm_ldg_c(ptr); }103inline __device__ short __ldg(const short *ptr) { return __nvvm_ldg_s(ptr); }104inline __device__ int __ldg(const int *ptr) { return __nvvm_ldg_i(ptr); }105inline __device__ long __ldg(const long *ptr) { return __nvvm_ldg_l(ptr); }106inline __device__ long long __ldg(const long long *ptr) {107return __nvvm_ldg_ll(ptr);108}109inline __device__ unsigned char __ldg(const unsigned char *ptr) {110return __nvvm_ldg_uc(ptr);111}112inline __device__ unsigned short __ldg(const unsigned short *ptr) {113return __nvvm_ldg_us(ptr);114}115inline __device__ unsigned int __ldg(const unsigned int *ptr) {116return __nvvm_ldg_ui(ptr);117}118inline __device__ unsigned long __ldg(const unsigned long *ptr) {119return __nvvm_ldg_ul(ptr);120}121inline __device__ unsigned long long __ldg(const unsigned long long *ptr) {122return __nvvm_ldg_ull(ptr);123}124inline __device__ float __ldg(const float *ptr) { return __nvvm_ldg_f(ptr); }125inline __device__ double __ldg(const double *ptr) { return __nvvm_ldg_d(ptr); }126127inline __device__ char2 __ldg(const char2 *ptr) {128typedef char c2 __attribute__((ext_vector_type(2)));129// We can assume that ptr is aligned at least to char2's alignment, but the130// load will assume that ptr is aligned to char2's alignment. This is only131// safe if alignof(c2) <= alignof(char2).132c2 rv = __nvvm_ldg_c2(reinterpret_cast<const c2 *>(ptr));133char2 ret;134ret.x = rv[0];135ret.y = rv[1];136return ret;137}138inline __device__ char4 __ldg(const char4 *ptr) {139typedef char c4 __attribute__((ext_vector_type(4)));140c4 rv = __nvvm_ldg_c4(reinterpret_cast<const c4 *>(ptr));141char4 ret;142ret.x = rv[0];143ret.y = rv[1];144ret.z = rv[2];145ret.w = rv[3];146return ret;147}148inline __device__ short2 __ldg(const short2 *ptr) {149typedef short s2 __attribute__((ext_vector_type(2)));150s2 rv = __nvvm_ldg_s2(reinterpret_cast<const s2 *>(ptr));151short2 ret;152ret.x = rv[0];153ret.y = rv[1];154return ret;155}156inline __device__ short4 __ldg(const short4 *ptr) {157typedef short s4 __attribute__((ext_vector_type(4)));158s4 rv = __nvvm_ldg_s4(reinterpret_cast<const s4 *>(ptr));159short4 ret;160ret.x = rv[0];161ret.y = rv[1];162ret.z = rv[2];163ret.w = rv[3];164return ret;165}166inline __device__ int2 __ldg(const int2 *ptr) {167typedef int i2 __attribute__((ext_vector_type(2)));168i2 rv = __nvvm_ldg_i2(reinterpret_cast<const i2 *>(ptr));169int2 ret;170ret.x = rv[0];171ret.y = rv[1];172return ret;173}174inline __device__ int4 __ldg(const int4 *ptr) {175typedef int i4 __attribute__((ext_vector_type(4)));176i4 rv = __nvvm_ldg_i4(reinterpret_cast<const i4 *>(ptr));177int4 ret;178ret.x = rv[0];179ret.y = rv[1];180ret.z = rv[2];181ret.w = rv[3];182return ret;183}184inline __device__ longlong2 __ldg(const longlong2 *ptr) {185typedef long long ll2 __attribute__((ext_vector_type(2)));186ll2 rv = __nvvm_ldg_ll2(reinterpret_cast<const ll2 *>(ptr));187longlong2 ret;188ret.x = rv[0];189ret.y = rv[1];190return ret;191}192193inline __device__ uchar2 __ldg(const uchar2 *ptr) {194typedef unsigned char uc2 __attribute__((ext_vector_type(2)));195uc2 rv = __nvvm_ldg_uc2(reinterpret_cast<const uc2 *>(ptr));196uchar2 ret;197ret.x = rv[0];198ret.y = rv[1];199return ret;200}201inline __device__ uchar4 __ldg(const uchar4 *ptr) {202typedef unsigned char uc4 __attribute__((ext_vector_type(4)));203uc4 rv = __nvvm_ldg_uc4(reinterpret_cast<const uc4 *>(ptr));204uchar4 ret;205ret.x = rv[0];206ret.y = rv[1];207ret.z = rv[2];208ret.w = rv[3];209return ret;210}211inline __device__ ushort2 __ldg(const ushort2 *ptr) {212typedef unsigned short us2 __attribute__((ext_vector_type(2)));213us2 rv = __nvvm_ldg_us2(reinterpret_cast<const us2 *>(ptr));214ushort2 ret;215ret.x = rv[0];216ret.y = rv[1];217return ret;218}219inline __device__ ushort4 __ldg(const ushort4 *ptr) {220typedef unsigned short us4 __attribute__((ext_vector_type(4)));221us4 rv = __nvvm_ldg_us4(reinterpret_cast<const us4 *>(ptr));222ushort4 ret;223ret.x = rv[0];224ret.y = rv[1];225ret.z = rv[2];226ret.w = rv[3];227return ret;228}229inline __device__ uint2 __ldg(const uint2 *ptr) {230typedef unsigned int ui2 __attribute__((ext_vector_type(2)));231ui2 rv = __nvvm_ldg_ui2(reinterpret_cast<const ui2 *>(ptr));232uint2 ret;233ret.x = rv[0];234ret.y = rv[1];235return ret;236}237inline __device__ uint4 __ldg(const uint4 *ptr) {238typedef unsigned int ui4 __attribute__((ext_vector_type(4)));239ui4 rv = __nvvm_ldg_ui4(reinterpret_cast<const ui4 *>(ptr));240uint4 ret;241ret.x = rv[0];242ret.y = rv[1];243ret.z = rv[2];244ret.w = rv[3];245return ret;246}247inline __device__ ulonglong2 __ldg(const ulonglong2 *ptr) {248typedef unsigned long long ull2 __attribute__((ext_vector_type(2)));249ull2 rv = __nvvm_ldg_ull2(reinterpret_cast<const ull2 *>(ptr));250ulonglong2 ret;251ret.x = rv[0];252ret.y = rv[1];253return ret;254}255256inline __device__ float2 __ldg(const float2 *ptr) {257typedef float f2 __attribute__((ext_vector_type(2)));258f2 rv = __nvvm_ldg_f2(reinterpret_cast<const f2 *>(ptr));259float2 ret;260ret.x = rv[0];261ret.y = rv[1];262return ret;263}264inline __device__ float4 __ldg(const float4 *ptr) {265typedef float f4 __attribute__((ext_vector_type(4)));266f4 rv = __nvvm_ldg_f4(reinterpret_cast<const f4 *>(ptr));267float4 ret;268ret.x = rv[0];269ret.y = rv[1];270ret.z = rv[2];271ret.w = rv[3];272return ret;273}274inline __device__ double2 __ldg(const double2 *ptr) {275typedef double d2 __attribute__((ext_vector_type(2)));276d2 rv = __nvvm_ldg_d2(reinterpret_cast<const d2 *>(ptr));277double2 ret;278ret.x = rv[0];279ret.y = rv[1];280return ret;281}282283// TODO: Implement these as intrinsics, so the backend can work its magic on284// these. Alternatively, we could implement these as plain C and try to get285// llvm to recognize the relevant patterns.286inline __device__ unsigned __funnelshift_l(unsigned low32, unsigned high32,287unsigned shiftWidth) {288unsigned result;289asm("shf.l.wrap.b32 %0, %1, %2, %3;"290: "=r"(result)291: "r"(low32), "r"(high32), "r"(shiftWidth));292return result;293}294inline __device__ unsigned __funnelshift_lc(unsigned low32, unsigned high32,295unsigned shiftWidth) {296unsigned result;297asm("shf.l.clamp.b32 %0, %1, %2, %3;"298: "=r"(result)299: "r"(low32), "r"(high32), "r"(shiftWidth));300return result;301}302inline __device__ unsigned __funnelshift_r(unsigned low32, unsigned high32,303unsigned shiftWidth) {304unsigned result;305asm("shf.r.wrap.b32 %0, %1, %2, %3;"306: "=r"(result)307: "r"(low32), "r"(high32), "r"(shiftWidth));308return result;309}310inline __device__ unsigned __funnelshift_rc(unsigned low32, unsigned high32,311unsigned shiftWidth) {312unsigned ret;313asm("shf.r.clamp.b32 %0, %1, %2, %3;"314: "=r"(ret)315: "r"(low32), "r"(high32), "r"(shiftWidth));316return ret;317}318319#endif // !defined(__CUDA_ARCH__) || __CUDA_ARCH__ >= 320320321#endif // defined(__CLANG_CUDA_INTRINSICS_H__)322323324