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script3r
GitHub Repository: script3r/os161
 Path: blob/master/kern/arch/mips/include/trapframe.h
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/*

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 * Copyright (c) 2000, 2001, 2002, 2003, 2004, 2005, 2008, 2009

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 *	The President and Fellows of Harvard College.

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 *

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 * Redistribution and use in source and binary forms, with or without

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 * modification, are permitted provided that the following conditions

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 * are met:

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 * 1. Redistributions of source code must retain the above copyright

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 *    notice, this list of conditions and the following disclaimer.

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 * 2. Redistributions in binary form must reproduce the above copyright

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 *    notice, this list of conditions and the following disclaimer in the

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 *    documentation and/or other materials provided with the distribution.

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 * 3. Neither the name of the University nor the names of its contributors

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 *    may be used to endorse or promote products derived from this software

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 *    without specific prior written permission.

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 *

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 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND

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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE

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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

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 * SUCH DAMAGE.

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 */

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#ifndef _MIPS_TRAPFRAME_H_

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#define _MIPS_TRAPFRAME_H_

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/*

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 * Structure describing what is saved on the stack during entry to

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 * the exception handler.

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 *

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 * This must agree with the code in exception.S.

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 */

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struct trapframe {

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	uint32_t tf_vaddr;	/* coprocessor 0 vaddr register */

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	uint32_t tf_status;	/* coprocessor 0 status register */

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	uint32_t tf_cause;	/* coprocessor 0 cause register */

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	uint32_t tf_lo;

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	uint32_t tf_hi;

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	uint32_t tf_ra;		/* Saved register 31 */

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	uint32_t tf_at;		/* Saved register 1 (AT) */

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	uint32_t tf_v0;		/* Saved register 2 (v0) */

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	uint32_t tf_v1;		/* etc. */

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	uint32_t tf_a0;

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	uint32_t tf_a1;

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	uint32_t tf_a2;

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	uint32_t tf_a3;

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	uint32_t tf_t0;

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	uint32_t tf_t1;

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	uint32_t tf_t2;

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	uint32_t tf_t3;

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	uint32_t tf_t4;

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	uint32_t tf_t5;

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	uint32_t tf_t6;

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	uint32_t tf_t7;

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	uint32_t tf_s0;

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	uint32_t tf_s1;

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	uint32_t tf_s2;

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	uint32_t tf_s3;

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	uint32_t tf_s4;

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	uint32_t tf_s5;

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	uint32_t tf_s6;

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	uint32_t tf_s7;

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	uint32_t tf_t8;

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	uint32_t tf_t9;

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	uint32_t tf_k0;		/* dummy (see exception.S comments) */

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	uint32_t tf_k1;		/* dummy */

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	uint32_t tf_gp;

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	uint32_t tf_sp;

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	uint32_t tf_s8;

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	uint32_t tf_epc;	/* coprocessor 0 epc register */

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};

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/*

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 * MIPS exception codes.

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 */

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#define EX_IRQ    0    /* Interrupt */

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#define EX_MOD    1    /* TLB Modify (write to read-only page) */

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#define EX_TLBL   2    /* TLB miss on load */

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#define EX_TLBS   3    /* TLB miss on store */

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#define EX_ADEL   4    /* Address error on load */

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#define EX_ADES   5    /* Address error on store */

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#define EX_IBE    6    /* Bus error on instruction fetch */

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#define EX_DBE    7    /* Bus error on data load *or* store */

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#define EX_SYS    8    /* Syscall */

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#define EX_BP     9    /* Breakpoint */

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#define EX_RI     10   /* Reserved (illegal) instruction */

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#define EX_CPU    11   /* Coprocessor unusable */

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#define EX_OVF    12   /* Arithmetic overflow */

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/*

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 * Function to enter user mode. Does not return. The trapframe must

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 * be on the thread's own stack or bad things will happen.

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 */

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void mips_usermode(struct trapframe *tf);

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/*

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 * Arrays used to load the kernel stack and curthread on trap entry.

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 */

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extern vaddr_t cpustacks[];

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extern vaddr_t cputhreads[];

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#endif /* _MIPS_TRAPFRAME_H_ */

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