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script3r
GitHub Repository: script3r/os161
 Path: blob/master/kern/arch/mips/locore/cache-mips161.S
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/*

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 * Copyright (c) 2001, 2009

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 *	The President and Fellows of Harvard College.

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 *

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 * Redistribution and use in source and binary forms, with or without

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 * modification, are permitted provided that the following conditions

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 * are met:

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 * 1. Redistributions of source code must retain the above copyright

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 *    notice, this list of conditions and the following disclaimer.

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 * 2. Redistributions in binary form must reproduce the above copyright

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 *    notice, this list of conditions and the following disclaimer in the

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 *    documentation and/or other materials provided with the distribution.

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 * 3. Neither the name of the University nor the names of its contributors

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 *    may be used to endorse or promote products derived from this software

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 *    without specific prior written permission.

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 *

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 * THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND

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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE

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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

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 * SUCH DAMAGE.

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 */

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#include <kern/mips/regdefs.h>

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   /*

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    * Cache flushing code for the System/161 MIPS variant, which

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    * (for now at least) has magically coherent caches. Almost all

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    * real MIPS processors require explicit cache control of one

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    * form or another; it can be quite a nuisance. (It is particularly

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    * nasty on the MIPS-1, that is, r2000/r3000.)

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    */

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   .text

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   .set noreorder

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   .globl mips_flushicache

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   .type mips_flushicache,@function

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   .ent mips_flushicache

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mips_flushicache:

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   j ra

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   nop

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   .end mips_flushicache

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