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script3r
GitHub Repository: script3r/os161
Path: blob/master/kern/arch/mips/vm/vm.c
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#include <types.h>
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#include <synch.h>
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#include <kern/errno.h>
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#include <lib.h>
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#include <thread.h>
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#include <cpu.h>
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#include <spl.h>
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#include <wchan.h>
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#include <current.h>
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#include <machine/coremap.h>
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#include <vm.h>
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#include <vm/swap.h>
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#include <vm/page.h>
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#include <addrspace.h>
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#include <machine/tlb.h>
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struct spinlock slk_steal = SPINLOCK_INITIALIZER;
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/**
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* kickstart the virtual memory system.
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* we simply initialize our coremap structure.
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*/
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void
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vm_bootstrap( void ) {
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//botstrap the coremap.
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coremap_bootstrap();
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//make sure to bootstrap our swap.
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swap_bootstrap();
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}
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int
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vm_fault( int fault_type, vaddr_t fault_addr ) {
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struct addrspace *as;
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int res;
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//make sure it is page aligned.
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fault_addr &= PAGE_FRAME;
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//get the addrspace.
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as = curthread->t_addrspace;
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if( as == NULL )
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return EFAULT;
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//delegate the fault to the address space.
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res = as_fault( as, fault_type, fault_addr );
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KASSERT( !lock_do_i_hold( giant_paging_lock ) );
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return res;
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}
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void
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vm_map( vaddr_t vaddr, paddr_t paddr, int writeable ) {
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int ix;
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int ix_tlb;
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uint32_t tlb_hi;
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uint32_t tlb_lo;
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KASSERT( (paddr & PAGE_FRAME) == paddr );
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KASSERT( paddr != INVALID_PADDR );
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//lock the coremap for atomicity.
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LOCK_COREMAP();
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//get the coremap_entry index associated with the paddr.
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ix = PADDR_TO_COREMAP( paddr );
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KASSERT( coremap_is_wired( paddr ) );
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//probe to see if this virtual address is already mapped inside the tlb.
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ix_tlb = tlb_probe( vaddr, 0 );
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//if it is not
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if( ix_tlb < 0 ) {
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//make sure what the coremap has is correct.
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//KASSERT( coremap[ix].cme_tlb_ix == -1 );
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//KASSERT( coremap[ix].cme_cpu == 0 );
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//get a free tlb slot.
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ix_tlb = tlb_get_free_slot();
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KASSERT( ix_tlb >= 0 && ix_tlb < NUM_TLB );
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//update the coremap entry.
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coremap[ix].cme_tlb_ix = ix_tlb;
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coremap[ix].cme_cpu = curcpu->c_number;
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}
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else {
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//make sure it reflects the stats we have in the coremap.
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KASSERT( coremap[ix].cme_tlb_ix == ix_tlb );
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KASSERT( coremap[ix].cme_cpu == curcpu->c_number );
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}
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//set the hi entry to be the first 20 bits of the vaddr.
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tlb_hi = vaddr & TLBHI_VPAGE;
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//set the V bit to true also, to signify that this mapping is valid.
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tlb_lo = (paddr & TLBLO_PPAGE) | TLBLO_VALID;
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//if the requested mapping is writeable, we must set the D bit.
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if( writeable )
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tlb_lo |= TLBLO_DIRTY;
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//write it to the tlb.
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tlb_write( tlb_hi, tlb_lo, ix_tlb );
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//unlock the coremap.
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UNLOCK_COREMAP();
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}
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void
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vm_unmap( vaddr_t vaddr ) {
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LOCK_COREMAP();
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tlb_unmap( vaddr );
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UNLOCK_COREMAP();
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}
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