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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/Documentation/devicetree/bindings/ata/ahci-platform.yaml
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: AHCI SATA Controller
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description: |
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SATA nodes are defined to describe on-chip Serial ATA controllers.
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Each SATA controller should have its own node.
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It is possible, but not required, to represent each port as a sub-node.
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It allows to enable each port independently when dealing with multiple
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PHYs.
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maintainers:
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- Hans de Goede <hdegoede@redhat.com>
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- Jens Axboe <axboe@kernel.dk>
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select:
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properties:
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compatible:
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contains:
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enum:
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- brcm,iproc-ahci
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- cavium,octeon-7130-ahci
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- hisilicon,hisi-ahci
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- ibm,476gtr-ahci
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- marvell,armada-3700-ahci
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- marvell,armada-8k-ahci
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- marvell,berlin2q-ahci
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- qcom,apq8064-ahci
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- qcom,ipq806x-ahci
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- socionext,uniphier-pro4-ahci
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- socionext,uniphier-pxs2-ahci
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- socionext,uniphier-pxs3-ahci
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required:
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- compatible
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- brcm,iproc-ahci
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- marvell,armada-8k-ahci
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- marvell,berlin2-ahci
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- marvell,berlin2q-ahci
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- qcom,apq8064-ahci
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- qcom,ipq806x-ahci
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- socionext,uniphier-pro4-ahci
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- socionext,uniphier-pxs2-ahci
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- socionext,uniphier-pxs3-ahci
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- const: generic-ahci
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- enum:
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- cavium,octeon-7130-ahci
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- hisilicon,hisi-ahci
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- ibm,476gtr-ahci
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- marvell,armada-3700-ahci
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reg:
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minItems: 1
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maxItems: 2
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reg-names:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 5
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clock-names:
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minItems: 1
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maxItems: 5
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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minItems: 1
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maxItems: 3
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iommus:
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maxItems: 1
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patternProperties:
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"^sata-port@[0-9a-f]+$":
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$ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
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anyOf:
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- required: [ phys ]
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- required: [ target-supply ]
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- interrupts
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allOf:
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- $ref: ahci-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,apq8064-ahci
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- qcom,ipq806x-ahci
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then:
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properties:
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clocks:
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minItems: 5
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clock-names:
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items:
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- const: slave_iface
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- const: iface
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- const: core
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- const: rxoob
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- const: pmalive
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required:
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- phys
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- phy-names
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- clocks
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- clock-names
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- if:
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properties:
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compatible:
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contains:
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const: socionext,uniphier-pro4-ahci
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then:
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properties:
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resets:
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items:
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- description: reset line for the parent
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- description: reset line for the glue logic
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- description: reset line for the controller
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required:
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- resets
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else:
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if:
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properties:
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compatible:
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contains:
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enum:
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- socionext,uniphier-pxs2-ahci
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- socionext,uniphier-pxs3-ahci
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then:
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properties:
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resets:
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items:
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- description: reset for the glue logic
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- description: reset for the controller
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required:
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- resets
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else:
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properties:
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resets:
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maxItems: 1
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unevaluatedProperties: false
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examples:
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- |
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sata@ffe08000 {
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compatible = "snps,spear-ahci";
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reg = <0xffe08000 0x1000>;
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interrupts = <115>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/berlin2q.h>
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#include <dt-bindings/ata/ahci.h>
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sata@f7e90000 {
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compatible = "marvell,berlin2q-ahci", "generic-ahci";
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reg = <0xf7e90000 0x1000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&chip CLKID_SATA>;
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#address-cells = <1>;
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#size-cells = <0>;
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hba-cap = <HBA_SMPS>;
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sata0: sata-port@0 {
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reg = <0>;
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phys = <&sata_phy 0>;
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target-supply = <&reg_sata0>;
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hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;
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};
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sata1: sata-port@1 {
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reg = <1>;
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phys = <&sata_phy 1>;
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target-supply = <&reg_sata1>;
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hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;
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};
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};
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