Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/ata/eswin,eic7700-ahci.yaml
38189 views
1
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

2
%YAML 1.2

3
---

4
$id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml#

5
$schema: http://devicetree.org/meta-schemas/core.yaml#

6


7
title: Eswin EIC7700 SoC SATA Controller

8


9
maintainers:

10
  - Yulin Lu <luyulin@eswincomputing.com>

11
  - Huan He <hehuan1@eswincomputing.com>

12


13
description:

14
  AHCI SATA controller embedded into the EIC7700 SoC is based on the DWC AHCI

15
  SATA v5.00a IP core.

16


17
select:

18
  properties:

19
    compatible:

20
      const: eswin,eic7700-ahci

21
  required:

22
    - compatible

23


24
allOf:

25
  - $ref: snps,dwc-ahci-common.yaml#

26


27
properties:

28
  compatible:

29
    items:

30
      - const: eswin,eic7700-ahci

31
      - const: snps,dwc-ahci

32


33
  clocks:

34
    minItems: 2

35
    maxItems: 2

36


37
  clock-names:

38
    items:

39
      - const: pclk

40
      - const: aclk

41


42
  resets:

43
    maxItems: 1

44


45
  reset-names:

46
    const: arst

47


48
  ports-implemented:

49
    const: 1

50


51
required:

52
  - compatible

53
  - reg

54
  - interrupts

55
  - clocks

56
  - clock-names

57
  - resets

58
  - reset-names

59
  - phys

60
  - phy-names

61
  - ports-implemented

62


63
unevaluatedProperties: false

64


65
examples:

66
  - |

67
    sata@50420000 {

68
        compatible = "eswin,eic7700-ahci", "snps,dwc-ahci";

69
        reg = <0x50420000 0x10000>;

70
        interrupt-parent = <&plic>;

71
        interrupts = <58>;

72
        clocks = <&clock 171>, <&clock 186>;

73
        clock-names = "pclk", "aclk";

74
        phys = <&sata_phy>;

75
        phy-names = "sata-phy";

76
        ports-implemented = <0x1>;

77
        resets = <&reset 96>;

78
        reset-names = "arst";

79
    };

80


81