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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/Documentation/devicetree/bindings/bus/st,stm32mp131-dbg-bus.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

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%YAML 1.2

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---

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$id: http://devicetree.org/schemas/bus/st,stm32mp131-dbg-bus.yaml#

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$schema: http://devicetree.org/meta-schemas/core.yaml#

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title: STM32 Coresight bus

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maintainers:

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  - Gatien Chevallier <gatien.chevallier@foss.st.com>

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description:

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  The STM32 debug bus is in charge of checking the debug configuration

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  of the platform before probing the peripheral drivers that rely on the debug

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  domain.

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properties:

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  compatible:

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    items:

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      - enum:

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          - st,stm32mp131-dbg-bus

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          - st,stm32mp151-dbg-bus

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  "#address-cells":

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    const: 1

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  "#size-cells":

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    const: 1

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  ranges:

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    minItems: 1

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    maxItems: 2

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  "#access-controller-cells":

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    const: 1

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    description:

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      Contains the debug profile necessary to access the peripheral.

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patternProperties:

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  "@[0-9a-f]+$":

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    description: Debug related peripherals

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    type: object

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    additionalProperties: true

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    required:

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      - access-controllers

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required:

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  - "#access-controller-cells"

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  - "#address-cells"

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  - "#size-cells"

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  - compatible

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  - ranges

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additionalProperties: false

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examples:

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  - |

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    #include <dt-bindings/clock/stm32mp1-clks.h>

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    dbg_bus: bus@50080000 {

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      compatible = "st,stm32mp131-dbg-bus";

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      #address-cells = <1>;

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      #size-cells = <1>;

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      #access-controller-cells = <1>;

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      ranges = <0x50080000 0x50080000 0x3f80000>;

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      cti@50094000 {

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        compatible = "arm,coresight-cti", "arm,primecell";

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        reg = <0x50094000 0x1000>;

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        clocks = <&rcc CK_DBG>;

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        clock-names = "apb_pclk";

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        access-controllers = <&dbg_bus 0>;

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      };

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    };

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