Path: blob/master/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml
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# SPDX-License-Identifier: GPL-2.01%YAML 1.22---3$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Allwinner A10 Module 0 Clock78maintainers:9- Chen-Yu Tsai <wens@csie.org>10- Maxime Ripard <mripard@kernel.org>1112deprecated: true1314select:15properties:16compatible:17contains:18enum:19- allwinner,sun4i-a10-mod0-clk20- allwinner,sun9i-a80-mod0-clk2122# The PRCM on the A31 and A23 will have the reg property missing,23# since it's set at the upper level node, and will be validated by24# PRCM's schema. Make sure we only validate standalone nodes.25required:26- compatible27- reg2829properties:30"#clock-cells":31const: 03233compatible:34enum:35- allwinner,sun4i-a10-mod0-clk36- allwinner,sun9i-a80-mod0-clk3738reg:39maxItems: 14041clocks:42# On the A80, the PRCM mod0 clocks have 2 parents.43minItems: 244maxItems: 345description: >46The parent order must match the hardware programming order.4748clock-output-names:49maxItems: 15051required:52- "#clock-cells"53- compatible54- reg55- clocks56- clock-output-names5758additionalProperties: false5960examples:61- |62clk@1c20080 {63#clock-cells = <0>;64compatible = "allwinner,sun4i-a10-mod0-clk";65reg = <0x01c20080 0x4>;66clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;67clock-output-names = "nand";68};6970- |71clk@8001454 {72#clock-cells = <0>;73compatible = "allwinner,sun4i-a10-mod0-clk";74reg = <0x08001454 0x4>;75clocks = <&osc32k>, <&osc24M>;76clock-output-names = "r_ir";77};7879...808182