Path: blob/master/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml
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# SPDX-License-Identifier: GPL-2.01%YAML 1.22---3$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Allwinner A80 MMC Configuration Clock78maintainers:9- Chen-Yu Tsai <wens@csie.org>10- Maxime Ripard <mripard@kernel.org>1112deprecated: true1314description: >15There is one clock/reset output per mmc controller. The number of16outputs is determined by the size of the address block, which is17related to the overall mmc block.1819properties:20"#clock-cells":21const: 122description: >23The additional ID argument passed to the clock shall refer to24the index of the output.2526"#reset-cells":27const: 12829compatible:30const: allwinner,sun9i-a80-mmc-config-clk3132reg:33maxItems: 13435clocks:36maxItems: 13738resets:39maxItems: 14041clock-output-names:42maxItems: 44344required:45- "#clock-cells"46- "#reset-cells"47- compatible48- reg49- clocks50- clock-output-names5152additionalProperties: false5354examples:55- |56clk@1c13000 {57#clock-cells = <1>;58#reset-cells = <1>;59compatible = "allwinner,sun9i-a80-mmc-config-clk";60reg = <0x01c13000 0x10>;61clocks = <&ahb0_gates 8>;62resets = <&ahb0_resets 8>;63clock-output-names = "mmc0_config", "mmc1_config",64"mmc2_config", "mmc3_config";65};6667...686970